diff --git a/BitManipAllPlugin.scala b/BitManipAllPlugin.scala index 17b8d13..706ce82 100644 --- a/BitManipAllPlugin.scala +++ b/BitManipAllPlugin.scala @@ -546,71 +546,71 @@ class BitManipAllPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv execute plug new Area{ import execute._ val val_bitwise = input(BitManipAllCtrlbitwise).mux( - BitManipAllCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)), - BitManipAllCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)), - BitManipAllCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)) + BitManipAllCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)).asBits, + BitManipAllCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)).asBits, + BitManipAllCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)).asBits ) // mux bitwise val val_shift = input(BitManipAllCtrlshift).mux( - BitManipAllCtrlshiftEnum.CTRL_SLO -> ~((~input(SRC1)) |<< (input(SRC2)&31).asUInt), - BitManipAllCtrlshiftEnum.CTRL_SRO -> ~((~input(SRC1)) |>> (input(SRC2)&31).asUInt) + BitManipAllCtrlshiftEnum.CTRL_SLO -> ~((~input(SRC1)) |<< (input(SRC2)&31).asUInt).asBits, + BitManipAllCtrlshiftEnum.CTRL_SRO -> ~((~input(SRC1)) |>> (input(SRC2)&31).asUInt).asBits ) // mux shift val val_rotation = input(BitManipAllCtrlrotation).mux( - BitManipAllCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt), - BitManipAllCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt) + BitManipAllCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt).asBits, + BitManipAllCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt).asBits ) // mux rotation val val_sh_add = input(BitManipAllCtrlsh_add).mux( - BitManipAllCtrlsh_addEnum.CTRL_SH1ADD -> ((input(SRC1) |<< 1).asUInt + input(SRC2).asUInt), - BitManipAllCtrlsh_addEnum.CTRL_SH2ADD -> ((input(SRC1) |<< 2).asUInt + input(SRC2).asUInt), - BitManipAllCtrlsh_addEnum.CTRL_SH3ADD -> ((input(SRC1) |<< 3).asUInt + input(SRC2).asUInt) + BitManipAllCtrlsh_addEnum.CTRL_SH1ADD -> ((input(SRC1) |<< 1).asUInt + input(SRC2).asUInt).asBits, + BitManipAllCtrlsh_addEnum.CTRL_SH2ADD -> ((input(SRC1) |<< 2).asUInt + input(SRC2).asUInt).asBits, + BitManipAllCtrlsh_addEnum.CTRL_SH3ADD -> ((input(SRC1) |<< 3).asUInt + input(SRC2).asUInt).asBits ) // mux sh_add val val_singlebit = input(BitManipAllCtrlsinglebit).mux( - BitManipAllCtrlsinglebitEnum.CTRL_BCLR -> (input(SRC1) & ~(B"32'x00000001"|<<((input(SRC2)&31).asUInt))), - BitManipAllCtrlsinglebitEnum.CTRL_BEXT -> ((input(SRC1) |>> ((input(SRC2)&31).asUInt)) & B"32'x00000001"), - BitManipAllCtrlsinglebitEnum.CTRL_BINV -> (input(SRC1) ^ (B"32'x00000001"|<<((input(SRC2)&31).asUInt))), - BitManipAllCtrlsinglebitEnum.CTRL_BSET -> (input(SRC1) | (B"32'x00000001"|<<((input(SRC2)&31).asUInt))) + BitManipAllCtrlsinglebitEnum.CTRL_BCLR -> (input(SRC1) & ~(B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits, + BitManipAllCtrlsinglebitEnum.CTRL_BEXT -> ((input(SRC1) |>> ((input(SRC2)&31).asUInt)) & B"32'x00000001").asBits, + BitManipAllCtrlsinglebitEnum.CTRL_BINV -> (input(SRC1) ^ (B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits, + BitManipAllCtrlsinglebitEnum.CTRL_BSET -> (input(SRC1) | (B"32'x00000001"|<<((input(SRC2)&31).asUInt))).asBits ) // mux singlebit val val_grevroc = input(BitManipAllCtrlgrevroc).mux( - BitManipAllCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)), - BitManipAllCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)) + BitManipAllCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits, + BitManipAllCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits ) // mux grevroc val val_minmax = input(BitManipAllCtrlminmax).mux( - BitManipAllCtrlminmaxEnum.CTRL_MAX -> ((input(SRC1).asSInt > input(SRC2).asSInt) ? input(SRC1) | input(SRC2)), - BitManipAllCtrlminmaxEnum.CTRL_MAXU -> ((input(SRC1).asUInt > input(SRC2).asUInt) ? input(SRC1) | input(SRC2)), - BitManipAllCtrlminmaxEnum.CTRL_MIN -> ((input(SRC1).asSInt < input(SRC2).asSInt) ? input(SRC1) | input(SRC2)), - BitManipAllCtrlminmaxEnum.CTRL_MINU -> ((input(SRC1).asUInt < input(SRC2).asUInt) ? input(SRC1) | input(SRC2)) + BitManipAllCtrlminmaxEnum.CTRL_MAX -> ((input(SRC1).asSInt > input(SRC2).asSInt) ? input(SRC1) | input(SRC2)).asBits, + BitManipAllCtrlminmaxEnum.CTRL_MAXU -> ((input(SRC1).asUInt > input(SRC2).asUInt) ? input(SRC1) | input(SRC2)).asBits, + BitManipAllCtrlminmaxEnum.CTRL_MIN -> ((input(SRC1).asSInt < input(SRC2).asSInt) ? input(SRC1) | input(SRC2)).asBits, + BitManipAllCtrlminmaxEnum.CTRL_MINU -> ((input(SRC1).asUInt < input(SRC2).asUInt) ? input(SRC1) | input(SRC2)).asBits ) // mux minmax val val_shuffle = input(BitManipAllCtrlshuffle).mux( - BitManipAllCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)), - BitManipAllCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)) + BitManipAllCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)).asBits, + BitManipAllCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)).asBits ) // mux shuffle val val_pack = input(BitManipAllCtrlpack).mux( - BitManipAllCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)), - BitManipAllCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)), - BitManipAllCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)) + BitManipAllCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)).asBits, + BitManipAllCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)).asBits, + BitManipAllCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)).asBits ) // mux pack val val_xperm = input(BitManipAllCtrlxperm).mux( - BitManipAllCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)), - BitManipAllCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)), - BitManipAllCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)) + BitManipAllCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)).asBits, + BitManipAllCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)).asBits, + BitManipAllCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)).asBits ) // mux xperm val val_grevorc = input(BitManipAllCtrlgrevorc).mux( - BitManipAllCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)), - BitManipAllCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)) + BitManipAllCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits, + BitManipAllCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits ) // mux grevorc val val_countzeroes = input(BitManipAllCtrlcountzeroes).mux( - BitManipAllCtrlcountzeroesEnum.CTRL_CLZ -> fun_clz(input(SRC1)), - BitManipAllCtrlcountzeroesEnum.CTRL_CPOP -> fun_popcnt(input(SRC1)), - BitManipAllCtrlcountzeroesEnum.CTRL_CTZ -> fun_ctz(input(SRC1)) + BitManipAllCtrlcountzeroesEnum.CTRL_CLZ -> fun_clz(input(SRC1)).asBits, + BitManipAllCtrlcountzeroesEnum.CTRL_CPOP -> fun_popcnt(input(SRC1)).asBits, + BitManipAllCtrlcountzeroesEnum.CTRL_CTZ -> fun_ctz(input(SRC1)).asBits ) // mux countzeroes val val_signextend = input(BitManipAllCtrlsignextend).mux( - BitManipAllCtrlsignextendEnum.CTRL_SEXTdotB -> (Bits(24 bits).setAllTo(input(SRC1)(7)) ## input(SRC1)(7 downto 0)), - BitManipAllCtrlsignextendEnum.CTRL_SEXTdotH -> (Bits(16 bits).setAllTo(input(SRC1)(15)) ## input(SRC1)(15 downto 0)) + BitManipAllCtrlsignextendEnum.CTRL_SEXTdotB -> (Bits(24 bits).setAllTo(input(SRC1)(7)) ## input(SRC1)(7 downto 0)).asBits, + BitManipAllCtrlsignextendEnum.CTRL_SEXTdotH -> (Bits(16 bits).setAllTo(input(SRC1)(15)) ## input(SRC1)(15 downto 0)).asBits ) // mux signextend val val_ternary = input(BitManipAllCtrlternary).mux( - BitManipAllCtrlternaryEnum.CTRL_CMIX -> ((input(SRC1) & input(SRC2)) | (input(SRC3) & ~input(SRC2))), - BitManipAllCtrlternaryEnum.CTRL_CMOV -> ((input(SRC2).asUInt =/= 0) ? input(SRC1) | input(SRC3)), - BitManipAllCtrlternaryEnum.CTRL_FSL -> fun_fsl(input(SRC1), input(SRC3), input(SRC2)), - BitManipAllCtrlternaryEnum.CTRL_FSR -> fun_fsr(input(SRC1), input(SRC3), input(SRC2)) + BitManipAllCtrlternaryEnum.CTRL_CMIX -> ((input(SRC1) & input(SRC2)) | (input(SRC3) & ~input(SRC2))).asBits, + BitManipAllCtrlternaryEnum.CTRL_CMOV -> ((input(SRC2).asUInt =/= 0) ? input(SRC1) | input(SRC3)).asBits, + BitManipAllCtrlternaryEnum.CTRL_FSL -> fun_fsl(input(SRC1), input(SRC3), input(SRC2)).asBits, + BitManipAllCtrlternaryEnum.CTRL_FSR -> fun_fsr(input(SRC1), input(SRC3), input(SRC2)).asBits ) // mux ternary insert(BitManipAll_FINAL_OUTPUT) := input(BitManipAllCtrl).mux( BitManipAllCtrlEnum.CTRL_bitwise -> val_bitwise.asBits, diff --git a/BitManipZbpPlugin.scala b/BitManipZbpPlugin.scala index 6253a6f..f476e64 100644 --- a/BitManipZbpPlugin.scala +++ b/BitManipZbpPlugin.scala @@ -458,35 +458,35 @@ class BitManipZbpPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv execute plug new Area{ import execute._ val val_bitwise = input(BitManipZbpCtrlbitwise).mux( - BitManipZbpCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)), - BitManipZbpCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)), - BitManipZbpCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)) + BitManipZbpCtrlbitwiseEnum.CTRL_ANDN -> (input(SRC1) & ~input(SRC2)).asBits, + BitManipZbpCtrlbitwiseEnum.CTRL_ORN -> (input(SRC1) | ~input(SRC2)).asBits, + BitManipZbpCtrlbitwiseEnum.CTRL_XNOR -> (input(SRC1) ^ ~input(SRC2)).asBits ) // mux bitwise val val_rotation = input(BitManipZbpCtrlrotation).mux( - BitManipZbpCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt), - BitManipZbpCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt) + BitManipZbpCtrlrotationEnum.CTRL_ROL -> input(SRC1).rotateLeft((input(SRC2)&31)(4 downto 0).asUInt).asBits, + BitManipZbpCtrlrotationEnum.CTRL_ROR -> input(SRC1).rotateRight((input(SRC2)&31)(4 downto 0).asUInt).asBits ) // mux rotation val val_grevroc = input(BitManipZbpCtrlgrevroc).mux( - BitManipZbpCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)), - BitManipZbpCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)) + BitManipZbpCtrlgrevrocEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits, + BitManipZbpCtrlgrevrocEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits ) // mux grevroc val val_shuffle = input(BitManipZbpCtrlshuffle).mux( - BitManipZbpCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)), - BitManipZbpCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)) + BitManipZbpCtrlshuffleEnum.CTRL_SHFL -> fun_shfl32(input(SRC1), input(SRC2)).asBits, + BitManipZbpCtrlshuffleEnum.CTRL_UNSHFL -> fun_unshfl32(input(SRC1), input(SRC2)).asBits ) // mux shuffle val val_pack = input(BitManipZbpCtrlpack).mux( - BitManipZbpCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)), - BitManipZbpCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)), - BitManipZbpCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)) + BitManipZbpCtrlpackEnum.CTRL_PACK -> (input(SRC2)(15 downto 0) ## input(SRC1)(15 downto 0)).asBits, + BitManipZbpCtrlpackEnum.CTRL_PACKH -> B"16'x0000" ## (input(SRC2)(7 downto 0) ## input(SRC1)(7 downto 0)).asBits, + BitManipZbpCtrlpackEnum.CTRL_PACKU -> (input(SRC2)(31 downto 16) ## input(SRC1)(31 downto 16)).asBits ) // mux pack val val_xperm = input(BitManipZbpCtrlxperm).mux( - BitManipZbpCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)), - BitManipZbpCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)), - BitManipZbpCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)) + BitManipZbpCtrlxpermEnum.CTRL_XPERMdotB -> fun_xperm_b(input(SRC1), input(SRC2)).asBits, + BitManipZbpCtrlxpermEnum.CTRL_XPERMdotH -> fun_xperm_h(input(SRC1), input(SRC2)).asBits, + BitManipZbpCtrlxpermEnum.CTRL_XPERMdotN -> fun_xperm_n(input(SRC1), input(SRC2)).asBits ) // mux xperm val val_grevorc = input(BitManipZbpCtrlgrevorc).mux( - BitManipZbpCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)), - BitManipZbpCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)) + BitManipZbpCtrlgrevorcEnum.CTRL_GORC -> fun_gorc(input(SRC1), input(SRC2)).asBits, + BitManipZbpCtrlgrevorcEnum.CTRL_GREV -> fun_grev(input(SRC1), input(SRC2)).asBits ) // mux grevorc insert(BitManipZbp_FINAL_OUTPUT) := input(BitManipZbpCtrl).mux( BitManipZbpCtrlEnum.CTRL_bitwise -> val_bitwise.asBits, diff --git a/CryptoZknePlugin.scala b/CryptoZknePlugin.scala index b281fdb..5ab8e3b 100644 --- a/CryptoZknePlugin.scala +++ b/CryptoZknePlugin.scala @@ -408,16 +408,16 @@ class CryptoZknePlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv] execute plug new Area{ import execute._ val val_aes0 = input(CryptoZkneCtrlaes0).mux( - CryptoZkneCtrlaes0Enum.CTRL_aes32esmi0 -> fun_aesx_0(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes0Enum.CTRL_aes32esmi1 -> fun_aesx_1(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes0Enum.CTRL_aes32esmi2 -> fun_aesx_2(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes0Enum.CTRL_aes32esmi3 -> fun_aesx_3(input(SRC2), input(SRC1)) + CryptoZkneCtrlaes0Enum.CTRL_aes32esmi0 -> fun_aesx_0(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes0Enum.CTRL_aes32esmi1 -> fun_aesx_1(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes0Enum.CTRL_aes32esmi2 -> fun_aesx_2(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes0Enum.CTRL_aes32esmi3 -> fun_aesx_3(input(SRC2), input(SRC1)).asBits ) // mux aes0 val val_aes1 = input(CryptoZkneCtrlaes1).mux( - CryptoZkneCtrlaes1Enum.CTRL_aes32esi0 -> fun_aesxnm_0(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes1Enum.CTRL_aes32esi1 -> fun_aesxnm_1(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes1Enum.CTRL_aes32esi2 -> fun_aesxnm_2(input(SRC2), input(SRC1)), - CryptoZkneCtrlaes1Enum.CTRL_aes32esi3 -> fun_aesxnm_3(input(SRC2), input(SRC1)) + CryptoZkneCtrlaes1Enum.CTRL_aes32esi0 -> fun_aesxnm_0(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes1Enum.CTRL_aes32esi1 -> fun_aesxnm_1(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes1Enum.CTRL_aes32esi2 -> fun_aesxnm_2(input(SRC2), input(SRC1)).asBits, + CryptoZkneCtrlaes1Enum.CTRL_aes32esi3 -> fun_aesxnm_3(input(SRC2), input(SRC1)).asBits ) // mux aes1 insert(CryptoZkne_FINAL_OUTPUT) := input(CryptoZkneCtrl).mux( CryptoZkneCtrlEnum.CTRL_aes0 -> val_aes0.asBits, diff --git a/CryptoZknh.scala b/CryptoZknh.scala index 3bb5777..85ddac6 100644 --- a/CryptoZknh.scala +++ b/CryptoZknh.scala @@ -157,22 +157,22 @@ class CryptoZknhPlugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv] execute plug new Area{ import execute._ val val_sha256sig = input(CryptoZknhCtrlsha256sig).mux( - CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig0 -> fun_sha256sig0(input(SRC1)), - CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig1 -> fun_sha256sig1(input(SRC1)) + CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig0 -> fun_sha256sig0(input(SRC1)).asBits, + CryptoZknhCtrlsha256sigEnum.CTRL_sha256sig1 -> fun_sha256sig1(input(SRC1)).asBits ) // mux sha256sig val val_sha256sum = input(CryptoZknhCtrlsha256sum).mux( - CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum0 -> fun_sha256sum0(input(SRC1)), - CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum1 -> fun_sha256sum1(input(SRC1)) + CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum0 -> fun_sha256sum0(input(SRC1)).asBits, + CryptoZknhCtrlsha256sumEnum.CTRL_sha256sum1 -> fun_sha256sum1(input(SRC1)).asBits ) // mux sha256sum val val_sha512sig = input(CryptoZknhCtrlsha512sig).mux( - CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0h -> fun_sha512sig0h(input(SRC1),input(SRC2)), - CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0l -> fun_sha512sig0l(input(SRC1),input(SRC2)), - CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1h -> fun_sha512sig1h(input(SRC1),input(SRC2)), - CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1l -> fun_sha512sig1l(input(SRC1),input(SRC2)) + CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0h -> fun_sha512sig0h(input(SRC1),input(SRC2)).asBits, + CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig0l -> fun_sha512sig0l(input(SRC1),input(SRC2)).asBits, + CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1h -> fun_sha512sig1h(input(SRC1),input(SRC2)).asBits, + CryptoZknhCtrlsha512sigEnum.CTRL_sha512sig1l -> fun_sha512sig1l(input(SRC1),input(SRC2)).asBits ) // mux sha512sig val val_sha512sum = input(CryptoZknhCtrlsha512sum).mux( - CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum0r -> fun_sha512sum0r(input(SRC1),input(SRC2)), - CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum1r -> fun_sha512sum1r(input(SRC1),input(SRC2)) + CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum0r -> fun_sha512sum0r(input(SRC1),input(SRC2)).asBits, + CryptoZknhCtrlsha512sumEnum.CTRL_sha512sum1r -> fun_sha512sum1r(input(SRC1),input(SRC2)).asBits ) // mux sha512sum insert(CryptoZknh_FINAL_OUTPUT) := input(CryptoZknhCtrl).mux( CryptoZknhCtrlEnum.CTRL_sha256sig -> val_sha256sig.asBits, diff --git a/Makefile b/Makefile index 8e00265..c65b89e 100644 --- a/Makefile +++ b/Makefile @@ -59,7 +59,7 @@ CryptoZknh.scala: gen_plugin data_sha.txt PDataProcess.scala: gen_plugin data_Zpn.txt ./gen_plugin -n PDataProcess -i data_Zpn.txt -I Zpn >| $@ -PSlowDataProcess.scala: gen_plugin data_Zpn.txt +PSlowDataProcess.scala: gen_plugin data_Zpn_2cycles.txt ./gen_plugin -n PSlowDataProcess -i data_Zpn_2cycles.txt -I Zpn >| $@ P64DataProcess.scala: gen_plugin data_Zp64.txt diff --git a/unparse.cpp b/unparse.cpp index 19cd76a..8afc453 100644 --- a/unparse.cpp +++ b/unparse.cpp @@ -53,6 +53,7 @@ void unparse(std::ostream& output, const std::string isString = "IS_" + prefix; const bool two_cycles = em_widths.size() > 0; const std::string bypassableExecuteString = two_cycles ? "False" : "Bool(earlyInjection)"; + const std::string bypassableMemoryString = two_cycles ? "Bool(earlyInjection)" : "True"; output << "// WARNING: this is auto-generated code!" << std::endl; output << "// See https://github.com/rdolbeau/VexRiscvBPluginGenerator/" << std::endl; @@ -109,7 +110,7 @@ void unparse(std::ostream& output, output << "} // object Plugin" << std::endl; // Plugin class - output << "class " << prefix << "Plugin"; if (!two_cycles) output << "(earlyInjection : Boolean = true)"; output << " extends Plugin[VexRiscv] {" << std::endl; + output << "class " << prefix << "Plugin(earlyInjection : Boolean = true) extends Plugin[VexRiscv] {" << std::endl; output << '\t' << "import " << prefix << "Plugin._" << std::endl; output << '\t' << "object " << isString << " extends Stageable(Bool)" << std::endl; output << '\t' << "object " << outputString << " extends Stageable(Bits(" << (wide ? 64 : 32) << " bits))" << std::endl; @@ -131,7 +132,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl; if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl; output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl; - output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl; + output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl; output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl; output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl; output << '\t' << '\t' << "\t)" << std::endl; @@ -142,7 +143,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl; if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl; output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl; - output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl; + output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl; output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl; output << '\t' << '\t' << "\tRS2_USE -> True," << std::endl; output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl; @@ -153,7 +154,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl; if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl; output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl; - output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl; + output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl; output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl; output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl; output << '\t' << '\t' << "\t)" << std::endl; @@ -165,7 +166,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl; if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl; output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl; - output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl; + output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl; output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl; output << '\t' << '\t' << "\tRS2_USE -> True," << std::endl; output << '\t' << '\t' << "\tRS3_USE -> True," << std::endl; @@ -179,7 +180,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << "\tREGFILE_WRITE_VALID -> True," << std::endl; if (wide) output << '\t' << '\t' << "\tREGFILE_WRITE_VALID_ODD -> True," << std::endl; output << '\t' << '\t' << "\tBYPASSABLE_EXECUTE_STAGE -> " << bypassableExecuteString << "," << std::endl; - output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> True," << std::endl; + output << '\t' << '\t' << "\tBYPASSABLE_MEMORY_STAGE -> " << bypassableMemoryString << "," << std::endl; output << '\t' << '\t' << "\tRS1_USE -> True," << std::endl; output << '\t' << '\t' << "\tRS3_USE -> True," << std::endl; output << '\t' << '\t' << "\t" << isString << " -> True" << std::endl; @@ -241,17 +242,28 @@ void unparse(std::ostream& output, output << "// End Extra" << std::endl; } - if (!two_cycles) { output << '\t' << '\t' << "execute plug new Area{" << std::endl; output << '\t' << '\t' << '\t' << "import execute._" << std::endl; + std::string where = "execute"; + if (two_cycles) { + for (auto const& pair : em_widths) { + std::string regName = prefix + "_INTERMEDIATE_" + pair.first + "" + std::to_string(pair.second); + output << '\t' << '\t' << '\t' << "insert(" << regName << ") := " << semantics[pair.first] << ".asBits" << std::endl; + } + output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl; + output << '\t' << '\t' << "memory plug new Area{" << std::endl; + output << '\t' << '\t' << '\t' << "import memory._" << std::endl; + where = "memory"; + } - // 2nd level MUXes for (const group* g : *groups) { if (g->opnames.size() > 1) { output << '\t' << '\t' << '\t' << "val val_" << g->name << " = input("<< ctrlString << g->name << ").mux(" << std::endl; for (auto it = g->opnames.begin() ; it != g->opnames.end() ; it++) { std::string opname = *it; - output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << semantics[opname]; + std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]); + std::string semantic = two_cycles ? mem_semantics[opname] + "(input(" + regName + ")).asBits" : semantics[opname]; + output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << semantic + ".asBits"; if (std::next(it, 1) == g->opnames.end()) output << std::endl; else @@ -260,7 +272,6 @@ void unparse(std::ostream& output, output << '\t' << '\t' << '\t' << ") // mux " << g->name << std::endl; } } - // conditional last level mux output << '\t' << '\t' << '\t' << "insert(" << outputString << ") := input(" << ctrlString << ").mux(" << std::endl; for (auto it = groups->begin() ; it != groups->end() ; it++) { @@ -268,7 +279,10 @@ void unparse(std::ostream& output, if (g->opnames.size() > 1) { output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits"; } else { - output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << (*g->opnames.begin()) << " -> " << semantics[*g->opnames.begin()] << ".asBits"; + std::string opname = *g->opnames.begin(); + std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]); + std::string semantic = two_cycles ? mem_semantics[opname] + "(input(" + regName + ")).asBits" : semantics[opname] + ".asBits"; + output << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << semantic; } if (std::next(it, 1) == groups->end()) output << std::endl; @@ -276,9 +290,14 @@ void unparse(std::ostream& output, output << "," << std::endl; } output << '\t' << '\t' << '\t' << ") // primary mux" << std::endl; - output << '\t' << '\t' << "} // execute plug newArea" << std::endl; + output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl; + if (!two_cycles) { + output << '\t' << '\t' << "val injectionStage = if(earlyInjection) execute else memory" << std::endl; + } else { + output << '\t' << '\t' << "val injectionStage = if(earlyInjection) memory else writeBack" << std::endl; + } + where = "injectionStage"; - output << '\t' << '\t' << "val injectionStage = if(earlyInjection) execute else memory" << std::endl; output << '\t' << '\t' << "injectionStage plug new Area {" << std::endl; output << '\t' << '\t' << '\t' << "import injectionStage._" << std::endl; output << '\t' << '\t' << '\t' << "when (arbitration.isValid && input(" << isString << ")) {" << std::endl; @@ -289,73 +308,7 @@ void unparse(std::ostream& output, output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA) := input(" << outputString << ")" << std::endl; } output << '\t' << '\t' << '\t' << "} // when input is" << std::endl; - output << '\t' << '\t' << "} // injectionStage plug newArea" << std::endl; - } else { // two-cycles - output << '\t' << '\t' << "execute plug new Area{" << std::endl; - output << '\t' << '\t' << '\t' << "import execute._" << std::endl; - for (auto const& pair : em_widths) { - std::string regName = prefix + "_INTERMEDIATE_" + pair.first + "" + std::to_string(pair.second); - output << '\t' << '\t' << '\t' << "insert(" << regName << ") := " << semantics[pair.first] << ".asBits" << std::endl; - } - output << '\t' << '\t' << "} // execute plug newArea" << std::endl; - output << '\t' << '\t' << "memory plug new Area{" << std::endl; - output << '\t' << '\t' << '\t' << "import memory._" << std::endl; - // 2nd level MUXes - for (const group* g : *groups) { - if (g->opnames.size() > 1) { - output << '\t' << '\t' << '\t' << "val val_" << g->name << " = input("<< ctrlString << g->name << ").mux(" << std::endl; - for (auto it = g->opnames.begin() ; it != g->opnames.end() ; it++) { - std::string opname = *it; - std::string semantic = semantics[opname]; - std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]); - output << '\t' << '\t' << '\t' << '\t' << ctrlString << g->name << "Enum.CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits"; - if (std::next(it, 1) == g->opnames.end()) - output << std::endl; - else - output << "," << std::endl; - } - output << '\t' << '\t' << '\t' << ") // mux " << g->name << std::endl; - } - } - // conditional last level mux - output << '\t' << '\t' << '\t' << "when (arbitration.isValid && input(" << isString << ")) {" << std::endl; - output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA) := input(" << ctrlString << ").mux(" << std::endl; - for (auto it = groups->begin() ; it != groups->end() ; it++) { - group* g = *it; - if (g->opnames.size() > 1) { - output << '\t' << '\t' << '\t' << '\t' <<'\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits"; - } else { - std::string opname = *g->opnames.begin(); - std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]); - output << '\t' << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits(31 downto 0)"; - } - if (std::next(it, 1) == groups->end()) - output << std::endl; - else - output << "," << std::endl; - } - output << '\t' << '\t' << '\t' << '\t' << ") // primary mux" << std::endl; - if (wide) { - output << '\t' << '\t' << '\t' << '\t' << "output(REGFILE_WRITE_DATA_ODD) := input(" << ctrlString << ").mux(" << std::endl; - for (auto it = groups->begin() ; it != groups->end() ; it++) { - group* g = *it; - if (g->opnames.size() > 1) { - output << '\t' << '\t' << '\t' << '\t' <<'\t' << ctrlEnumString << "." << g->ctrlName() << " -> val_" << g->name << ".asBits"; - } else { - std::string opname = *g->opnames.begin(); - std::string regName = prefix + "_INTERMEDIATE_" + opname + "" + std::to_string(em_widths[opname]); - output << '\t' << '\t' << '\t' << '\t' << '\t' << ctrlEnumString << ".CTRL_" << opname << " -> " << mem_semantics[opname] << "(input(" << regName << ")).asBits(63 downto 32)"; - } - if (std::next(it, 1) == groups->end()) - output << std::endl; - else - output << "," << std::endl; - } - } - output << '\t' << '\t' << '\t' << '\t' << ") // primary mux" << std::endl; - output << '\t' << '\t' << '\t' << "} // when input is" << std::endl; - output << '\t' << '\t' << "} // memory plug newArea" << std::endl; - } + output << '\t' << '\t' << "} // " << where << " plug newArea" << std::endl; output << '\t' << "} // override def build" << std::endl; output << "} // class Plugin" << std::endl; }