From ff1b051f5610362f75d84dc440c40678e1402edb Mon Sep 17 00:00:00 2001
From: Romain Dolbeau <romain.dolbeau@european-processor-initiative.eu>
Date: Sat, 13 Feb 2021 06:33:44 -0500
Subject: [PATCH] Zp64 not Zpn

---
 data_Zp64.txt | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/data_Zp64.txt b/data_Zp64.txt
index 1012450..884f93b 100644
--- a/data_Zp64.txt
+++ b/data_Zp64.txt
@@ -2,10 +2,10 @@
 
 // low-order bit of Rd (7) is 0 to ensure even-numbered Rd
 // bit 25 is used for crossing so -
-I	SMULx8    SMULx8	101010-----------000----01110111	pdpismul8	Zpn
-I	UMULx8    UMULx8	101110-----------000----01110111	pdpiumul8	Zpn
-I	SMULx16   SMULx16	101000-----------000----01110111	pdpismul16	Zpn
-I	UMULx16   UMULx16	101100-----------000----01110111	pdpiumul16	Zpn
+I	SMULx8    SMULx8	101010-----------000----01110111	pdpismul8	Zp64
+I	UMULx8    UMULx8	101110-----------000----01110111	pdpiumul8	Zp64
+I	SMULx16   SMULx16	101000-----------000----01110111	pdpismul16	Zp64
+I	UMULx16   UMULx16	101100-----------000----01110111	pdpiumul16	Zp64
 
 // binary
 S	SMULx8	"fun_smulx8(input(SRC1), input(SRC2), input(INSTRUCTION)(25).asUInt)"