!Feature
next_elt_id: 4
name: satp
id: 2
display_order: 2
subfeatures: !!omap
- 000_access permission: !Subfeature
    name: 000_access permission
    tag: VP_MMU_SV32_F002_S000
    next_elt_id: 1
    display_order: 0
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_MMU_SV32_F002_S000_I000
        description: Access satp in M, S, and U mode using csrrw, csrrc, csrrs
        reqt_doc: 'ISA Volume II: Privilege Architecture Version 20211203, Chapter
          5.1.11'
        ref_mode: ''
        ref_page: ''
        ref_section: ''
        ref_viewer: ''
        verif_goals: Show that satp is only accessible in M and S mode and illegal
          instruction exception is generated when accessed in lower privilege mode
        pfc: 3
        test_type: 0
        cov_method: 0
        cores: 8
        coverage_loc: ''
        comments: ''
- 001_MODE field: !Subfeature
    name: 001_MODE field
    tag: VP_MMU_SV32_F002_S001
    next_elt_id: 2
    display_order: 1
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_MMU_SV32_F002_S001_I000
        description: Allows to select different schemes of address translation. Writes
          to satp are ignored when unsupported mode is selected.
        reqt_doc: 'ISA Volume II: Privilege Architecture Version 20211203, Chapter
          5.1.11'
        ref_mode: ''
        ref_page: ''
        ref_section: ''
        ref_viewer: ''
        verif_goals: Show that supported address translation scheme i.e sv32 is selected
          by writing satp.mode=sv32 and reading back the satp
        pfc: 3
        test_type: 0
        cov_method: 0
        cores: 8
        coverage_loc: ''
        comments: ''
- 002_MODE=Bare: !Subfeature
    name: 002_MODE=Bare
    tag: VP_MMU_SV32_F002_S002
    next_elt_id: 1
    display_order: 2
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_MMU_SV32_F002_S002_I000
        description: Selecting MODE=Bare the remaining feild should be zero. Other
          encoding for remaining feild in satp is reserved
        reqt_doc: 'ISA Volume II: Privilege Architecture Version 20211203, Chapter
          5.1.11'
        ref_mode: ''
        ref_page: ''
        ref_section: ''
        ref_viewer: ''
        verif_goals: Show wirting {zero, non-zero} value to satp when mode=bare the
          behaviour follows the design implemention
        pfc: 3
        test_type: 0
        cov_method: 0
        cores: 8
        coverage_loc: ''
        comments: ''
- 003_ASIDLEN: !Subfeature
    name: 003_ASIDLEN
    tag: VP_MMU_SV32_F002_S003
    next_elt_id: 1
    display_order: 3
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_MMU_SV32_F002_S003_I000
        description: ASIDLEN is the number of ASID bits implemented. MAXASID bits
          for sv32 is 9
        reqt_doc: 'ISA Volume II: Privilege Architecture Version 20211203, Chapter
          5.1.11'
        ref_mode: ''
        ref_page: ''
        ref_section: ''
        ref_viewer: ''
        verif_goals: Determine by writing one to every bit position in the ASID field,
          then reading back the value in satp to see which bit positions in the ASID
          field hold a one. Show that ASIDLEN is equal to the expected ASIDLEN
        pfc: 3
        test_type: 0
        cov_method: 0
        cores: 8
        coverage_loc: ''
        comments: ''
vptool_gitrev: '$Id: b0efb3ae3f9057b71a577d43c2b77f1cfb2ef82f $'
io_fmt_gitrev: '$Id: 7ee5d68801f5498a957bcbe23fcad87817a364c5 $'
config_gitrev: '$Id: 0422e19126dae20ffc4d5a84e4ce3de0b6eb4eb5 $'
ymlcfg_gitrev: '$Id: 286c689bd48b7a58f9a37754267895cffef1270c $'
