# Copyright 2024 Thales DIS France SAS
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# Original Author: Zbigniew CHAMSKI - Thales

nmi:
    label: nmi_vector
reset:
    label: reset_vector
mtime:
    implemented: true
    address: 0x20000
memory_map:
  -
    memory_region:
        name: bootrom
        base_addr: 0x10000
        size: 0x10000
        description: System boot ROM
        attributes:
            read_only: true
            cached: false
  -
    memory_region:
        name: dram
        base_addr: 0x80000000
        size: 0x40000000
        description: System (D)RAM
        attributes:
            executable: true
            cached: true
            non_idempotent: false
            read_only: false
mtimecmp:
    implemented: false
mtval_condition_writes:
    implemented: false
scause_non_standard:
    implemented: false
stval_condition_writes:
    implemented: false
zicbo_cache_block_sz:
    implemented: false
