!Feature
next_elt_id: 4
name: CVA6_Machine_mode_RW_CSRs(mstatus, misa, mideleg, medeleg, mie, mtvec, mcounteren,
  mepc, mcause, mtval, mip,pmpaddr[0..7], pmpcfg[0..1])
id: 0
display_order: 0
subfeatures: !!omap
- 000_Power-on-reset (POR) values of CSR: !Subfeature
    name: 000_Power-on-reset (POR) values of CSR
    tag: VP_CSR_VERIFICATION_F000_S000
    next_elt_id: 1
    display_order: 0
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_CSR_VERIFICATION_F000_S000_I000
        description: Upon reset, RISC-V CVA6 Machine mode RW CSRs must initialize
          to their respective POR value.
        reqt_doc: 
          https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
        ref_mode: page
        ref_page: ''
        ref_section: ''
        ref_viewer: firefox
        verif_goals: Verify that the Machine Mode RW CSR POR value must match with
          the value specified in the RISC-V CVA6 user manual.
        pfc: 1
        test_type: 1
        cov_method: 1
        cores: 8
        coverage_loc: ''
        comments: ''
- ? "001_Testing CSR with inverted reset value\n\n"
  : !Subfeature
    name: "001_Testing CSR with inverted reset value\n\n"
    tag: VP_csr-access_F000_S003
    next_elt_id: 1
    display_order: 1
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_csr-access_F000_S003_I000
        description: Check the behaviour of the RISC-V Machine mode CVA6 CSRs,when
          reset inverted values are written to respective CSRs.
        reqt_doc: ''
        ref_mode: page
        ref_page: ''
        ref_section: ''
        ref_viewer: firefox
        verif_goals: "1. Verify CSR reading post write operation.\n2. Verify if the
          core correctly handles inverted reset values or not."
        pfc: 1
        test_type: 1
        cov_method: 1
        cores: 8
        coverage_loc: ''
        comments: ''
- 002_CSR write and read operations: !Subfeature
    name: 002_CSR write and read operations
    tag: VP_CSR_VERIFICATION_F000_S001
    next_elt_id: 1
    display_order: 2
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_CSR_VERIFICATION_F000_S001_I000
        description: check the correctness of RISCV CVA6 Machine Mode RW CSRs by writing
          random values like 0xa5a5a5a5, 0x5a5a5a5a, 0xffa1ae40.. and read using the
          CSR instructions defined in the instruction set architecture (ISA).
        reqt_doc: 
          https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
        ref_mode: page
        ref_page: ''
        ref_section: ''
        ref_viewer: firefox
        verif_goals: "1.Verify that CSR can be written using the appropriate CSR write
          instructions.\n\n2.Ensure correct read operations using CSR read instructions.\n
          \n3.Ensure that read values of the CSR should be as per CVA6 user manual"
        pfc: 1
        test_type: 1
        cov_method: 1
        cores: 8
        coverage_loc: ''
        comments: ''
- 003_CSR access in different privilege modes: !Subfeature
    name: 003_CSR access in different privilege modes
    tag: VP_CSR_VERIFICATION_F000_S002
    next_elt_id: 1
    display_order: 3
    items: !!omap
    - '000': !VerifItem
        name: '000'
        tag: VP_CSR_VERIFICATION_F000_S002_I000
        description: Accessing RISC-V CVA6 Machine Mode CSRs in different privilege
          modes (User, Supervisor and Machine modes).
        reqt_doc: 
          https://docs.openhwgroup.org/projects/cva6-user-manual/01_cva6_user/CSR_CV32A60X.html
        ref_mode: page
        ref_page: ''
        ref_section: ''
        ref_viewer: firefox
        verif_goals: "1.Ensure that Machine mode CSRs can only be accessed in the
          Machine mode according to the RISCV specification.\n\n2.Verify that trying
          to access Machine Mode CSRs in lower privilege mode raises an illegal instruction
          exception."
        pfc: 1
        test_type: 1
        cov_method: 1
        cores: 8
        coverage_loc: ''
        comments: ''
vptool_gitrev: '$Id: a8b561f68549658061625891c533e7d45996bc9e $'
io_fmt_gitrev: '$Id: 61ab4e53ca49e21d56c416f0af0fa04d148e8001 $'
config_gitrev: '$Id: 5192fced2cfa10be5e18e827922e31e7489ed987 $'
ymlcfg_gitrev: '$Id: ce5e73bd5e8e0099334cb657afb7a624a99afbda $'
