name: corev_rand_instr_obi_err_debug
uvm_test: uvmt_$(CV_CORE_LC)_firmware_test_c
description: >
    Random instruction test generated by corev-dv with random instruction bus errors in debug mode
plusargs: >
    +random_fetch_toggle
    +obi_memory_instr_random_err_enabled
    +obi_memory_instr_one_shot_err_enabled
    +gen_irq_noise
    +gen_random_debug
