diff --git a/src/lsu.sv b/src/lsu.sv index a6904e9a3..85065f1c6 100644 --- a/src/lsu.sv +++ b/src/lsu.sv @@ -300,12 +300,12 @@ module lsu #( unique case (operator) // all loads go here LD, LW, LWU, LH, LHU, LB, LBU: begin - ld_valid_i = 1'b1; + ld_valid_i = lsu_valid_i; op = LD_OP; end // all stores go here SD, SW, SH, SB: begin - st_valid_i = 1'b1; + st_valid_i = lsu_valid_i; op = ST_OP; end // not relevant for the lsu @@ -439,7 +439,6 @@ module lsu #( operator_n = operator_q; trans_id_n = trans_id_q; be_n = be_q; - stall_n = 1'b1; // get new input data if (lsu_valid_i) begin vaddr_n = vaddr_i; @@ -447,7 +446,12 @@ module lsu #( operator_n = operator_i; trans_id_n = trans_id_i; be_n = be_i; - stall_n = 1'b0; + end + + if (lsu_ready_o) begin + stall_n = 1'b0; + end else begin + stall_n = 1'b1; end end diff --git a/src/mem_arbiter.sv b/src/mem_arbiter.sv index 4d62e2a15..5e4e7ec9d 100644 --- a/src/mem_arbiter.sv +++ b/src/mem_arbiter.sv @@ -109,6 +109,7 @@ module mem_arbiter #( for (int i = 0; i < NR_PORTS; i++) data_gnt_o[i] = 1'b0; + case (CS) // ---------------------------- // Single-cycle memory requests @@ -151,6 +152,9 @@ module mem_arbiter #( data_req_o = data_req_i[request_port_q]; // we can check for it since we only stay in this state if didn't yet receive a grant if (data_gnt_i) begin + // set the slave on which we are waiting + in_data = 1'b1 << request_port_q; + push = 1'b1; // default is that we are waiting for the tag to be there // if we are waiting for the tag we can't accept any new instructions NS = WAIT_TAG; diff --git a/src/store_unit.sv b/src/store_unit.sv index eaa2e9eb2..d69a9fd52 100644 --- a/src/store_unit.sv +++ b/src/store_unit.sv @@ -82,7 +82,7 @@ module store_unit ( // check if translation was valid and we have space in the store buffer // otherwise simply stall if (translation_valid_i && st_ready) begin - valid_o = 1'b0; + valid_o = 1'b1; // post this store to the store buffer st_valid = 1'b1; // translation was not successful - stall here diff --git a/tb/test/lsu/lsu_test_base.svh b/tb/test/lsu/lsu_test_base.svh index d4f195196..fb7adc826 100644 --- a/tb/test/lsu/lsu_test_base.svh +++ b/tb/test/lsu/lsu_test_base.svh @@ -57,7 +57,7 @@ class lsu_test_base extends uvm_test; m_mem_if_cfg = mem_if_agent_config::type_id::create("m_mem_if_cfg"); m_env_cfg.m_mem_if_agent_config = m_mem_if_cfg; // make it a slave agent - m_env_cfg.m_mem_if_agent_config.mem_if_config = SLAVE; + m_env_cfg.m_mem_if_agent_config.mem_if_config = SLAVE_REPLAY; // create lsu agent configuration m_lsu_if_cfg = lsu_if_agent_config::type_id::create("m_lsu_if_cfg"); m_env_cfg.m_lsu_if_agent_config = m_lsu_if_cfg; diff --git a/tb/wave/wave_lsu.do b/tb/wave/wave_lsu.do index 8f64511e7..a8cda82e7 100644 --- a/tb/wave/wave_lsu.do +++ b/tb/wave/wave_lsu.do @@ -2,10 +2,12 @@ onerror {resume} quietly WaveActivateNextPane {} 0 add wave -noupdate -group lsu /lsu_tb/dut/* add wave -noupdate -group mem_arbiter /lsu_tb/dut/mem_arbiter_i/* +add wave -noupdate -group mem_arbiter -group arbiter_fifo /lsu_tb/dut/mem_arbiter_i/fifo_i/* add wave -noupdate -group store_unit /lsu_tb/dut/store_unit_i/* add wave -noupdate -group store_queue /lsu_tb/dut/store_unit_i/store_queue_i/* add wave -noupdate -group load_unit /lsu_tb/dut/load_unit_i/* add wave -noupdate -group fifo /lsu_tb/dut/load_unit_i/fifo_i/* +add wave -noupdate -group lsu_arbiter /lsu_tb/dut/lsu_arbiter_i/* add wave -noupdate -group mmu /lsu_tb/dut/mmu_i/* TreeUpdate [SetDefaultTree]