diff --git a/Makefile b/Makefile index 81d8c6a4b..d2ce3b9e6 100644 --- a/Makefile +++ b/Makefile @@ -35,8 +35,9 @@ riscv-test-dir = riscv-tests/isa riscv-tests = rv64ui-p-add rv64ui-p-addi rv64ui-p-slli rv64ui-p-addiw rv64ui-p-addw rv64ui-p-and rv64ui-p-auipc \ rv64ui-p-beq rv64ui-p-bge rv64ui-p-bgeu rv64ui-p-andi rv64ui-p-blt rv64ui-p-bltu rv64ui-p-bne \ rv64ui-p-simple rv64ui-p-jal rv64ui-p-jalr rv64ui-p-or rv64ui-p-ori rv64ui-p-sub rv64ui-p-subw \ - rv64ui-p-xor rv64ui-p-xori rv64ui-p-slliw rv64ui-p-sll rv64ui-p-slli rv64ui-p-sllw - + rv64ui-p-xor rv64ui-p-xori rv64ui-p-slliw rv64ui-p-sll rv64ui-p-slli rv64ui-p-sllw \ + rv64ui-p-slt rv64ui-p-slti rv64ui-p-sltiu rv64ui-p-sltu rv64ui-p-sra rv64ui-p-srai \ + rv64ui-p-sraiw rv64ui-p-sraw rv64ui-p-srl rv64ui-p-srli rv64ui-p-srliw rv64ui-p-srlw \ riscv-test = rv64ui-p-add # Search here for include files (e.g.: non-standalone components) incdir = ./includes diff --git a/README.md b/README.md index 9a92cfa66..e31328634 100644 --- a/README.md +++ b/README.md @@ -39,23 +39,23 @@ Check out the [contribution guide](CONTRIBUTING.md) # Test Overview -| **Test Name** | **P/F/U** | **Test Name** | **P/F/U** | **Test Name** | **P/F/U** | -|---------------|----------------------|---------------|----------------------|---------------|----------------------| -| add | :white_check_mark: | lb | :white_large_square: | sll | :white_check_mark: | -| addi | :white_check_mark: | lbu | :white_large_square: | slli | :white_check_mark: | -| addiw | :white_check_mark: | ld | :white_large_square: | slliw | :white_check_mark: | -| addw | :white_check_mark: | lh | :white_large_square: | sllw | :white_check_mark: | -| and | :white_check_mark: | lhu | :white_large_square: | slt | :white_large_square: | -| andi | :white_check_mark: | lui | :white_large_square: | slti | :white_large_square: | -| auipc | :white_check_mark: | lw | :white_large_square: | sltiu | :white_large_square: | -| beq | :white_check_mark: | lwu | :white_large_square: | sltu | :white_large_square: | -| bge | :white_check_mark: | or | :white_check_mark: | sra | :white_check_mark: | -| bgeu | :white_check_mark: | ori | :white_check_mark: | srai | :white_check_mark: | -| blt | :white_check_mark: | sb | :white_large_square: | sraiw | :white_check_mark: | -| bltu | :white_check_mark: | sd | :white_large_square: | sraw | :white_check_mark: | -| bne | :white_check_mark: | sh | :white_large_square: | srl | :white_check_mark: | -| sub | :white_check_mark: | simple | :white_check_mark: | srli | :white_check_mark: | -| subw | :white_check_mark: | jal | :white_check_mark: | srliw | :white_check_mark: | -| sw | :white_large_square: | jalr | :white_check_mark: | srlw | :white_check_mark: | -| xor | :white_check_mark: | | | | | -| xori | :white_check_mark: | | | | | +| **Test Name** | **P/F/U** | **Test Name** | **P/F/U** | **Test Name** | **P/F/U** | +|---------------|----------------------|---------------|----------------------|---------------|--------------------| +| add | :white_check_mark: | lb | :x: | sll | :white_check_mark: | +| addi | :white_check_mark: | lbu | :white_large_square: | slli | :white_check_mark: | +| addiw | :white_check_mark: | ld | :white_large_square: | slliw | :white_check_mark: | +| addw | :white_check_mark: | lh | :white_large_square: | sllw | :white_check_mark: | +| and | :white_check_mark: | lhu | :white_large_square: | slt | :white_check_mark: | +| andi | :white_check_mark: | lui | :white_large_square: | slti | :white_check_mark: | +| auipc | :white_check_mark: | lw | :white_large_square: | sltiu | :white_check_mark: | +| beq | :white_check_mark: | lwu | :white_large_square: | sltu | :white_check_mark: | +| bge | :white_check_mark: | or | :white_check_mark: | sra | :white_check_mark: | +| bgeu | :white_check_mark: | ori | :white_check_mark: | srai | :white_check_mark: | +| blt | :white_check_mark: | sb | :white_large_square: | sraiw | :white_check_mark: | +| bltu | :white_check_mark: | sd | :white_large_square: | sraw | :white_check_mark: | +| bne | :white_check_mark: | sh | :white_large_square: | srl | :white_check_mark: | +| sub | :white_check_mark: | simple | :white_check_mark: | srli | :white_check_mark: | +| subw | :white_check_mark: | jal | :white_check_mark: | srliw | :white_check_mark: | +| sw | :white_large_square: | jalr | :white_check_mark: | srlw | :white_check_mark: | +| xor | :white_check_mark: | | | | | +| xori | :white_check_mark: | | | | | diff --git a/src/alu.sv b/src/alu.sv index f4ee73fc6..ca2e666ee 100644 --- a/src/alu.sv +++ b/src/alu.sv @@ -133,19 +133,17 @@ module alu // ------------ // Comparisons // ------------ - logic is_greater_equal; // handles both signed and unsigned forms - logic cmp_signed; + logic less; // handles both signed and unsigned forms + always_comb begin - cmp_signed = 1'b0; + logic sgn; + sgn = 1'b0; if (operator_i == SLTS) - cmp_signed = 1'b1; - // Is greater equal - if ((operand_a_i[63] ^ operand_b_i[63]) == 0) - is_greater_equal = (adder_result[63] == 0); - else - is_greater_equal = operand_a_i[63] ^ (cmp_signed); + sgn = 1'b1; + + less = ($signed({sgn & operand_a_i[63], operand_a_i}) < $signed({sgn & operand_b_i[63], operand_b_i})); end // ----------- @@ -172,7 +170,7 @@ module alu SRLW, SRAW: result_o = {{32{shift_result32[31]}}, shift_result32[31:0]}; // Comparison Operations - SLTS, SLTU: result_o = {63'b0, (~is_greater_equal)}; + SLTS, SLTU: result_o = {63'b0, less}; default: ; // default case to suppress unique warning endcase diff --git a/src/util/instruction_trace_item.svh b/src/util/instruction_trace_item.svh index 215f4b9e9..0c98c2999 100755 --- a/src/util/instruction_trace_item.svh +++ b/src/util/instruction_trace_item.svh @@ -237,9 +237,9 @@ class instruction_trace_item; read_regs.push_back(sbe.rs2); if (sbe.rs2 == 0) - return $sformatf("%-16s %s, pc + 0x%0h", mnemonic, regAddrToStr(sbe.rs1), $signed(sbe.result)); + return $sformatf("%-16s %s, pc + %0d", mnemonic, regAddrToStr(sbe.rs1), $signed(sbe.result)); else - return $sformatf("%-16s %s, %s, pc + 0x%0h", mnemonic, regAddrToStr(sbe.rs1), regAddrToStr(sbe.rs2), $signed(sbe.result)); + return $sformatf("%-16s %s, %s, pc + %0d", mnemonic, regAddrToStr(sbe.rs1), regAddrToStr(sbe.rs2), $signed(sbe.result)); endfunction // printIuInstr function string printUInstr(input string mnemonic); @@ -254,9 +254,9 @@ class instruction_trace_item; result_regs.push_back(sbe.rd); // jump instruction if (sbe.rd == 0) - return $sformatf("%-16s pc + 0x%0h", mnemonic, $signed(sbe.result)); + return $sformatf("%-16s pc + %0d", mnemonic, $signed(sbe.result)); else - return $sformatf("%-16s %s, pc + 0x%0h", mnemonic, regAddrToStr(sbe.rd), $signed(sbe.result)); + return $sformatf("%-16s %s, pc + %0d", mnemonic, regAddrToStr(sbe.rd), $signed(sbe.result)); endfunction // printUJInstr function string printCSRInstr(input string mnemonic);