diff --git a/Makefile b/Makefile
index febb37f44..7a7e0660f 100644
--- a/Makefile
+++ b/Makefile
@@ -75,7 +75,7 @@ $(tests):
 	vopt${questa_version} -work ${library} ${compile_flag} $@_tb -o $@_tb_optimized +acc -check_synthesis
 	# vsim${questa_version} $@_tb_optimized
 	# vsim${questa_version} +UVM_TESTNAME=$@_test -coverage -classdebug $@_tb_optimized
-	vsim${questa_version} +UVM_TESTNAME=$@_test +uvm_set_action="*,_ALL_,UVM_ERROR,UVM_DISPLAY|UVM_STOP" -c -coverage -classdebug -do "coverage save -onexit $@.ucdb; run -a; quit -code [coverage attribute -name TESTSTATUS -concise]" ${library}.$@_tb_optimized
+	# vsim${questa_version} +UVM_TESTNAME=$@_test +uvm_set_action="*,_ALL_,UVM_ERROR,UVM_DISPLAY|UVM_STOP" -c -coverage -classdebug -do "coverage save -onexit $@.ucdb; run -a; quit -code [coverage attribute -name TESTSTATUS -concise]" ${library}.$@_tb_optimized
 
 build-moore:
 	[ ! -e .moore ] || rm .moore
diff --git a/tb/agents/store_queue_if/store_queue_if_driver.svh b/tb/agents/store_queue_if/store_queue_if_driver.svh
index efc63741f..c5a6f453d 100644
--- a/tb/agents/store_queue_if/store_queue_if_driver.svh
+++ b/tb/agents/store_queue_if/store_queue_if_driver.svh
@@ -32,10 +32,49 @@ class store_queue_if_driver extends uvm_driver #(store_queue_if_seq_item);
     endfunction
 
     task run_phase(uvm_phase phase);
+        semaphore sem = new(1);
         store_queue_if_seq_item cmd;
-        seq_item_port.get_next_item(cmd);
+        // reset assignment
+        m_vif.mck.store_paddr <= 'b0;
+        m_vif.mck.store_data  <= 'b0;
+        m_vif.mck.store_be    <= 'b0;
+        m_vif.mck.commit      <= 1'b0;
+        m_vif.mck.store_valid <= 1'b0;
+        m_vif.mck.flush       <= 1'b0;
+        fork
+            put_data: begin
+                forever begin
+
+                    @(m_vif.mck);
+                    // make a new store request
+                    if (m_vif.mck.ready) begin
+                        seq_item_port.get_next_item(cmd);
+
+                        m_vif.mck.store_paddr <= cmd.address;
+                        m_vif.mck.store_data  <= cmd.data;
+                        m_vif.mck.store_be    <= cmd.be;
+                        m_vif.mck.store_valid <= 1'b1;
+
+                        seq_item_port.item_done();
+                        // fork off a commit task
+                        // commit a couple of cycles later
+                        fork
+                            commit_block: begin
+                                sem.get(1);
+                                @(m_vif.mck)
+                                m_vif.mck.commit <= 1'b1;
+                                @(m_vif.mck)
+                                m_vif.mck.commit <= 1'b0;
+                                sem.put(1);
+                            end
+                        join_none
+                    end else begin
+                        m_vif.mck.store_valid <= 1'b0;
+                    end
+                end
+            end
+        join_none
 
-        seq_item_port.item_done();
     endtask : run_phase
 
     function void build_phase(uvm_phase phase);
diff --git a/tb/store_queue_tb.sv b/tb/store_queue_tb.sv
index 036eb65b7..59e5e2c33 100644
--- a/tb/store_queue_tb.sv
+++ b/tb/store_queue_tb.sv
@@ -39,7 +39,7 @@ module store_queue_tb;
         .be_o             ( store_queue.check_be         ),
         .commit_i         ( store_queue.commit           ),
         .ready_o          ( store_queue.ready            ),
-        .valid_i          ( store_queue.store_valid      ),
+        .valid_i          ( store_queue.store_valid & store_queue.ready ),
         .paddr_i          ( store_queue.store_paddr      ),
         .data_i           ( store_queue.store_data       ),
         .be_i             ( store_queue.store_be         ),
@@ -67,16 +67,6 @@ module store_queue_tb;
             #10ns clk = ~clk;
     end
 
-    // // combinatorial signals
-    // assign store_queue.store_valid = store_valid & store_queue.ready;
-    // assign slave.data_gnt = slave_data_gnt;
-
-    // simulator stopper, this is suboptimal better go for coverage
-    initial begin
-        #1000000ns
-        $stop;
-    end
-
     program testbench (dcache_if slave, store_queue_if store_queue);
         initial begin
             // register the interfaces
diff --git a/tb/test/store_queue/store_queue_sequence.svh b/tb/test/store_queue/store_queue_sequence.svh
new file mode 100755
index 000000000..10cb093a3
--- /dev/null
+++ b/tb/test/store_queue/store_queue_sequence.svh
@@ -0,0 +1,41 @@
+// Author: Florian Zaruba, ETH Zurich
+// Date: 29.05.2017
+// Description: Randomized test sequence
+//
+// Copyright (C) 2017 ETH Zurich, University of Bologna
+// All rights reserved.
+// This code is under development and not yet released to the public.
+// Until it is released, the code is under the copyright of ETH Zurich and
+// the University of Bologna, and may contain confidential and/or unpublished
+// work. Any reuse/redistribution is strictly forbidden without written
+// permission from ETH Zurich.
+// Bug fixes and contributions will eventually be released under the
+// SolderPad open hardware license in the context of the PULP platform
+// (http://www.pulp-platform.org), under the copyright of ETH Zurich and the
+// University of Bologna.
+
+class store_queue_sequence  extends store_queue_if_sequence;
+
+   `uvm_object_utils(store_queue_sequence);
+
+   function new(string name = "store_queue_sequence");
+      super.new(name);
+   endfunction : new
+
+   task body();
+      store_queue_if_seq_item command;
+
+      command = store_queue_if_seq_item::type_id::create("command");
+      `uvm_info("Store Queue Sequence", "Starting store_queue sequence", UVM_LOW)
+
+      for(int i = 0; i <= 100; i++) begin
+          start_item(command);
+
+          void'(command.randomize());
+
+          finish_item(command);
+      end
+      `uvm_info("Store Queue Sequence", "Finished store_queue sequence", UVM_LOW)
+   endtask : body
+
+endclass : store_queue_sequence
\ No newline at end of file
diff --git a/tb/test/store_queue/store_queue_sequence_pkg.sv b/tb/test/store_queue/store_queue_sequence_pkg.sv
index 90e1b617d..3d7a347e7 100644
--- a/tb/test/store_queue/store_queue_sequence_pkg.sv
+++ b/tb/test/store_queue/store_queue_sequence_pkg.sv
@@ -17,9 +17,10 @@
 package store_queue_sequence_pkg;
 
     import store_queue_if_agent_pkg::*;
+    import dcache_if_agent_pkg::*;
     import uvm_pkg::*;
 
     `include "uvm_macros.svh"
-    // Include your sequences here e.g.:
-    // `include "fibonacci_sequence.svh"
+    `include "store_queue_sequence.svh"
+
 endpackage
diff --git a/tb/test/store_queue/store_queue_test.svh b/tb/test/store_queue/store_queue_test.svh
index e60d2f200..5f611ebaf 100644
--- a/tb/test/store_queue/store_queue_test.svh
+++ b/tb/test/store_queue/store_queue_test.svh
@@ -17,8 +17,7 @@
 class store_queue_test extends store_queue_test_base;
     // UVM Factory Registration Macro
     `uvm_component_utils(store_queue_test)
-    // TODO: declare sequence here
-    // store_queue_sequence store_queue;
+    store_queue_sequence store_queue;
     //------------------------------------------
     // Methods
     //------------------------------------------
@@ -34,13 +33,11 @@ class store_queue_test extends store_queue_test_base;
 
     task run_phase(uvm_phase phase);
         phase.raise_objection(this, "store_queue_test");
-        //fibonacci_sequence fibonacci;
         super.run_phase(phase);
 
-        // store_queue = new("store_queue");
-        // TODO: Start sequence here
-        // store_queue.start(sequencer_h);
-        // Testlogic goes here
+        store_queue = new("store_queue");
+        // Start sequence here
+        store_queue.start(sequencer_h);
         #100ns;
 
         phase.drop_objection(this, "store_queue_test");