diff --git a/include/ariane_pkg.svh b/include/ariane_pkg.svh index 8465360a2..826a24a5b 100644 --- a/include/ariane_pkg.svh +++ b/include/ariane_pkg.svh @@ -208,8 +208,9 @@ package ariane_pkg; // memory management, pte typedef struct packed { - logic[37:0] ppn; - logic[1:0] sw_reserved; + logic [9:0] reserved; + logic [43:0] ppn; + logic [1:0] rsw; logic d; logic a; logic g; diff --git a/src/ariane.sv b/src/ariane.sv index 14ed7e66d..e60435267 100644 --- a/src/ariane.sv +++ b/src/ariane.sv @@ -525,9 +525,13 @@ module ariane assign tracer_if.commit_ack = commit_ack; // address translation assign tracer_if.lsu_valid = ex_stage_i.lsu_i.lsu_valid_i; - assign tracer_if.translation_valid = ex_stage_i.lsu_i.mmu_i.lsu_valid_o; assign tracer_if.vaddr = ex_stage_i.lsu_i.vaddr_i; - assign tracer_if.paddr = ex_stage_i.lsu_i.mmu_i.lsu_paddr_o; + // MMU + assign tracer_if.translation_valid = ex_stage_i.lsu_i.mmu_i.lsu_dtlb_hit_o; + assign tracer_if.pte = ex_stage_i.lsu_i.mmu_i.dtlb_content; + assign tracer_if.is_2M = ex_stage_i.lsu_i.mmu_i.dtlb_is_2M; + assign tracer_if.is_1G = ex_stage_i.lsu_i.mmu_i.dtlb_is_1G; + assign tracer_if.is_store = ex_stage_i.lsu_i.mmu_i.lsu_is_store_i; // was this translation a store assign tracer_if.st_ready = ex_stage_i.lsu_i.store_unit_i.ready_o; assign tracer_if.ld_ready = ex_stage_i.lsu_i.load_unit_i.ready_o; @@ -538,6 +542,8 @@ module ariane instruction_tracer it = new (tracer_if); initial begin + #15ns; + it.create_file(cluster_id_i, core_id_i); it.trace(); end diff --git a/src/regfile.sv b/src/regfile.sv index 3ee8674c3..70799dd85 100644 --- a/src/regfile.sv +++ b/src/regfile.sv @@ -147,9 +147,7 @@ module regfile mem[0] = '0; for (int unsigned k = 1; k < NUM_WORDS; k++) begin : w_WordIter - if (~rst_n) - mem[k] = '0; - else if (mem_clocks[k] == 1'b1) + if (mem_clocks[k] == 1'b1) mem[k] = wdata_a_q; end end diff --git a/src/util/instruction_tracer.svh b/src/util/instruction_tracer.svh index d2455efe3..0c42ce331 100755 --- a/src/util/instruction_tracer.svh +++ b/src/util/instruction_tracer.svh @@ -42,10 +42,18 @@ class instruction_tracer; } store_mapping[$], load_mapping[$], address_mapping; function new(virtual instruction_tracer_if tracer_if); + this.tracer_if = tracer_if; - f = $fopen("output.txt","w"); endfunction : new + function void create_file(logic [5:0] cluster_id, logic [3:0] core_id); + string fn; + $sformat(fn, "trace_core_%h_%h.log", cluster_id, core_id); + $display("[TRACER] Output filename is: %s", fn); + + this.f = $fopen(fn,"w"); + endfunction : create_file + task trace(); fetch_entry decode_instruction, issue_instruction, issue_commit_instruction; scoreboard_entry commit_instruction; @@ -82,39 +90,24 @@ class instruction_tracer; // -------------------- // Address Translation // -------------------- - // we've got a LSU request - if (tracer_if.pck.lsu_valid) begin + // we've got a valid translation + if (tracer_if.pck.translation_valid) begin // put it in the store mapping queue if it is a store if (tracer_if.pck.is_store && tracer_if.pck.st_ready) begin + store_mapping.push_back('{ vaddr: tracer_if.pck.vaddr, - paddr: tracer_if.pck.paddr + paddr: get_paddr(tracer_if.pck.vaddr, tracer_if.pck.pte, tracer_if.pck.is_2M, tracer_if.pck.is_1G) }); // or else put it in the load mapping end else if (!tracer_if.pck.is_store && tracer_if.pck.ld_ready) begin load_mapping.push_back('{ vaddr: tracer_if.pck.vaddr, - paddr: tracer_if.pck.paddr + paddr: get_paddr(tracer_if.pck.vaddr, tracer_if.pck.pte, tracer_if.pck.is_2M, tracer_if.pck.is_1G) }); end end - if (tracer_if.pck.translation_valid) begin - // put it in the store mapping queue if it is a store - // if (tracer_if.pck.is_store && tracer_if.pck.st_ready) begin - // store_mapping.push_back('{ - // vaddr: tracer_if.pck.vaddr, - // paddr: tracer_if.pck.paddr - // }); - // // or else put it in the load mapping - // end else if (!tracer_if.pck.is_store && tracer_if.pck.ld_ready) begin - // load_mapping.push_back('{ - // vaddr: tracer_if.pck.vaddr, - // paddr: tracer_if.pck.paddr - // }); - // end - end - // -------------- // Commit // -------------- @@ -166,6 +159,18 @@ class instruction_tracer; end endtask + // Calculate the physical address given the values retrieved from the TLB + function logic [63:0] get_paddr (logic [63:0] vaddr, pte_t pte, logic is_2M, logic is_1G); + + if (is_2M) + return {pte.ppn[43:9], vaddr[20:0]}; + if (is_2M) + return {pte.ppn[43:18], vaddr[29:0]}; + + return {pte.ppn, vaddr[11:0]}; + + endfunction; + // flush all decoded instructions function void flushDecode (); decode_queue = {}; diff --git a/src/util/instruction_tracer_if.sv b/src/util/instruction_tracer_if.sv index 0453f2e60..2f99487be 100755 --- a/src/util/instruction_tracer_if.sv +++ b/src/util/instruction_tracer_if.sv @@ -41,9 +41,13 @@ interface instruction_tracer_if ( logic commit_ack; // address translation logic lsu_valid; + // mmu logic translation_valid; logic [63:0] vaddr; - logic [63:0] paddr; + pte_t pte; + logic is_2M; + logic is_1G; + // lsu logic is_store; logic st_ready; logic ld_ready; @@ -51,8 +55,8 @@ interface instruction_tracer_if ( exception exception; // the tracer just has a passive interface we do not drive anything with it clocking pck @(posedge clk); - input rstn, flush_unissued, flush, fetch, fetch_valid, fetch_ack, issue_ack, issue_sbe, waddr, lsu_valid, - wdata, we, commit_instr, commit_ack, translation_valid, vaddr, paddr, is_store, st_ready, ld_ready, exception; + input rstn, flush_unissued, flush, fetch, fetch_valid, fetch_ack, issue_ack, issue_sbe, waddr, lsu_valid, pte, is_2M, is_1G, + wdata, we, commit_instr, commit_ack, translation_valid, vaddr, is_store, st_ready, ld_ready, exception; endclocking endinterface