diff --git a/bootrom/Makefile b/bootrom/Makefile index dea9101bd..aebbcbbb7 100644 --- a/bootrom/Makefile +++ b/bootrom/Makefile @@ -1,4 +1,4 @@ -bootrom_img = bootrom.img bootrom.elf +bootrom_img = bootrom.img GCC=riscv64-unknown-elf-gcc OBJCOPY=riscv64-unknown-elf-objcopy diff --git a/bootrom/bootrom.hex b/bootrom/bootrom.hex deleted file mode 100644 index e4ad65ba2..000000000 --- a/bootrom/bootrom.hex +++ /dev/null @@ -1,256 +0,0 @@ -01f414130010041b -00000597f1402573 -0000840207458593 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -00000597f1402573 -1050007303c58593 -000000000000bff5 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -73656f6720425444 -0000006572656820 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 -0000000000000000 diff --git a/bootrom/bootrom.sv b/bootrom/bootrom.sv index ae2f5c3de..f05c4032d 100644 --- a/bootrom/bootrom.sv +++ b/bootrom/bootrom.sv @@ -8,22 +8,18 @@ * CONDITIONS OF ANY KIND, either express or implied. See the License for the * specific language governing permissions and limitations under the License. * - * File: bootrom.v - * Author: Florian Zaruba - * Date: 10.7.2018 + * File: $filename.v * - * Description: First-stage Boot-loader + * Description: Auto-generated bootrom */ -// TODO(zarubaf) Auto-generate this! - module bootrom ( input logic clk_i, input logic req_i, input logic [63:0] addr_i, output logic [63:0] rdata_o ); - localparam int RomSize = 32; + localparam int RomSize = 16; const logic [RomSize-1:0][63:0] mem = { 64'h00000000_00000000, diff --git a/bootrom/gen_rom.py b/bootrom/gen_rom.py old mode 100644 new mode 100755 index 48f4fc941..886b97b41 --- a/bootrom/gen_rom.py +++ b/bootrom/gen_rom.py @@ -1,6 +1,25 @@ #!/usr/bin/env python3 -license = """ +from string import Template +import argparse +import os.path +import sys + +parser = argparse.ArgumentParser(description='Convert binary file to verilog rom') +parser.add_argument('filename', metavar='filename', nargs=1, + help='filename of input binary') + +args = parser.parse_args() +file = args.filename[0]; + +# check that file exists +if not os.path.isfile(file): + print("File {} does not exist.".format(filename)) + sys.exit(1) + +filename = os.path.splitext(file)[0] + +license = """\ /* Copyright 2018 ETH Zurich and University of Bologna. * Copyright and related rights are licensed under the Solderpad Hardware * License, Version 0.51 (the “License”); you may not use this file except in @@ -11,8 +30,83 @@ license = """ * CONDITIONS OF ANY KIND, either express or implied. See the License for the * specific language governing permissions and limitations under the License. * - * File: bootrom.v + * File: $filename.v * * Description: Auto-generated bootrom */ + +// Auto-generated code """ + +module = """\ +module $filename ( + input logic clk_i, + input logic req_i, + input logic [63:0] addr_i, + output logic [63:0] rdata_o +); + localparam int RomSize = $size; + + const logic [RomSize-1:0][63:0] mem = { + $content + }; + + logic [$$clog2(RomSize)-1:0] addr_q; + + always_ff @(posedge clk_i) begin + if (req_i) begin + addr_q = addr_i[$$clog2(RomSize)-1+3:3]; + end + end + + assign rdata_o = mem[addr_q]; +endmodule +""" + +rom = [] + +with open(filename + ".img", "rb") as f: + byte = True; + while byte: + word = "" + # read 64-bit a.k.a 8 byte + for i in range(0, 8): + byte = f.read(1) + if i == 4: + word = "_" + word + if byte: + word = byte.hex() + word + # fill up with zeros if unaligned + else: + pass + # word += "00"; + + if word != "_": + word = "64'h" + word + # print(word) + rom.append(word) + f.close() + + +rom.reverse() + +# open file for writing +with open(filename + ".sv", "w") as f: + + # some string preparations + rom_str = "" + i = 0 + for r in rom: + i += 1 + rom_str += r + ",\n "; + + rom_str.rstrip() + # strip the last whitespace + rom_str = rom_str[:-10] + + # write files + f.write(license) + s = Template(module) + f.write(s.substitute(filename=filename, size=i, content=rom_str)) + + f.close() diff --git a/src/debug/debug_rom/.gitignore b/src/debug/debug_rom/.gitignore new file mode 100644 index 000000000..e04ab7323 --- /dev/null +++ b/src/debug/debug_rom/.gitignore @@ -0,0 +1,3 @@ +*.bin +*.elf +debug_rom.img diff --git a/src/debug/debug_rom/Makefile b/src/debug/debug_rom/Makefile index 46f5e811f..fecac9d5a 100644 --- a/src/debug/debug_rom/Makefile +++ b/src/debug/debug_rom/Makefile @@ -1,31 +1,21 @@ # See LICENSE.SiFive for license details -# Recursive make is bad, but in this case we're cross compiling which is a -# pretty unusual use case. -CC = $(RISCV)/bin/riscv64-unknown-elf-gcc -OBJCOPY = $(RISCV)/bin/riscv64-unknown-elf-objcopy +debug_rom = debug_rom.img -COMPILE = $(CC) -nostdlib -nostartfiles -I$(RISCV)/include/ -Tlink.ld +GCC=riscv64-unknown-elf-gcc +OBJCOPY=riscv64-unknown-elf-objcopy -ELFS = debug_rom -DEPS = debug_rom.S link.ld +all: $(debug_rom) -all: $(patsubst %,%.h,$(ELFS)) +%.img: %.bin + dd if=$< of=$@ bs=128 count=2 -publish: debug_rom.scala - mv $< ../../src/main/scala/uncore/devices/debug/DebugRomContents.scala +%.bin: %.elf + $(OBJCOPY) -O binary $< $@ -%.scala: %.raw - xxd -i $^ | sed -e "s/^unsigned char debug_rom_raw\[\] = {/\/\/ This file was auto-generated by 'make publish' in debug\/ directory.\n\npackage uncore.devices\n\nobject DebugRomContents {\n\n def apply() : Array[Byte] = { Array (/" \ - -e "s/};/ ).map(_.toByte) }\n\n}/" \ - -e "s/^unsigned int debug_rom_raw_len.*//" > $@ - - -%.raw: % - $(OBJCOPY) -O binary --only-section .text $^ $@ - -debug_rom: $(DEPS) - $(COMPILE) -o $@ $^ +%.elf: %.S link.ld + $(GCC) -I$(RISCV)/include -Tlink.ld $< -nostdlib -static -Wl,--no-gc-sections -o $@ clean: - rm -f $(ELFS) debug_rom*.raw debug_rom*.h + rm $(debug_rom) + diff --git a/src/debug/debug_rom/debug_rom.sv b/src/debug/debug_rom/debug_rom.sv new file mode 100644 index 000000000..9653ac013 --- /dev/null +++ b/src/debug/debug_rom/debug_rom.sv @@ -0,0 +1,49 @@ +/* Copyright 2018 ETH Zurich and University of Bologna. + * Copyright and related rights are licensed under the Solderpad Hardware + * License, Version 0.51 (the “License”); you may not use this file except in + * compliance with the License. You may obtain a copy of the License at + * http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law + * or agreed to in writing, software, hardware and materials distributed under + * this License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR + * CONDITIONS OF ANY KIND, either express or implied. See the License for the + * specific language governing permissions and limitations under the License. + * + * File: $filename.v + * + * Description: Auto-generated bootrom + */ + +// Auto-generated code +module debug_rom ( + input logic clk_i, + input logic req_i, + input logic [63:0] addr_i, + output logic [63:0] rdata_o +); + localparam int RomSize = 12; + + const logic [RomSize-1:0][63:0] mem = { + 64'h7b200073_7b202473, + 64'h10802423_f1402473, + 64'h30000067_10002223, + 64'h7b202473_00100073, + 64'h10002623_fddff06f, + 64'hfc0418e3_00247413, + 64'h40044403_f1402473, + 64'h02041063_00147413, + 64'h40044403_10802023, + 64'hf1402473_7b241073, + 64'h0ff0000f_0340006f, + 64'h04c0006f_00c0006f + }; + + logic [$clog2(RomSize)-1:0] addr_q; + + always_ff @(posedge clk_i) begin + if (req_i) begin + addr_q = addr_i[$clog2(RomSize)-1+3:3]; + end + end + + assign rdata_o = mem[addr_q]; +endmodule diff --git a/src/debug/debug_rom/gen_rom.py b/src/debug/debug_rom/gen_rom.py new file mode 120000 index 000000000..7f92eadd0 --- /dev/null +++ b/src/debug/debug_rom/gen_rom.py @@ -0,0 +1 @@ +../../../bootrom/gen_rom.py \ No newline at end of file diff --git a/src/debug/dm_pkg.sv b/src/debug/dm_pkg.sv index 571732751..a048a87e1 100644 --- a/src/debug/dm_pkg.sv +++ b/src/debug/dm_pkg.sv @@ -22,6 +22,15 @@ package dm; parameter logic [4:0] ProgBufSize = 5'h4; // amount of data count registers implemented parameter logic [3:0] DataCount = 5'h0; + + // #define HALTED 0x100 + // #define GOING 0x104 + // #define RESUMING 0x108 + // #define EXCEPTION 0x10C + // #define FLAGS 0x400 + // #define FLAG_GO 0 + // #define FLAG_RESUME 1 + // debug registers typedef enum logic [7:0] { Data0 = 8'h04,