diff --git a/Makefile b/Makefile
index 65f0160e6..645da3307 100644
--- a/Makefile
+++ b/Makefile
@@ -37,7 +37,9 @@ riscv-tests = rv64ui-p-add rv64ui-p-addi rv64ui-p-slli rv64ui-p-addiw rv64ui-p-a
 				rv64ui-p-simple rv64ui-p-jal rv64ui-p-jalr rv64ui-p-or rv64ui-p-ori rv64ui-p-sub rv64ui-p-subw \
 				rv64ui-p-xor rv64ui-p-xori rv64ui-p-slliw rv64ui-p-sll rv64ui-p-slli rv64ui-p-sllw \
 				rv64ui-p-slt rv64ui-p-slti rv64ui-p-sltiu rv64ui-p-sltu rv64ui-p-sra rv64ui-p-srai \
-				rv64ui-p-sraiw rv64ui-p-sraw rv64ui-p-srl rv64ui-p-srli rv64ui-p-srliw rv64ui-p-srlw
+				rv64ui-p-sraiw rv64ui-p-sraw rv64ui-p-srl rv64ui-p-srli rv64ui-p-srliw rv64ui-p-srlw \
+				rv64ui-p-lb rv64ui-p-lbu rv64ui-p-ld rv64ui-p-lh rv64ui-p-lhu rv64ui-p-lui \
+				rv64ui-p-lw rv64ui-p-lwu
 
 riscv-test = rv64ui-p-add
 # Search here for include files (e.g.: non-standalone components)
diff --git a/README.md b/README.md
index a10da3434..11e1b849a 100644
--- a/README.md
+++ b/README.md
@@ -43,14 +43,14 @@ Check out the [contribution guide](CONTRIBUTING.md)
 
 | **Test Name** |      **P/F/U**       | **Test Name** |      **P/F/U**       | **Test Name** |     **P/F/U**      |
 |---------------|----------------------|---------------|----------------------|---------------|--------------------|
-| add           | :white_check_mark:   | lb            | :x:                  | sll           | :white_check_mark: |
-| addi          | :white_check_mark:   | lbu           | :white_large_square: | slli          | :white_check_mark: |
-| addiw         | :white_check_mark:   | ld            | :white_large_square: | slliw         | :white_check_mark: |
-| addw          | :white_check_mark:   | lh            | :white_large_square: | sllw          | :white_check_mark: |
-| and           | :white_check_mark:   | lhu           | :white_large_square: | slt           | :white_check_mark: |
-| andi          | :white_check_mark:   | lui           | :white_large_square: | slti          | :white_check_mark: |
-| auipc         | :white_check_mark:   | lw            | :white_large_square: | sltiu         | :white_check_mark: |
-| beq           | :white_check_mark:   | lwu           | :white_large_square: | sltu          | :white_check_mark: |
+| add           | :white_check_mark:   | lb            | :white_check_mark:   | sll           | :white_check_mark: |
+| addi          | :white_check_mark:   | lbu           | :white_check_mark:   | slli          | :white_check_mark: |
+| addiw         | :white_check_mark:   | ld            | :white_check_mark:   | slliw         | :white_check_mark: |
+| addw          | :white_check_mark:   | lh            | :white_check_mark:   | sllw          | :white_check_mark: |
+| and           | :white_check_mark:   | lhu           | :white_check_mark:   | slt           | :white_check_mark: |
+| andi          | :white_check_mark:   | lui           | :white_check_mark:   | slti          | :white_check_mark: |
+| auipc         | :white_check_mark:   | lw            | :white_check_mark:   | sltiu         | :white_check_mark: |
+| beq           | :white_check_mark:   | lwu           | :white_check_mark:   | sltu          | :white_check_mark: |
 | bge           | :white_check_mark:   | or            | :white_check_mark:   | sra           | :white_check_mark: |
 | bgeu          | :white_check_mark:   | ori           | :white_check_mark:   | srai          | :white_check_mark: |
 | blt           | :white_check_mark:   | sb            | :white_large_square: | sraiw         | :white_check_mark: |
diff --git a/src/decoder.sv b/src/decoder.sv
index 011b5bc48..8f11706ae 100644
--- a/src/decoder.sv
+++ b/src/decoder.sv
@@ -334,7 +334,7 @@ module decoder (
                         3'b101:
                             instruction_o.op  = LHU;
                         3'b110:
-                            instruction_o.op  = LW;
+                            instruction_o.op  = LWU;
                         3'b011:
                             instruction_o.op  = LD;
                         default:
diff --git a/src/lsu.sv b/src/lsu.sv
index a28baf477..323dc2a0e 100644
--- a/src/lsu.sv
+++ b/src/lsu.sv
@@ -341,9 +341,9 @@ module lsu #(
             // check the operator to activate the right functional unit accordingly
             unique case (fu)
                 // all loads go here
-                LOAD:  ld_valid_i = 1'b1;
+                LOAD:  ld_valid_i = lsu_valid_i;
                 // all stores go here
-                STORE: st_valid_i = 1'b1;
+                STORE: st_valid_i = lsu_valid_i;
                 // not relevant for the LSU
                 default: ;
             endcase
diff --git a/src/scoreboard.sv b/src/scoreboard.sv
index 2f085aee2..55bd1fdef 100644
--- a/src/scoreboard.sv
+++ b/src/scoreboard.sv
@@ -77,7 +77,7 @@ module scoreboard #(
     logic                          issue_full;
 
     // the issue queue is full don't issue any new instructions
-    assign issue_full = (issue_cnt_q == NR_ENTRIES);
+    assign issue_full = (issue_cnt_q == NR_ENTRIES-1);
     assign full_o     = issue_full;
     // output commit instruction directly
     assign commit_instr_o = mem_q[commit_pointer_q].sbe;