From bea9d5d1e6ba0c6bfff43d346563b7544726300b Mon Sep 17 00:00:00 2001
From: Yannick Casamatta <yannick.casamatta@thalesgroup.com>
Date: Thu, 27 Jan 2022 11:43:03 +0100
Subject: [PATCH] `Flist.cv64a6_imafdc_sv39_gate` and update `LIB_VERILOG` path
 (#804)

---
 core/Flist.cv64a6_imafdc_sv39_gate | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/core/Flist.cv64a6_imafdc_sv39_gate b/core/Flist.cv64a6_imafdc_sv39_gate
index c87eb8537..20f4ab47d 100644
--- a/core/Flist.cv64a6_imafdc_sv39_gate
+++ b/core/Flist.cv64a6_imafdc_sv39_gate
@@ -22,6 +22,6 @@ ${CVA6_REPO_DIR}/core/include/std_cache_pkg.sv
 ${CVA6_REPO_DIR}/core/include/axi_intf.sv
 ${CVA6_REPO_DIR}/core/include/instr_tracer_pkg.sv
 
-${CVA6_REPO_DIR}/${LIB_VERILOG}
+${LIB_VERILOG}
 ${CVA6_REPO_DIR}/pd/synth/ariane_synth_modified.v
 ${CVA6_REPO_DIR}/pd/synth/SyncSpRamBeNx64_1.sv