diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 0f9d156d9..ba9980549 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -272,7 +272,7 @@ asic-synthesis: - echo $PERIOD - echo $DV_TARGET - source ./verif/sim/setup-env.sh - - git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} + - git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} -b ${SYNTH_SCRIPT_BRANCH} - cp -r ${SYNTH_SCRIPT_PATH}/cva6/ ../ - git apply ${SYNTH_SCRIPT_PATH}/patches/*.patch - echo $SYN_DCSHELL_BASHRC; source $SYN_DCSHELL_BASHRC @@ -526,6 +526,7 @@ simu-gate: matrix: - SIMU_PERIOD: ["20"] # 50 Mhz PERIOD: ["15"] # 66 Mhz + PROG_NAME: "dhrystone" variables: DASHBOARD_JOB_TITLE: "Gate Level Simulation $DV_TARGET" DASHBOARD_JOB_DESCRIPTION: "Tests to check netlist from ASIC synthesis and power consumption over different patterns" @@ -533,12 +534,13 @@ simu-gate: DASHBOARD_JOB_CATEGORY: "Post Synthesis" DV_TARGET: cv32a65x TARGET: $DV_TARGET + SPIKE_TANDEM: 1 script: - git -C verif/core-v-verif fetch --unshallow - !reference [.copy_spike_artifacts] - echo $PERIOD - source ./verif/sim/setup-env.sh - - git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} + - git clone ${SYNTH_SCRIPT} ${SYNTH_SCRIPT_PATH} -b ${SYNTH_SCRIPT_BRANCH} - cp -r ${SYNTH_SCRIPT_PATH}/cva6/ ../ - git apply ${SYNTH_SCRIPT_PATH}/patches/*.patch - source verif/regress/install-riscv-tests.sh @@ -548,6 +550,7 @@ simu-gate: - mkdir -p pd/synth/cva6_${DV_TARGET}/outputs/ - python3 ${SYNTH_SCRIPT_PATH}/scharm -p configs/modules/CVA6.yml --runner=True --compaign="simu-gate" --name=$PROG_NAME - mv ${SYNTH_SCRIPT_PATH}/artifacts/ artifacts/artifacts_gate/ + - rm artifacts/artifacts_gate/*/build/*.fsdb after_script: *simu_after_script fpga-boot: diff --git a/.gitlab-ci/expected_synth.yml b/.gitlab-ci/expected_synth.yml index feb3a651d..53336afdb 100644 --- a/.gitlab-ci/expected_synth.yml +++ b/.gitlab-ci/expected_synth.yml @@ -1,2 +1,2 @@ cv32a65x: - gates: 171804 + gates: 176232 diff --git a/core/cva6.sv b/core/cva6.sv index c2f6e62f4..c845a644d 100644 --- a/core/cva6.sv +++ b/core/cva6.sv @@ -27,7 +27,7 @@ module cva6 parameter type rvfi_probes_instr_t = `RVFI_PROBES_INSTR_T(CVA6Cfg), parameter type rvfi_probes_csr_t = `RVFI_PROBES_CSR_T(CVA6Cfg), parameter type rvfi_probes_t = struct packed { - logic csr; + rvfi_probes_csr_t csr; rvfi_probes_instr_t instr; },