diff --git a/core/cvxif_issue_register_commit_if_driver.sv b/core/cvxif_issue_register_commit_if_driver.sv
index 88efc0002..8513c19f1 100644
--- a/core/cvxif_issue_register_commit_if_driver.sv
+++ b/core/cvxif_issue_register_commit_if_driver.sv
@@ -53,9 +53,7 @@ module cvxif_issue_register_commit_if_driver #(
     register_o.rs_valid = rs_valid_i;
   end
 
-  /* WARNING */
-  // Always commit since speculation in execute in not possible : TODO to be verified
-
+  // Always commit since speculation in execute in not possible
   // Always do commit transaction with issue
   // If instruction goes to execute then it is not speculative
   assign commit_valid_o       = issue_valid_o && issue_ready_i;
diff --git a/core/decoder.sv b/core/decoder.sv
index 2090ec42f..f986557df 100644
--- a/core/decoder.sv
+++ b/core/decoder.sv
@@ -192,7 +192,7 @@ module decoder
         riscv::OpcodeSystem: begin
           instruction_o.fu = CSR;
           instruction_o.rs1 = instr.itype.rs1;
-          instruction_o.rs2 = instr.rtype.rs2;   //TODO: needs to be checked if better way is available
+          instruction_o.rs2 = instr.rtype.rs2;   //IMPROVEMENT: needs to be checked if better way is available
           instruction_o.rd = instr.itype.rd;
 
           unique case (instr.itype.funct3)