diff --git a/Makefile b/Makefile
index 77565a743..d7f7a0901 100644
--- a/Makefile
+++ b/Makefile
@@ -140,6 +140,7 @@ endif
 
 # this list contains the standalone components
 src :=  corev_apu/tb/axi_adapter.sv                                                  \
+        corev_apu/tb/ariane.sv                                                       \
         $(wildcard corev_apu/bootrom/*.sv)                                           \
         $(wildcard corev_apu/clint/*.sv)                                             \
         $(wildcard corev_apu/fpga/src/axi2apb/src/*.sv)                              \
diff --git a/core/Flist.cva6 b/core/Flist.cva6
index 3b2576149..59eb2c684 100644
--- a/core/Flist.cva6
+++ b/core/Flist.cva6
@@ -98,7 +98,6 @@ ${CVA6_REPO_DIR}/vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/nrbd_nrsc_m
 ${CVA6_REPO_DIR}/vendor/pulp-platform/fpnew/src/fpu_div_sqrt_mvp/hdl/preprocess_mvp.sv
 
 // Top-level source files (not necessarily instantiated at the top of the cva6).
-${CVA6_REPO_DIR}/core/ariane.sv
 ${CVA6_REPO_DIR}/core/cva6.sv
 ${CVA6_REPO_DIR}/core/alu.sv
 // Note: depends on fpnew_pkg, above
diff --git a/core/cva6.sv b/core/cva6.sv
index e7ea42daf..c296de377 100644
--- a/core/cva6.sv
+++ b/core/cva6.sv
@@ -46,26 +46,17 @@ module cva6 import ariane_pkg::*; #(
   // Timer facilities
   input  logic                         time_irq_i,   // timer interrupt in (async)
   input  logic                         debug_req_i,  // debug request (async)
-`ifdef FIRESIM_TRACE
-  // firesim trace port
-  output traced_instr_pkg::trace_port_t trace_o,
-`endif
-`ifdef RVFI_TRACE
   // RISC-V formal interface port (`rvfi`):
   // Can be left open when formal tracing is not needed.
   output ariane_rvfi_pkg::rvfi_port_t  rvfi_o,
-`endif
   output cvxif_pkg::cvxif_req_t        cvxif_req_o,
   input  cvxif_pkg::cvxif_resp_t       cvxif_resp_i,
-`ifdef PITON_ARIANE
   // L15 (memory side)
   output wt_cache_pkg::l15_req_t       l15_req_o,
-  input  wt_cache_pkg::l15_rtrn_t      l15_rtrn_i
-`else
+  input  wt_cache_pkg::l15_rtrn_t      l15_rtrn_i,
   // memory side, AXI Master
   output axi_req_t                     axi_req_o,
   input  axi_rsp_t                     axi_resp_i
-`endif
 );
 
   // ------------------------------------------
diff --git a/core/ariane.sv b/corev_apu/tb/ariane.sv
similarity index 92%
rename from core/ariane.sv
rename to corev_apu/tb/ariane.sv
index 222cb715d..3c45d0fe2 100644
--- a/core/ariane.sv
+++ b/corev_apu/tb/ariane.sv
@@ -78,18 +78,21 @@ module ariane import ariane_pkg::*; #(
     .ipi_i                ( ipi_i                     ),
     .time_irq_i           ( time_irq_i                ),
     .debug_req_i          ( debug_req_i               ),
-`ifdef FIRESIME_TRACE
-    .trace_o              ( trace_o                   ),
-`endif
 `ifdef RVFI_TRACE
     .rvfi_o               ( rvfi_o                    ),
+`else
+    .rvfi_o               (                           ),
 `endif
     .cvxif_req_o          ( cvxif_req                 ),
     .cvxif_resp_i         ( cvxif_resp                ),
 `ifdef PITON_ARIANE
     .l15_req_o            ( l15_req_o                 ),
-    .l15_rtrn_i           ( l15_rtrn_i                )
+    .l15_rtrn_i           ( l15_rtrn_i                ),
+    .axi_req_o            (                           ),
+    .axi_resp_i           ( '0                        )
 `else
+    .l15_req_o            (                           ),
+    .l15_rtrn_i           ( '0                        ),
     .axi_req_o            ( axi_req_o                 ),
     .axi_resp_i           ( axi_resp_i                )
 `endif