diff --git a/core/cva6_iti/instr_to_trace.sv b/core/cva6_iti/instr_to_trace.sv index 9f554f8d9..a1d22a692 100644 --- a/core/cva6_iti/instr_to_trace.sv +++ b/core/cva6_iti/instr_to_trace.sv @@ -9,26 +9,25 @@ //Systollic module used to determines the iaddr, ilastsize, iretire for Encoder Module -module instr_to_trace -#( +module instr_to_trace #( parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty, parameter type uop_entry_t = logic, parameter type itt_out_t = logic, - parameter CAUSE_LEN = 5, //Size is ecause_width_p in the E-Trace SPEC - parameter ITYPE_LEN = 3, //Size is itype_width_p in the E-Trace SPEC (3 or 4) - parameter IRETIRE_LEN = 32 //Size is iretire_width_p in the E-Trace SPEC -)( - input uop_entry_t uop_entry_i, - input logic [CAUSE_LEN-1:0] cause_i, - input logic [CVA6Cfg.XLEN-1:0] tval_i, - input logic [IRETIRE_LEN-1:0] counter_i, - input logic [CVA6Cfg.XLEN-1:0] iaddr_i, - input logic was_special_i, + parameter CAUSE_LEN = 5, //Size is ecause_width_p in the E-Trace SPEC + parameter ITYPE_LEN = 3, //Size is itype_width_p in the E-Trace SPEC (3 or 4) + parameter IRETIRE_LEN = 32 //Size is iretire_width_p in the E-Trace SPEC +) ( + input uop_entry_t uop_entry_i, + input logic [ CAUSE_LEN-1:0] cause_i, + input logic [CVA6Cfg.XLEN-1:0] tval_i, + input logic [ IRETIRE_LEN-1:0] counter_i, + input logic [CVA6Cfg.XLEN-1:0] iaddr_i, + input logic was_special_i, - output itt_out_t itt_out_o, - output logic [IRETIRE_LEN-1:0] counter_o, - output logic [CVA6Cfg.XLEN-1:0] iaddr_o, - output logic is_special_o + output itt_out_t itt_out_o, + output logic [ IRETIRE_LEN-1:0] counter_o, + output logic [CVA6Cfg.XLEN-1:0] iaddr_o, + output logic is_special_o ); logic special_inst; @@ -45,52 +44,52 @@ module instr_to_trace itt_out_o = '0; if (uop_entry_i.valid) begin - counter_o = uop_entry_i.compressed ? counter_i + 1 : counter_i + 2; + counter_o = uop_entry_i.compressed ? counter_i + 1 : counter_i + 2; - if (was_special_i) begin - counter_o = 0; - iaddr_o = uop_entry_i.pc; - is_special_o = 1'b0; - end + if (was_special_i) begin + counter_o = 0; + iaddr_o = uop_entry_i.pc; + is_special_o = 1'b0; + end - if (special_inst) begin - itt_out_o.valid = 1'b1; - itt_out_o.iretire = uop_entry_i.compressed ? counter_o + 1 : counter_o + 2; - itt_out_o.itype = uop_entry_i.itype; - itt_out_o.ilastsize = ~uop_entry_i.compressed; - itt_out_o.iaddr = iaddr_o; - itt_out_o.priv = uop_entry_i.priv; - itt_out_o.cycles = uop_entry_i.cycles; - itt_out_o.cause = '0; - itt_out_o.tval = '0; - is_special_o = 1'b1; - end + if (special_inst) begin + itt_out_o.valid = 1'b1; + itt_out_o.iretire = uop_entry_i.compressed ? counter_o + 1 : counter_o + 2; + itt_out_o.itype = uop_entry_i.itype; + itt_out_o.ilastsize = ~uop_entry_i.compressed; + itt_out_o.iaddr = iaddr_o; + itt_out_o.priv = uop_entry_i.priv; + itt_out_o.cycles = uop_entry_i.cycles; + itt_out_o.cause = '0; + itt_out_o.tval = '0; + is_special_o = 1'b1; + end - if (interrupt) begin - itt_out_o.valid = 1'b1; - itt_out_o.iretire = uop_entry_i.compressed ? 1 : 2; - itt_out_o.itype = uop_entry_i.itype; - itt_out_o.ilastsize = ~uop_entry_i.compressed; - itt_out_o.iaddr = uop_entry_i.pc; - itt_out_o.priv = uop_entry_i.priv; - itt_out_o.cycles = uop_entry_i.cycles; - itt_out_o.cause = cause_i; - itt_out_o.tval = '0; - is_special_o = 1'b1; - end + if (interrupt) begin + itt_out_o.valid = 1'b1; + itt_out_o.iretire = uop_entry_i.compressed ? 1 : 2; + itt_out_o.itype = uop_entry_i.itype; + itt_out_o.ilastsize = ~uop_entry_i.compressed; + itt_out_o.iaddr = uop_entry_i.pc; + itt_out_o.priv = uop_entry_i.priv; + itt_out_o.cycles = uop_entry_i.cycles; + itt_out_o.cause = cause_i; + itt_out_o.tval = '0; + is_special_o = 1'b1; + end - if(exception) begin - itt_out_o.valid = 1'b1; - itt_out_o.iretire = uop_entry_i.compressed ? 1 : 2; - itt_out_o.itype = uop_entry_i.itype; - itt_out_o.ilastsize = ~uop_entry_i.compressed; - itt_out_o.iaddr = uop_entry_i.pc; - itt_out_o.priv = uop_entry_i.priv; - itt_out_o.cycles = uop_entry_i.cycles; - itt_out_o.cause = cause_i; - itt_out_o.tval = tval_i; - is_special_o = 1'b1; - end + if (exception) begin + itt_out_o.valid = 1'b1; + itt_out_o.iretire = uop_entry_i.compressed ? 1 : 2; + itt_out_o.itype = uop_entry_i.itype; + itt_out_o.ilastsize = ~uop_entry_i.compressed; + itt_out_o.iaddr = uop_entry_i.pc; + itt_out_o.priv = uop_entry_i.priv; + itt_out_o.cycles = uop_entry_i.cycles; + itt_out_o.cause = cause_i; + itt_out_o.tval = tval_i; + is_special_o = 1'b1; + end end end -endmodule \ No newline at end of file +endmodule diff --git a/core/cva6_iti/iti.sv b/core/cva6_iti/iti.sv index 67a9d6c09..b56eff0c6 100644 --- a/core/cva6_iti/iti.sv +++ b/core/cva6_iti/iti.sv @@ -11,9 +11,9 @@ module cva6_iti #( parameter config_pkg::cva6_cfg_t CVA6Cfg = config_pkg::cva6_cfg_empty, - parameter CAUSE_LEN = 5, //Size is ecause_width_p in the E-Trace SPEC - parameter ITYPE_LEN = 3, //Size is itype_width_p in the E-Trace SPEC (3 or 4) - parameter IRETIRE_LEN = 32, //Size is iretire_width_p in the E-Trace SPEC + parameter CAUSE_LEN = 5, //Size is ecause_width_p in the E-Trace SPEC + parameter ITYPE_LEN = 3, //Size is itype_width_p in the E-Trace SPEC (3 or 4) + parameter IRETIRE_LEN = 32, //Size is iretire_width_p in the E-Trace SPEC parameter type rvfi_to_iti_t = logic, parameter type iti_to_encoder_t = logic ) ( @@ -30,7 +30,7 @@ module cva6_iti #( // pragma translate_off int f; initial begin - f = $fopen("iti.trace","w"); + f = $fopen("iti.trace", "w"); end final $fclose(f); // pragma translate_on @@ -53,8 +53,8 @@ module cva6_iti #( logic ilastsize; logic [CVA6Cfg.XLEN-1:0] iaddr; riscv::priv_lvl_t priv; - logic [CAUSE_LEN-1:0] cause; - logic [CVA6Cfg.XLEN-1:0] tval; + logic [CAUSE_LEN-1:0] cause; + logic [CVA6Cfg.XLEN-1:0] tval; logic [63:0] cycles; }; @@ -71,8 +71,8 @@ module cva6_iti #( logic [CVA6Cfg.NrCommitPorts-1:0][IRETIRE_LEN-1:0] counter_itt; logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] addr_itt; logic [CVA6Cfg.NrCommitPorts-1:0] special_itt; - logic [CVA6Cfg.NrCommitPorts-1:0][CAUSE_LEN-1:0] cause_itt ; - logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] tval_itt ; + logic [CVA6Cfg.NrCommitPorts-1:0][CAUSE_LEN-1:0] cause_itt; + logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] tval_itt; logic [CVA6Cfg.NrCommitPorts-1:0][IRETIRE_LEN-1:0] counter; logic [CVA6Cfg.NrCommitPorts-1:0][CVA6Cfg.XLEN-1:0] addr; @@ -94,38 +94,38 @@ module cva6_iti #( ); // Adding this to ensure that interuption/exception happen only in commit port 0 of cva6 - assign cause_itt[i] = i==0 ? rvfi_to_iti_i.cause[CAUSE_LEN-1:0] : '0; - assign tval_itt[i] = i==0 ? rvfi_to_iti_i.tval : '0; + assign cause_itt[i] = i == 0 ? rvfi_to_iti_i.cause[CAUSE_LEN-1:0] : '0; + assign tval_itt[i] = i == 0 ? rvfi_to_iti_i.tval : '0; // Systolic logic (First itt is connected to D Flip-Flop to continue computation if needed) - assign counter_itt[i] = i==0 ? counter_q : counter[i-1]; - assign addr_itt[i] = i==0 ? addr_q : addr[i-1]; - assign special_itt[i] = i==0 ? special_q : special[i-1]; + assign counter_itt[i] = i == 0 ? counter_q : counter[i-1]; + assign addr_itt[i] = i == 0 ? addr_q : addr[i-1]; + assign special_itt[i] = i == 0 ? special_q : special[i-1]; - instr_to_trace #( - .CVA6Cfg(CVA6Cfg), - .uop_entry_t(uop_entry_t), - .itt_out_t(itt_out_t), - .CAUSE_LEN(CAUSE_LEN), - .ITYPE_LEN(ITYPE_LEN), - .IRETIRE_LEN(IRETIRE_LEN) + instr_to_trace #( + .CVA6Cfg(CVA6Cfg), + .uop_entry_t(uop_entry_t), + .itt_out_t(itt_out_t), + .CAUSE_LEN(CAUSE_LEN), + .ITYPE_LEN(ITYPE_LEN), + .IRETIRE_LEN(IRETIRE_LEN) ) i_instr_to_trace ( - .uop_entry_i(uop_entry[i]), - .cause_i(cause_itt[i]), - .tval_i(tval_itt[i]), - .counter_i(counter_itt[i]), - .iaddr_i(addr_itt[i]), - .was_special_i(special_itt[i]), - .itt_out_o(itt_out[i]), - .counter_o(counter[i]), - .iaddr_o(addr[i]), - .is_special_o(special[i]) + .uop_entry_i(uop_entry[i]), + .cause_i(cause_itt[i]), + .tval_i(tval_itt[i]), + .counter_i(counter_itt[i]), + .iaddr_i(addr_itt[i]), + .was_special_i(special_itt[i]), + .itt_out_o(itt_out[i]), + .counter_o(counter[i]), + .iaddr_o(addr[i]), + .is_special_o(special[i]) ); end always_comb begin - iti_to_encoder_o.cause = '0; - iti_to_encoder_o.tval = '0; + iti_to_encoder_o.cause = '0; + iti_to_encoder_o.tval = '0; for (int i = 0; i < CVA6Cfg.NrCommitPorts; i++) begin uop_entry[i].valid = valid_i[i]; uop_entry[i].pc = rvfi_to_iti_i.pc[i]; @@ -145,14 +145,14 @@ module cva6_iti #( iti_to_encoder_o.iretire[i] = itt_out[i].iretire; iti_to_encoder_o.ilastsize[i] = itt_out[i].ilastsize; iti_to_encoder_o.itype[i] = itt_out[i].itype; - iti_to_encoder_o.iaddr[i]= itt_out[i].iaddr; + iti_to_encoder_o.iaddr[i] = itt_out[i].iaddr; iti_to_encoder_o.priv = itt_out[i].priv; // privilege don't change between 2 instr comitted in the same cycle - iti_to_encoder_o.cycles = itt_out[i].cycles; // Same here (same time at same cycle) + iti_to_encoder_o.cycles = itt_out[i].cycles; // Same here (same time at same cycle) end end - if (itt_out[0].valid) begin // interrupt & exception only in port 0 - iti_to_encoder_o.cause = itt_out[0].cause; - iti_to_encoder_o.tval = itt_out[0].tval; + if (itt_out[0].valid) begin // interrupt & exception only in port 0 + iti_to_encoder_o.cause = itt_out[0].cause; + iti_to_encoder_o.tval = itt_out[0].tval; end end @@ -170,15 +170,19 @@ module cva6_iti #( addr_q <= addr_d; special_q <= special_d; end - //pragma translate_off + //pragma translate_off for (int i = 0; i < CVA6Cfg.NrCommitPorts; i++) begin if (itt_out[i].valid) begin - $fwrite(f, "i :%d , val = %d , iret = %d, ilast = 0x%d , itype = %d , cause = 0x%h , tval= 0x%h , priv = 0x%d , iadd= 0x%h, time =%d \n", - i, itt_out[i].valid, itt_out[i].iretire , itt_out[i].ilastsize , itt_out[i].itype , itt_out[i].cause, itt_out[i].tval, itt_out[i].priv , itt_out[i].iaddr , itt_out[i].cycles); + $fwrite( + f, + "i :%d , val = %d , iret = %d, ilast = 0x%d , itype = %d , cause = 0x%h , tval= 0x%h , priv = 0x%d , iadd= 0x%h, time =%d \n", + i, itt_out[i].valid, itt_out[i].iretire, itt_out[i].ilastsize, itt_out[i].itype, + itt_out[i].cause, itt_out[i].tval, itt_out[i].priv, itt_out[i].iaddr, + itt_out[i].cycles); end end - //pragma translate_on - end + //pragma translate_on + end -endmodule \ No newline at end of file +endmodule diff --git a/core/cva6_iti/itype_detector.sv b/core/cva6_iti/itype_detector.sv index 0a465fdb7..5c503ab2d 100755 --- a/core/cva6_iti/itype_detector.sv +++ b/core/cva6_iti/itype_detector.sv @@ -21,16 +21,15 @@ it produces the type of the instruction */ -module itype_detector -#( - parameter ITYPE_LEN = 3 //Size is itype_width_p in the E-Trace SPEC (3 or 4) -)( - input logic valid_i, - input logic exception_i, - input logic interrupt_i, - input ariane_pkg::fu_op op_i, - input logic branch_taken_i, - output iti_pkg::itype_t itype_o +module itype_detector #( + parameter ITYPE_LEN = 3 //Size is itype_width_p in the E-Trace SPEC (3 or 4) +) ( + input logic valid_i, + input logic exception_i, + input logic interrupt_i, + input ariane_pkg::fu_op op_i, + input logic branch_taken_i, + output iti_pkg::itype_t itype_o ); // internal signals @@ -48,7 +47,7 @@ module itype_detector - assign eret = op_i inside {ariane_pkg::MRET , ariane_pkg::SRET , ariane_pkg::DRET}; + assign eret = op_i inside {ariane_pkg::MRET, ariane_pkg::SRET, ariane_pkg::DRET}; assign nontaken_branch = ( op_i == ariane_pkg::EQ || op_i == ariane_pkg::NE || @@ -84,7 +83,7 @@ module itype_detector itype_o = iti_pkg::NON_TAKEN_BR; end else if (taken_branch) begin // taken branch itype_o = iti_pkg::TAKEN_BR; - end else if (ITYPE_LEN == 3 && updiscon) begin // uninferable discontinuity + end else if (ITYPE_LEN == 3 && updiscon) begin // uninferable discontinuity itype_o = iti_pkg::UNINF_JMP; end end diff --git a/core/cva6_rvfi.sv b/core/cva6_rvfi.sv index 1a0113f1d..ca7881233 100644 --- a/core/cva6_rvfi.sv +++ b/core/cva6_rvfi.sv @@ -258,7 +258,7 @@ module cva6_rvfi logic [31:0] instr; logic branch_valid; logic is_taken; - logic is_compressed; + logic is_compressed; } sb_mem_t; sb_mem_t [CVA6Cfg.NR_SB_ENTRIES-1:0] mem_q, mem_n; @@ -282,9 +282,9 @@ module cva6_rvfi end end if (branch_valid_iti) begin - mem_n[branch_trans_id].branch_valid=branch_valid_iti; - mem_n[branch_trans_id].is_taken=is_taken_iti; - end + mem_n[branch_trans_id].branch_valid = branch_valid_iti; + mem_n[branch_trans_id].is_taken = is_taken_iti; + end if (lsu_rmask != 0) begin mem_n[lsu_addr_trans_id].lsu_addr = lsu_addr; mem_n[lsu_addr_trans_id].lsu_rmask = lsu_rmask; @@ -354,9 +354,9 @@ module cva6_rvfi rvfi_to_iti_o.branch_valid[i] <= mem_q[commit_pointer[i]].branch_valid; rvfi_to_iti_o.is_taken[i] <= mem_q[commit_pointer[i]].is_taken; rvfi_to_iti_o.is_compressed[i] <= mem_q[commit_pointer[i]].is_compressed; - rvfi_to_iti_o.valid[i]<=valid_iti[i]; - rvfi_to_iti_o.pc[i]<=pc_iti[i]; - rvfi_to_iti_o.op[i]<=op_iti[i]; + rvfi_to_iti_o.valid[i] <= valid_iti[i]; + rvfi_to_iti_o.pc[i] <= pc_iti[i]; + rvfi_to_iti_o.op[i] <= op_iti[i]; end rvfi_to_iti_o.ex_valid <= ex_commit_valid; rvfi_to_iti_o.cycles <= time_iti; diff --git a/core/include/iti_pkg.sv b/core/include/iti_pkg.sv index a9c1ec841..0099f9e5e 100644 --- a/core/include/iti_pkg.sv +++ b/core/include/iti_pkg.sv @@ -10,9 +10,9 @@ package iti_pkg; - localparam CAUSE_LEN = 5; //Size is ecause_width_p in the E-Trace SPEC - localparam ITYPE_LEN = 3; //Size is itype_width_p in the E-Trace SPEC (3 or 4) - localparam IRETIRE_LEN = 32; //Size is iretire_width_p in the E-Trace SPEC + localparam CAUSE_LEN = 5; //Size is ecause_width_p in the E-Trace SPEC + localparam ITYPE_LEN = 3; //Size is itype_width_p in the E-Trace SPEC (3 or 4) + localparam IRETIRE_LEN = 32; //Size is iretire_width_p in the E-Trace SPEC typedef enum logic [ITYPE_LEN-1:0] { STANDARD = 0, // none of the other named itype codes @@ -30,7 +30,7 @@ package iti_pkg; CRS = 12, // co-routine swap RET = 13, // return OUIJ = 14, // other uninferable jump - OIJ = 15*/ // other inferable jump + OIJ = 15*/ // other inferable jump } itype_t; -endpackage \ No newline at end of file +endpackage diff --git a/core/include/iti_types.svh b/core/include/iti_types.svh index 9ffa6d84a..8ef1c9468 100644 --- a/core/include/iti_types.svh +++ b/core/include/iti_types.svh @@ -13,4 +13,4 @@ logic [63:0] cycles; \ } -`endif // ITI_TYPES_SVH \ No newline at end of file +`endif // ITI_TYPES_SVH