diff --git a/core/alu.sv b/core/alu.sv
index 6e0f12ca1..df484bfe5 100644
--- a/core/alu.sv
+++ b/core/alu.sv
@@ -300,10 +300,10 @@ module alu
     if (CVA6Cfg.RVB) begin
       // Index for Bitwise Rotation
       bit_indx = 1 << (fu_data_i.operand_b & (CVA6Cfg.XLEN - 1));
-      // rolw, roriw, rorw
-      rolw = ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} << fu_data_i.operand_b[4:0]) | ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} >> (CVA6Cfg.XLEN-32-fu_data_i.operand_b[4:0]));
-      rorw = ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} >> fu_data_i.operand_b[4:0]) | ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} << (CVA6Cfg.XLEN-32-fu_data_i.operand_b[4:0]));
       if (CVA6Cfg.IS_XLEN64) begin
+        // rolw, roriw, rorw
+        rolw = ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} << fu_data_i.operand_b[4:0]) | ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} >> (CVA6Cfg.XLEN-32-fu_data_i.operand_b[4:0]));
+        rorw = ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} >> fu_data_i.operand_b[4:0]) | ({{CVA6Cfg.XLEN-32{1'b0}},fu_data_i.operand_a[31:0]} << (CVA6Cfg.XLEN-32-fu_data_i.operand_b[4:0]));
         unique case (fu_data_i.operation)
           CLZW, CTZW:
           result_o = (lz_tz_wempty) ? 32 : {{CVA6Cfg.XLEN - 5{1'b0}}, lz_tz_wcount};  // change
diff --git a/core/branch_unit.sv b/core/branch_unit.sv
index 4e74497d7..068883663 100644
--- a/core/branch_unit.sv
+++ b/core/branch_unit.sv
@@ -108,8 +108,6 @@ module branch_unit #(
   always_comb begin : exception_handling
 
     // Do a jump if it is either unconditional jump (JAL | JALR) or `taken` conditional jump
-    jump_taken = !(ariane_pkg::op_is_branch(fu_data_i.operation)) ||
-        ((ariane_pkg::op_is_branch(fu_data_i.operation)) && branch_comp_res_i);
     branch_exception_o.cause = riscv::INSTR_ADDR_MISALIGNED;
     branch_exception_o.valid = 1'b0;
     if (CVA6Cfg.TvalEn)
@@ -121,6 +119,8 @@ module branch_unit #(
     // Only throw instruction address misaligned exception if this is indeed a `taken` conditional branch or
     // an unconditional jump
     if (!CVA6Cfg.RVC) begin
+      jump_taken = !(ariane_pkg::op_is_branch(fu_data_i.operation)) ||
+          ((ariane_pkg::op_is_branch(fu_data_i.operation)) && branch_comp_res_i);
       if (branch_valid_i && (target_address[0] || target_address[1]) && jump_taken) begin
         branch_exception_o.valid = 1'b1;
       end
diff --git a/spyglass/reference_summary.rpt b/spyglass/reference_summary.rpt
index 30bc8498e..f108dbd0c 100644
--- a/spyglass/reference_summary.rpt
+++ b/spyglass/reference_summary.rpt
@@ -4,7 +4,7 @@
 # This file has been generated by SpyGlass:
 #     Report Name      : summary
 #     Report Created by: asintzoff
-#     Report Created on:  Mon Aug 12 08:41:26 2024
+#     Report Created on:  Tue Aug 13 11:47:20 2024
 #     Working Directory: /home/asintzoff/git-repo/tss/cva6/spyglass
 #     SpyGlass Version : SpyGlass_vS-2021.09-SP2-3
 #     Policy Name      : SpyGlass(SpyGlass_vS-2021.09-SP2-03)
@@ -17,9 +17,9 @@
 #                        starc(SpyGlass_vS-2021.09-SP2-03)
 #                        starc2005(SpyGlass_vS-2021.09-SP2-03)
 #
-#     Total Number of Generated Messages :       1517
+#     Total Number of Generated Messages :       1514
 #     Number of Waived Messages          :        322
-#     Number of Reported Messages        :       1195
+#     Number of Reported Messages        :       1192
 #     Number of Overlimit Messages       :          0
 #
 #
@@ -121,7 +121,7 @@ WARNING    W415a                535   Signal may be multiply assigned (beside
                                       initialization) in the same scope. 
 WARNING    W480                 3     Loop index is not of type integer 
 WARNING    W486                 2     Shift overflow - some bits may be lost 
-WARNING    W528                 486   A signal or variable is set but never 
+WARNING    W528                 483   A signal or variable is set but never 
                                       read 
 INFO       W528                 1     A signal or variable is set but never 
                                       read