diff --git a/verif/env/uvme/uvme_cva6_cfg.sv b/verif/env/uvme/uvme_cva6_cfg.sv index 95094c21e..36ca64cdf 100644 --- a/verif/env/uvme/uvme_cva6_cfg.sv +++ b/verif/env/uvme/uvme_cva6_cfg.sv @@ -38,11 +38,12 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c; rand int unsigned sys_clk_period; // Agent cfg handles - rand uvma_clknrst_cfg_c clknrst_cfg; - rand uvma_axi_cfg_c axi_cfg; - rand uvma_rvfi_cfg_c#(ILEN,XLEN) rvfi_cfg; - rand uvma_isacov_cfg_c isacov_cfg; - rand uvma_interrupt_cfg_c interrupt_cfg; + rand uvma_clknrst_cfg_c clknrst_cfg; + rand uvma_axi_cfg_c axi_cfg; + rand uvma_obi_memory_cfg_c obi_cfg; + rand uvma_rvfi_cfg_c#(ILEN,XLEN) rvfi_cfg; + rand uvma_isacov_cfg_c isacov_cfg; + rand uvma_interrupt_cfg_c interrupt_cfg; // Zicond extension rand bit ext_zicond_supported; @@ -80,6 +81,8 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c; `uvm_field_object(axi_cfg, UVM_DEFAULT) + `uvm_field_object(obi_cfg, UVM_DEFAULT) + `uvm_field_object(rvfi_cfg, UVM_DEFAULT) `uvm_field_object(isacov_cfg, UVM_DEFAULT) @@ -203,6 +206,26 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c; rvfi_cfg.nret == CVA6Cfg.NrCommitPorts; unified_traps == 0; axi_cfg.rand_channel_delay_enabled == 0; + obi_cfg.drv_mode == UVMA_OBI_MEMORY_MODE_SLV; + obi_cfg.version == UVMA_OBI_MEMORY_VERSION_1P2; + //AZ: Issue in CVA6Cfg.ObiFetchbusCfg values, to be fixed + //obi_cfg.auser_width == CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AUserWidth; + //obi_cfg.wuser_width == CVA6Cfg.ObiFetchbusCfg.OptionalCfg.WUserWidth; + //obi_cfg.ruser_width == CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RUserWidth; + //obi_cfg.addr_width == CVA6Cfg.ObiFetchbusCfg.AddrWidth ; + //obi_cfg.data_width == CVA6Cfg.ObiFetchbusCfg.DataWidth ; + //obi_cfg.id_width == CVA6Cfg.ObiFetchbusCfg.IdWidth ; + //obi_cfg.achk_width == CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AChkWidth ; + //obi_cfg.rchk_width == CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RChkWidth ; + + obi_cfg.auser_width == 1; + obi_cfg.wuser_width == 32; + obi_cfg.ruser_width == 32; + obi_cfg.addr_width == 34; + obi_cfg.data_width == 32; + obi_cfg.id_width == 4; + obi_cfg.achk_width == 1; + obi_cfg.rchk_width == 1; if (is_active == UVM_ACTIVE) { clknrst_cfg.is_active == UVM_ACTIVE; @@ -214,6 +237,7 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c; if (trn_log_enabled) { clknrst_cfg.trn_log_enabled == 0; axi_cfg.trn_log_enabled == 1; + obi_cfg.trn_log_enabled == 1; rvfi_cfg.trn_log_enabled == 1; isacov_cfg.trn_log_enabled == 1; } @@ -221,6 +245,7 @@ class uvme_cva6_cfg_c extends uvma_core_cntrl_cfg_c; if (cov_model_enabled) { isacov_cfg.cov_model_enabled == 1; axi_cfg.cov_model_enabled == 1; + obi_cfg.cov_model_enabled == 1; interrupt_cfg.cov_model_enabled == 1; } @@ -250,6 +275,7 @@ function uvme_cva6_cfg_c::new(string name="uvme_cva6_cfg"); clknrst_cfg = uvma_clknrst_cfg_c::type_id::create("clknrst_cfg"); axi_cfg = uvma_axi_cfg_c::type_id::create("axi_cfg"); + obi_cfg = uvma_obi_memory_cfg_c::type_id::create("obi_cfg"); rvfi_cfg = uvma_rvfi_cfg_c#(ILEN,XLEN)::type_id::create("rvfi_cfg"); isacov_cfg = uvma_isacov_cfg_c::type_id::create("isacov_cfg"); interrupt_cfg = uvma_interrupt_cfg_c::type_id::create("interrupt_cfg"); diff --git a/verif/env/uvme/uvme_cva6_cntxt.sv b/verif/env/uvme/uvme_cva6_cntxt.sv index 3d07cae04..bd2c883e8 100644 --- a/verif/env/uvme/uvme_cva6_cntxt.sv +++ b/verif/env/uvme/uvme_cva6_cntxt.sv @@ -32,6 +32,7 @@ class uvme_cva6_cntxt_c extends uvm_object; // Agent context handles uvma_clknrst_cntxt_c clknrst_cntxt; uvma_axi_cntxt_c axi_cntxt; + uvma_obi_memory_cntxt_c obi_cntxt; uvma_cva6_core_cntrl_cntxt_c core_cntrl_cntxt; uvma_rvfi_cntxt_c rvfi_cntxt; uvma_interrupt_cntxt_c interrupt_cntxt; @@ -50,6 +51,7 @@ class uvme_cva6_cntxt_c extends uvm_object; `uvm_object_utils_begin(uvme_cva6_cntxt_c) `uvm_field_object(clknrst_cntxt, UVM_DEFAULT) `uvm_field_object(axi_cntxt, UVM_DEFAULT) + `uvm_field_object(obi_cntxt, UVM_DEFAULT) `uvm_field_object(core_cntrl_cntxt, UVM_DEFAULT) `uvm_field_object(rvfi_cntxt, UVM_DEFAULT) `uvm_field_object(interrupt_cntxt, UVM_DEFAULT) @@ -77,6 +79,7 @@ function uvme_cva6_cntxt_c::new(string name="uvme_cva6_cntxt"); clknrst_cntxt = uvma_clknrst_cntxt_c::type_id::create("clknrst_cntxt"); core_cntrl_cntxt = uvma_cva6_core_cntrl_cntxt_c::type_id::create("core_cntrl_cntxt"); axi_cntxt = uvma_axi_cntxt_c::type_id::create("axi_cntxt"); + obi_cntxt = uvma_obi_memory_cntxt_c::type_id::create("obi_cntxt"); mem = uvml_mem_cva6::type_id::create("mem"); rvfi_cntxt = uvma_rvfi_cntxt_c#()::type_id::create("rvfi_cntxt"); interrupt_cntxt = uvma_interrupt_cntxt_c::type_id::create("interrupt_cntxt"); diff --git a/verif/env/uvme/uvme_cva6_env.sv b/verif/env/uvme/uvme_cva6_env.sv index 1a1c72a74..2f9ca4745 100644 --- a/verif/env/uvme/uvme_cva6_env.sv +++ b/verif/env/uvme/uvme_cva6_env.sv @@ -43,6 +43,7 @@ class uvme_cva6_env_c extends uvm_env; // Agents uvma_clknrst_agent_c clknrst_agent; uvma_axi_agent_c axi_agent; + uvma_obi_memory_agent_c obi_agent; uvma_cva6_core_cntrl_agent_c core_cntrl_agent; uvma_rvfi_agent_c#(ILEN,XLEN) rvfi_agent; uvma_isacov_agent_c#(ILEN,XLEN) isacov_agent; @@ -252,6 +253,8 @@ function void uvme_cva6_env_c::assign_cfg(); uvm_config_db#(uvma_axi_cfg_c)::set(this, "*axi_agent", "cfg", cfg.axi_cfg); + uvm_config_db#(uvma_obi_memory_cfg_c)::set(this, "*obi_agent", "cfg", cfg.obi_cfg); + uvm_config_db#(uvma_core_cntrl_cfg_c)::set(this, "core_cntrl_agent", "cfg", cfg); uvm_config_db#(uvma_rvfi_cfg_c#(ILEN,XLEN))::set(this, "*rvfi_agent", "cfg", cfg.rvfi_cfg); @@ -271,6 +274,7 @@ function void uvme_cva6_env_c::assign_cntxt(); uvm_config_db#(uvme_cva6_cntxt_c)::set(this, "*", "cntxt", cntxt); uvm_config_db#(uvma_clknrst_cntxt_c)::set(this, "clknrst_agent", "cntxt", cntxt.clknrst_cntxt); uvm_config_db#(uvma_axi_cntxt_c)::set(this, "axi_agent", "cntxt", cntxt.axi_cntxt); + uvm_config_db#(uvma_obi_memory_cntxt_c)::set(this, "obi_agent", "cntxt", cntxt.obi_cntxt); uvm_config_db#(uvma_rvfi_cntxt_c)::set(this, "rvfi_agent", "cntxt", cntxt.rvfi_cntxt); uvm_config_db#(uvma_interrupt_cntxt_c)::set(this, "interrupt_agent", "cntxt", cntxt.interrupt_cntxt); @@ -281,6 +285,7 @@ function void uvme_cva6_env_c::create_agents(); clknrst_agent = uvma_clknrst_agent_c::type_id::create("clknrst_agent", this); axi_agent = uvma_axi_agent_c::type_id::create("axi_agent", this); + obi_agent = uvma_obi_memory_agent_c::type_id::create("obi_agent", this); core_cntrl_agent = uvma_cva6_core_cntrl_agent_c::type_id::create("core_cntrl_agent", this); rvfi_agent = uvma_rvfi_agent_c#(ILEN,XLEN)::type_id::create("rvfi_agent", this); isacov_agent = uvma_isacov_agent_c#(ILEN,XLEN)::type_id::create("isacov_agent", this); diff --git a/verif/env/uvme/uvme_cva6_pkg.sv b/verif/env/uvme/uvme_cva6_pkg.sv index 220521afc..f1f5b1f82 100644 --- a/verif/env/uvme/uvme_cva6_pkg.sv +++ b/verif/env/uvme/uvme_cva6_pkg.sv @@ -46,6 +46,7 @@ package uvme_cva6_pkg; import uvml_trn_pkg ::*; import uvma_clknrst_pkg::*; import uvma_axi_pkg::*; + import uvma_obi_memory_pkg::*; import uvml_mem_pkg ::*; import uvma_core_cntrl_pkg::*; import uvma_rvfi_pkg::*; diff --git a/verif/sim/Makefile b/verif/sim/Makefile index 89f1f7e3c..e44f4ab66 100644 --- a/verif/sim/Makefile +++ b/verif/sim/Makefile @@ -173,6 +173,7 @@ export DV_UVML_TRN_PATH = $(CORE_V_VERIF)/lib/uvm_libs/uvml_trn export DV_UVML_MEM_PATH = $(CORE_V_VERIF)/lib/uvm_libs/uvml_mem export DV_UVML_LOGS_PATH = $(CORE_V_VERIF)/lib/uvm_libs/uvml_logs export DV_UVML_SB_PATH = $(CORE_V_VERIF)/lib/uvm_libs/uvml_sb +export DV_UVMA_OBI_MEMORY_PATH= $(CORE_V_VERIF)/lib/uvm_agents/uvma_obi_memory export CV_CORE_PKG = $(CORE_V_VERIF)/core-v-cores/$(CV_CORE_LC) export DESIGN_RTL_DIR = $(CV_CORE_PKG)/rtl diff --git a/verif/tb/uvmt/cva6_tb_wrapper.sv b/verif/tb/uvmt/cva6_tb_wrapper.sv index 5a5a38436..dbf699d6a 100644 --- a/verif/tb/uvmt/cva6_tb_wrapper.sv +++ b/verif/tb/uvmt/cva6_tb_wrapper.sv @@ -75,6 +75,7 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #( input logic [2:0] irq_i, uvma_debug_if debug_if, uvma_axi_intf axi_slave, + uvma_obi_memory_if obi_slave, uvmt_axi_switch_intf axi_switch_vif, uvmt_default_inputs_intf default_inputs_vif ); @@ -242,6 +243,36 @@ module cva6_tb_wrapper import uvmt_cva6_pkg::*; #( assign axi_slave.ar_region = axi_ariane_req.ar.region; assign axi_slave.ar_user = 0; + //Obi Interface + assign obi_slave.req = i_cva6.obi_fetch_req_if_cache.req; + assign obi_slave.gnt = i_cva6.obi_fetch_rsp_cache_if.gnt; + assign obi_slave.addr = i_cva6.obi_fetch_req_if_cache.a.addr; + assign obi_slave.we = i_cva6.obi_fetch_req_if_cache.a.we; + assign obi_slave.be = i_cva6.obi_fetch_req_if_cache.a.be; + assign obi_slave.wdata = i_cva6.obi_fetch_req_if_cache.a.wdata; + assign obi_slave.auser = i_cva6.obi_fetch_req_if_cache.a.a_optional.auser; + assign obi_slave.wuser = i_cva6.obi_fetch_req_if_cache.a.a_optional.wuser; + assign obi_slave.aid = i_cva6.obi_fetch_req_if_cache.a.aid; + assign obi_slave.atop = i_cva6.obi_fetch_req_if_cache.a.a_optional.atop; + assign obi_slave.memtype = i_cva6.obi_fetch_req_if_cache.a.a_optional.memtype; + assign obi_slave.prot = i_cva6.obi_fetch_req_if_cache.a.a_optional.prot; + assign obi_slave.reqpar = i_cva6.obi_fetch_req_if_cache.reqpar; + assign obi_slave.gntpar = i_cva6.obi_fetch_rsp_cache_if.gntpar; + assign obi_slave.achk = i_cva6.obi_fetch_req_if_cache.a.a_optional.achk; + assign obi_slave.rvalid = i_cva6.obi_fetch_rsp_cache_if.rvalid; + assign obi_slave.rready = i_cva6.obi_fetch_req_if_cache.rready; + assign obi_slave.rdata = i_cva6.obi_fetch_rsp_cache_if.r.rdata; + assign obi_slave.err = i_cva6.obi_fetch_rsp_cache_if.r.err; + assign obi_slave.ruser = i_cva6.obi_fetch_rsp_cache_if.r.r_optional.ruser; + assign obi_slave.rid = i_cva6.obi_fetch_rsp_cache_if.r.rid; + assign obi_slave.exokay = i_cva6.obi_fetch_rsp_cache_if.r.r_optional.exokay; + assign obi_slave.rvalidpar = i_cva6.obi_fetch_rsp_cache_if.rvalidpar; + assign obi_slave.rreadypar = i_cva6.obi_fetch_req_if_cache.rreadypar; + assign obi_slave.rchk = i_cva6.obi_fetch_rsp_cache_if.r.r_optional.rchk; + + ///assign obi_slave.mid = i_cva6.obi_fetch_rsp_cache_if.a.a_optional.mid; + ///assign obi_slave.dbg = i_cva6.obi_fetch_rsp_cache_if.a.a_optional.dbg; + AXI_BUS #( .AXI_ADDR_WIDTH ( CVA6Cfg.AxiAddrWidth ), diff --git a/verif/tb/uvmt/uvmt_cva6.flist b/verif/tb/uvmt/uvmt_cva6.flist index d4f765110..21e40bc07 100644 --- a/verif/tb/uvmt/uvmt_cva6.flist +++ b/verif/tb/uvmt/uvmt_cva6.flist @@ -31,6 +31,7 @@ -f ${DV_UVMC_RVFI_REFERENCE_MODEL_PATH}/uvmc_rvfi_reference_model_pkg.flist -f ${DV_UVMC_RVFI_SCOREBOARD_PATH}/uvmc_rvfi_scoreboard_pkg.flist -f ${CVA6_UVME_PATH}/uvma_interrupt/uvma_interrupt_pkg.flist +-f ${DV_UVMA_OBI_MEMORY_PATH}/src/uvma_obi_memory_pkg.flist // Environments -f ${CVA6_UVME_PATH}/uvme_cva6_pkg.flist diff --git a/verif/tb/uvmt/uvmt_cva6_dut_wrap.sv b/verif/tb/uvmt/uvmt_cva6_dut_wrap.sv index 500afcf45..7f8681b70 100644 --- a/verif/tb/uvmt/uvmt_cva6_dut_wrap.sv +++ b/verif/tb/uvmt/uvmt_cva6_dut_wrap.sv @@ -30,6 +30,7 @@ module uvmt_cva6_dut_wrap # ( ( uvma_clknrst_if clknrst_if, uvma_axi_intf axi_if, + uvma_obi_memory_if obi_if, uvmt_axi_switch_intf axi_switch_vif, uvmt_default_inputs_intf default_inputs_vif, uvme_cva6_core_cntrl_if core_cntrl_if, @@ -62,6 +63,7 @@ module uvmt_cva6_dut_wrap # ( .irq_i ( interrupt_vif.irq ), .debug_if ( debug_if ), .axi_slave ( axi_if ), + .obi_slave ( obi_if ), .axi_switch_vif ( axi_switch_vif ), .default_inputs_vif ( default_inputs_vif ), .tb_exit_o ( tb_exit_o ), diff --git a/verif/tb/uvmt/uvmt_cva6_pkg.sv b/verif/tb/uvmt/uvmt_cva6_pkg.sv index 9641dfc41..c7e106d78 100644 --- a/verif/tb/uvmt/uvmt_cva6_pkg.sv +++ b/verif/tb/uvmt/uvmt_cva6_pkg.sv @@ -30,6 +30,7 @@ `include "uvmt_axi_switch_intf.sv" `include "uvmt_default_inputs_intf.sv" `include "uvma_axi_intf.sv" +`include "uvma_obi_memory_if.sv" /** * Encapsulates all the types and test cases for the verification of an diff --git a/verif/tb/uvmt/uvmt_cva6_tb.sv b/verif/tb/uvmt/uvmt_cva6_tb.sv index 9768c0a21..51f2a6194 100644 --- a/verif/tb/uvmt/uvmt_cva6_tb.sv +++ b/verif/tb/uvmt/uvmt_cva6_tb.sv @@ -64,11 +64,37 @@ module uvmt_cva6_tb; .clk(clknrst_if.clk), .rst_n(clknrst_if.reset_n) ); - uvma_interrupt_if interrupt_vif( ); + //OBI in monitor mode + uvma_obi_memory_if #(.AUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AUserWidth), + .WUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.WUserWidth), + .RUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RUserWidth), + .ADDR_WIDTH(CVA6Cfg.ObiFetchbusCfg.AddrWidth), + .DATA_WIDTH(CVA6Cfg.ObiFetchbusCfg.DataWidth), + .ID_WIDTH(CVA6Cfg.ObiFetchbusCfg.IdWidth), + .ACHK_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AChkWidth), + .RCHK_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RChkWidth) + ) obi_if ( + .clk(clknrst_if.clk), + .reset_n(clknrst_if.reset_n) + ); + + + //bind assertion module for obi interface + bind uvmt_cva6_dut_wrap uvma_obi_memory_assert_if_wrp #( + .AUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AUserWidth), + .WUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.WUserWidth), + .RUSER_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RUserWidth), + .ADDR_WIDTH(CVA6Cfg.ObiFetchbusCfg.AddrWidth), + .DATA_WIDTH(CVA6Cfg.ObiFetchbusCfg.DataWidth), + .ID_WIDTH(CVA6Cfg.ObiFetchbusCfg.IdWidth), + .ACHK_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.AChkWidth), + .RCHK_WIDTH(CVA6Cfg.ObiFetchbusCfg.OptionalCfg.RChkWidth), + .IS_1P2(1)) obi_assert(.obi(obi_if)); + uvmt_axi_switch_intf axi_switch_vif(); uvme_cva6_core_cntrl_if core_cntrl_if(); uvma_rvfi_instr_if #( @@ -117,6 +143,7 @@ module uvmt_cva6_tb; .clknrst_if(clknrst_if), .debug_if(debug_if), .axi_if (axi_if), + .obi_if (obi_if), .axi_switch_vif (axi_switch_vif), .default_inputs_vif (default_inputs_vif), .core_cntrl_if(core_cntrl_if), @@ -372,6 +399,7 @@ module uvmt_cva6_tb; uvm_config_db#(virtual uvma_interrupt_if)::set(.cntxt(null), .inst_name("*"), .field_name("interrupt_vif"), .value(interrupt_vif)); uvm_config_db#(virtual uvmt_tb_exit_if)::set(.cntxt(null), .inst_name("*"), .field_name("tb_exit_vif"), .value(tb_exit_if)); + uvm_config_db#(virtual uvma_obi_memory_if)::set(.cntxt(null), .inst_name("*"), .field_name("vif"), .value(obi_if)); // DUT and ENV parameters uvm_config_db#(int)::set(.cntxt(null), .inst_name("*"), .field_name("ENV_PARAM_INSTR_ADDR_WIDTH"), .value(ENV_PARAM_INSTR_ADDR_WIDTH) );