CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:ibex:sim_shared"
description: "Collection of useful RTL for building simulations"
filesets:
  files_sim_sv:
    depend:
      - lowrisc:prim:assert
    files:
      - ./rtl/prim_clock_gating.sv
      - ./rtl/prim_generic_ram_1p.sv
      - ./rtl/prim_secded_28_22_enc.sv
      - ./rtl/prim_secded_28_22_dec.sv
      - ./rtl/prim_secded_72_64_enc.sv
      - ./rtl/prim_secded_72_64_dec.sv
      - ./rtl/ram_1p.sv
      - ./rtl/ram_2p.sv
      - ./rtl/bus.sv
      - ./rtl/sim/simulator_ctrl.sv
      - ./rtl/timer.sv
    file_type: systemVerilogSource

targets:
  default:
    filesets:
      - files_sim_sv

