diff --git a/dv/uvm/Makefile b/dv/uvm/Makefile
index a045a84e..da77d01f 100644
--- a/dv/uvm/Makefile
+++ b/dv/uvm/Makefile
@@ -15,11 +15,24 @@ WAVES     := 1
 WAVE_CMP_OPTS := -debug_access+all -ucli -do vcs.tcl
 # Enable coverage dump
 COV       := 0
+# Coverage dump options
+COV_CMP_OPTS := -cm line+tgl+assert+fsm+branch \
+                -cm_tgl portsonly \
+                -cm_tgl structarr \
+                -cm_report noinitial \
+                -cm_seqnoconst \
+                -cm_glitch 0 \
+                -cm_dir ${OUT}/rtl_sim/test.vdb \
+                -cm_hier cover.cfg
 
 ifeq (${WAVES}, 0)
 	WAVE_CMP_OPTS=
 endif
 
+ifeq (${COV}, 0)
+	COV_CMP_OPTS=
+endif
+
 SHELL=/bin/bash
 
 export PRJ_DIR:= $(realpath ${DV_DIR}/../../..)
@@ -55,13 +68,17 @@ compile:
       +define+BOOT_ADDR=32\'h8000_0000 \
       +define+TRACE_EXECUTION \
       -debug_access+pp \
-      ${WAVE_CMP_OPTS} \
+      ${WAVE_CMP_OPTS} ${COV_CMP_OPTS}\
       -lca -kdb
 
 # Run ibex RTL simulation with random instructions
 rtl_sim:
-	./sim ${SIM_OPTS} -dir ${OUT} -waves ${WAVES}
+	./sim ${SIM_OPTS} -dir ${OUT} -waves ${WAVES} -cov ${COV}
 
 # Compare the regression result between ISS and RTL sim
 post_compare:
 	./compare ${OUT}
+
+# Load verdi to review coverage
+cov:
+	cd ${OUT}/rtl_sim; verdi -cov -covdir test.vdb &
diff --git a/dv/uvm/cover.cfg b/dv/uvm/cover.cfg
new file mode 100644
index 00000000..e3a4a0d9
--- /dev/null
+++ b/dv/uvm/cover.cfg
@@ -0,0 +1 @@
++tree core_ibex_tb_top.dut
diff --git a/dv/uvm/sim b/dv/uvm/sim
index 5fce2055..c083d802 100755
--- a/dv/uvm/sim
+++ b/dv/uvm/sim
@@ -18,6 +18,10 @@ SEED=""
 WAVES=0
 WAVES_OPTS=""
 
+# Coveragedump options
+COV=0
+COV_OPTS=""
+
 # Process command line options
 while [[ $# -gt 0 ]]
 do
@@ -35,6 +39,10 @@ case $key in
     WAVES="$2"
     shift
     ;;
+    -cov)
+    COV="$2"
+    shift
+    ;;
     -seed)
     SEED="$2"
     RAND_SEED=0
@@ -69,10 +77,17 @@ while read asm_test; do
     SEED=$RANDOM
   fi
   if [[ $WAVES == 1 ]]; then
-    WAVES_OPTS="-ucli -do $RUN_DIR/../vcs.tcl"
+    WAVES_OPTS="-ucli -do vcs.tcl"
+  fi
+  if [[ $COV == 1 ]]; then
+    COV_OPTS="-cm line+tgl+assert+fsm+branch \
+              -cm_dir ${RUN_DIR}/rtl_sim/test.vdb \
+              -cm_log /dev/null \
+              -assert nopostproc \
+              -cm_name test_${SEED}"
   fi
   CMD="$OUT/vcs_simv +UVM_TESTNAME=core_ibex_base_test \
-       ${WAVES_OPTS} +ntb_random_seed=${SEED} \
+       ${WAVES_OPTS} +ntb_random_seed=${SEED} +vcs+lic+wait ${COV_OPTS}\
        +bin=$BINFILE -l sim.log"
   echo "Running simulation for : $CMD"
   $CMD