From 73e94fb6f823d0a44b495da5a2140bd4175a628b Mon Sep 17 00:00:00 2001 From: Pirmin Vogel Date: Wed, 3 Jul 2019 16:00:20 +0100 Subject: [PATCH] Comment on RV32E register address check in compressed decoder It is not necessary to do this check in the compressed decoder. If a compressed instruction in RV32E tries to access any register x16 - x31, the regular decoder triggers an illegal instruction exception and the controller writes the actual faulting (compressed) instruction to `mtval`. --- rtl/ibex_compressed_decoder.sv | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/rtl/ibex_compressed_decoder.sv b/rtl/ibex_compressed_decoder.sv index 536d3843..570b85c6 100644 --- a/rtl/ibex_compressed_decoder.sv +++ b/rtl/ibex_compressed_decoder.sv @@ -69,6 +69,10 @@ module ibex_compressed_decoder ( end // C1 + // + // Register address checks for RV32E are performed in the regular instruction decoder. + // If this check fails, an illegal instruction exception is triggered and the controller + // writes the actual faulting instruction to mtval. 2'b01: begin unique case (instr_i[15:13]) 3'b000: begin @@ -187,6 +191,10 @@ module ibex_compressed_decoder ( end // C2 + // + // Register address checks for RV32E are performed in the regular instruction decoder. + // If this check fails, an illegal instruction exception is triggered and the controller + // writes the actual faulting instruction to mtval. 2'b10: begin unique case (instr_i[15:13]) 3'b000: begin