diff --git a/vendor/lowrisc_ip.lock.hjson b/vendor/lowrisc_ip.lock.hjson index 99a57232..ffb57389 100644 --- a/vendor/lowrisc_ip.lock.hjson +++ b/vendor/lowrisc_ip.lock.hjson @@ -9,6 +9,6 @@ upstream: { url: https://github.com/lowRISC/opentitan - rev: 34ba5e45f9af7d8ca6c9bdae8bd11eeeeb669d6c + rev: be1359d27d0e826e28e6611f318c286253cd05f1 } } diff --git a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv index 13aa420c..d291fc05 100644 --- a/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv +++ b/vendor/lowrisc_ip/dv/sv/csr_utils/csr_utils_pkg.sv @@ -714,6 +714,58 @@ package csr_utils_pkg; return null; endfunction + // Clone a UVM address map + function automatic uvm_reg_map clone_reg_map( + string name, uvm_reg_map map, uvm_reg_addr_t base_addr = 0, int n_bytes = 4, + uvm_endianness_e endian = UVM_LITTLE_ENDIAN, bit byte_addressing = 1); + uvm_reg_map clone; + uvm_reg_map submaps[$]; + uvm_reg regs[$]; + uvm_reg_block blk; + uvm_mem mems[$]; + + // Clone the map + blk = map.get_parent(); + clone = blk.create_map( + .name(name), + .base_addr(base_addr), + .n_bytes(n_bytes), + .endian(endian), + .byte_addressing(byte_addressing) + ); + + // Clone the submaps by calling this function recursively + map.get_submaps(submaps); + if (submaps.size()) `dv_warning("clone_reg_map: submaps are not yet tested", "DV_UTILS_PKG") + while (submaps.size()) begin + uvm_reg_map submap, submap_clone; + submap = submaps.pop_front(); + submap_clone = clone_reg_map(.name(name), .map(submap), .base_addr(submap.get_base_addr()), + .n_bytes(submap.get_n_bytes()), .endian(endian)); + clone.add_submap(.child_map(submap_clone), .offset(clone.get_submap_offset(submap))); + end + + // Clone the registers + map.get_registers(regs, UVM_NO_HIER); + while (regs.size()) begin + uvm_reg rg; + rg = regs.pop_front(); + clone.add_reg(.rg(rg), .offset(rg.get_offset(map)), .rights(rg.get_rights(map)), .unmapped(0), + .frontdoor(null)); + end + + // Clone the memories + map.get_memories(mems, UVM_NO_HIER); + while (mems.size()) begin + uvm_mem mem; + mem = mems.pop_front(); + clone.add_mem(.mem(mem), .offset(mem.get_offset(0, map)), .rights(mem.get_rights(map)), + .unmapped(0), .frontdoor(null)); + end + return clone; + + endfunction + // sources `include "csr_seq_lib.sv" diff --git a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv index c60ecdbd..f2fea171 100644 --- a/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv +++ b/vendor/lowrisc_ip/dv/sv/dv_lib/dv_base_test.sv @@ -16,13 +16,22 @@ class dv_base_test #(type CFG_T = dv_base_env_cfg, uint drain_time_ns = 2_000; // 2us bit poll_for_stop = 1'b0; uint poll_for_stop_interval_ns = 1000; + bit print_topology = 1'b0; `uvm_component_new virtual function void build_phase(uvm_phase phase); - dv_report_server m_dv_report_server = new(); + dv_report_server m_dv_report_server = new(); + dv_report_catcher m_report_catcher; uvm_report_server::set_server(m_dv_report_server); + // Message catcher/demoter + `uvm_create_obj(dv_report_catcher, m_report_catcher) + // Add demoted messages - we need to do this here to catch build warnings + add_message_demotes(m_report_catcher); + // Register catcher + uvm_report_cb::add(null, m_report_catcher); + super.build_phase(phase); env = ENV_T::type_id::create("env", this); @@ -44,6 +53,10 @@ class dv_base_test #(type CFG_T = dv_base_env_cfg, // Enable reduced runtime test. void'($value$plusargs("smoke_test=%0b", cfg.smoke_test)); + + // Enable print_topology + void'($value$plusargs("print_topology=%0b", print_topology)); + uvm_top.enable_print_topology = print_topology; endfunction : build_phase virtual function void end_of_elaboration_phase(uvm_phase phase); @@ -67,6 +80,10 @@ class dv_base_test #(type CFG_T = dv_base_env_cfg, // TODO: add hook for end of test checking. endtask : run_phase + // Add message demotes here - hook to use by extended tests + virtual function void add_message_demotes(dv_report_catcher catcher); + endfunction + virtual task run_seq(string test_seq_s, uvm_phase phase); uvm_sequence test_seq = create_seq_by_name(test_seq_s); diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv new file mode 100644 index 00000000..91e3337e --- /dev/null +++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_report_catcher.sv @@ -0,0 +1,46 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// Report catcher/demoter +class dv_report_catcher extends uvm_report_catcher; + + // Stores a new severity indexed by the ID and + // the regular expression to match the message + protected uvm_severity m_changed_sev[string][string]; + + `uvm_object_utils(dv_report_catcher) + `uvm_object_new + + // Called for all report messages - defined in uvm_report_catcher + virtual function action_e catch(); + string id = get_id(); + if (m_changed_sev.exists(id)) begin + string report_msg = get_message(); + foreach (m_changed_sev[id][msg]) begin + if (uvm_re_match(msg, report_msg)) begin + set_severity(m_changed_sev[id][msg]); + end + end + end + return THROW; + endfunction + + // Change severity of a message with ID == id and message text + // matching msg which is treated as a regular expression + virtual function void add_change_sev(string id, string msg, uvm_severity sev); + m_changed_sev[id][msg] = sev; + endfunction + + // Remove a change entry + // If msg == "" then remove all changes for a given id + virtual function void remove_change_sev(string id, string msg = ""); + if (m_changed_sev.exists(id)) + if (msg == "") begin + // Delete all with id if message is blank + m_changed_sev.delete(id); + end else if (m_changed_sev[id].exists(msg)) begin + m_changed_sev[id].delete(msg); + end + endfunction + +endclass diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core index 90df9573..95ffd58d 100644 --- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core +++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils.core @@ -17,6 +17,7 @@ filesets: - lowrisc:dv:dv_test_status files: - dv_utils_pkg.sv + - dv_report_catcher.sv: {is_include_file: true} - dv_report_server.sv: {is_include_file: true} - dv_vif_wrap.sv: {is_include_file: true} file_type: systemVerilogSource diff --git a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv index c88fd4f6..62f3b765 100644 --- a/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv +++ b/vendor/lowrisc_ip/dv/sv/dv_utils/dv_utils_pkg.sv @@ -215,6 +215,7 @@ package dv_utils_pkg; // sources `ifdef UVM + `include "dv_report_catcher.sv" `include "dv_report_server.sv" `include "dv_vif_wrap.sv" `endif diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core index 7804201a..5eadedce 100644 --- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core +++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.core @@ -9,6 +9,7 @@ filesets: files_dv: depend: - lowrisc:opentitan:bus_params_pkg + - lowrisc:dv:dv_macros files: - mem_model_pkg.sv - mem_model.sv: {is_include_file: true} diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv index 1d0c2863..c66e6547 100644 --- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv +++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model.sv @@ -3,8 +3,9 @@ // SPDX-License-Identifier: Apache-2.0 class mem_model #(int AddrWidth = bus_params_pkg::BUS_AW, - int DataWidth = bus_params_pkg::BUS_DW, - int MaskWidth = bus_params_pkg::BUS_DBW) extends uvm_object; + int DataWidth = bus_params_pkg::BUS_DW) extends uvm_object; + + localparam int MaskWidth = DataWidth / 8; typedef bit [AddrWidth-1:0] mem_addr_t; typedef bit [DataWidth-1:0] mem_data_t; diff --git a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv index f95274aa..5e3653c9 100644 --- a/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv +++ b/vendor/lowrisc_ip/dv/sv/mem_model/mem_model_pkg.sv @@ -7,6 +7,7 @@ package mem_model_pkg; import uvm_pkg::*; `include "uvm_macros.svh" + `include "dv_macros.svh" `include "mem_model.sv" endpackage diff --git a/vendor/lowrisc_ip/ip/prim/BUILD b/vendor/lowrisc_ip/ip/prim/BUILD new file mode 100644 index 00000000..c87fb863 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/BUILD @@ -0,0 +1,11 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "all_files", + srcs = glob(["**"]) + [ + ], +) diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv index de1ce512..f7ddac1e 100644 --- a/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/dv/prim_alert/tb/prim_alert_tb.sv @@ -16,6 +16,8 @@ module prim_alert_tb; + import dv_utils_pkg::*; + ////////////////////////////////////////////////////// // config ////////////////////////////////////////////////////// @@ -32,15 +34,21 @@ module prim_alert_tb; localparam bit IsFatal = 0; `endif - localparam time ClkPeriod = 10000; + localparam time ClkPeriod = 10_000; localparam int WaitCycle = IsAsync ? 3 : 1; // Minimal cycles to wait between each sequence. // The main concern here is the minimal wait cycles between each handshake. - localparam int MinHandshakeWait = 2 + WaitCycle; + localparam int MinHandshakeWait = 2 + WaitCycle; // Clock cycles for alert init handshake to finish. - localparam int WaitAlertInitDone = 30; + localparam int WaitAlertInitDone = 30; + + // Clock cycles for alert or ping handshake to finish. + // Wait enough cycles to ensure assertions from design are checked. + localparam int WaitAlertHandshakeDone = 20; + + uint default_spinwait_timeout_ns = 100_000; typedef enum bit [3:0]{ AlertSet, @@ -106,92 +114,8 @@ module prim_alert_tb; ////////////////////////////////////////////////////// // Helper Functions/Tasks and Variables ////////////////////////////////////////////////////// - logic error = 0; - // `Alert`, `Ack`, and `Ping` are all differential signal pairs with postfix `_p` and `_n`. - function automatic void check_diff_pair(bit exp_p, alert_signal_pair_e signal_pair); - bit exp_n = ~exp_p; - bit act_p, act_n; - string err_msg; - - case (signal_pair) - PingPair: begin - act_p = alert_rx.ping_p; - act_n = alert_rx.ping_n; - err_msg = "alert_rx.ping mismatch"; - end - AlertPair: begin - act_p = alert_tx.alert_p; - act_n = alert_tx.alert_n; - err_msg = "alert_tx.alert mismatch"; - end - AckPair: begin - act_p = alert_rx.ack_p; - act_n = alert_rx.ack_n; - err_msg = "alert_rx.ack mismatch"; - end - default: begin - $error($sformatf("Invalid signal_pair value %0d", signal_pair)); - error = 1; - end - endcase - - if (exp_p != act_p) begin - error = 1; - $error($sformatf("%0s: exp_p=%0d act_p=%0d", err_msg, exp_p, act_p)); - end - if (exp_n != act_n) begin - error = 1; - $error($sformatf("%0s: exp_n=%0d act_n=%0d", err_msg, exp_n, act_n)); - end - endfunction - - // Check `alert`, `ack`, and `ping` differential pairs with given alert_handshake stage and - // expected ping value. - function automatic void check_alert_rxtx(alert_handshake_e alert_handshake, bit exp_ping); - case (alert_handshake) - AlertSet: begin - check_diff_pair(1, AlertPair); - check_diff_pair(0, AckPair); - end - AlertAckSet: begin - check_diff_pair(1, AlertPair); - check_diff_pair(1, AckPair); - end - AlertReset: begin - check_diff_pair(0, AlertPair); - check_diff_pair(1, AckPair); - end - AlertAckReset: begin - check_diff_pair(0, AlertPair); - check_diff_pair(0, AckPair); - end - default: begin - $error($sformatf("Invalid alert_handshake value %0d", alert_handshake)); - error = 1; - end - endcase - check_diff_pair(exp_ping, PingPair); - endfunction - - // Verify the alert handshake protocol with the following pattern: - // 1). alert_p = 1, alert_n = 0; - // 2). ack_p = 1, ack_n = 0; - // 3). ack_p = 0, ack_n = 1; - // 4). alert_p = 0, alert_n = 1; - // There is a fixed cycles of delay between each sequence depending on if the alert is sync or - // async mode. - task automatic check_alert_handshake(bit exp_ping_value); - check_alert_rxtx(AlertSet, exp_ping_value); - main_clk.wait_clks(WaitCycle); - check_alert_rxtx(AlertAckSet, exp_ping_value); - main_clk.wait_clks(WaitCycle); - check_alert_rxtx(AlertReset, exp_ping_value); - main_clk.wait_clks(WaitCycle); - check_alert_rxtx(AlertAckReset, exp_ping_value); - endtask - ////////////////////////////////////////////////////// // Stimuli Application / Response Checking ////////////////////////////////////////////////////// @@ -205,28 +129,82 @@ module prim_alert_tb; main_clk.apply_reset(); // Wait for initialization sequence to end + if ($urandom_range(0, 1)) begin + main_clk.wait_clks($urandom_range(0, WaitAlertInitDone)); + if ($urandom_range(0, 1)) begin + init_trig = prim_mubi_pkg::MuBi4True; + main_clk.wait_clks(1); + init_trig = prim_mubi_pkg::MuBi4False; + end else begin + main_clk.apply_reset(); + end + end main_clk.wait_clks(WaitAlertInitDone); + $display("Init sequence finish"); // Sequence 1). Alert request sequence. for (int num_trans = 1; num_trans <= 10; num_trans++) begin - int rand_wait_alert_req = $urandom_range(MinHandshakeWait, 10); - int rand_wait_init_trig = $urandom_range(0, 30); + automatic int rand_wait_init_trig = $urandom_range(2, WaitAlertHandshakeDone + 10); + alert_req = 1; fork begin - main_clk.wait_clks(rand_wait_alert_req); - alert_req = 1; - fork - begin - main_clk.wait_clks(1); - check_alert_handshake(.exp_ping_value(0)); - end - // While waiting to check alert handshake, reset alert_req as soon as alert is acked to - // avoid triggering multiple alert requests. - begin - wait (alert_ack == 1); - alert_req = 0; - end - join + `DV_SPINWAIT(wait (alert_ack == 1);, , , "Wait for alert_ack timeout"); + alert_req = 0; + main_clk.wait_clks(WaitAlertHandshakeDone); + end + begin + main_clk.wait_clks(rand_wait_init_trig); + init_trig = prim_mubi_pkg::MuBi4True; + end + join_any + disable fork; + + // Clean up sequence in case alert init or dut init was triggered. + main_clk.wait_clks($urandom_range(1, 10)); + if (init_trig == prim_mubi_pkg::MuBi4True) begin + alert_req = 0; + init_trig = prim_mubi_pkg::MuBi4False; + main_clk.wait_clks(WaitAlertInitDone); + end + if (IsFatal) begin + // For fatal alert, ensure alert keeps firing until reset. + // If only alert_init is triggered, alert_sender side still expect fatal alert to fire. + // This check is valid if the alert is fatal, and alert is requested before init request. + main_clk.wait_clks($urandom_range(10, 100)); + `DV_SPINWAIT(wait (alert_tx.alert_p == 0);, , , "Wait for alert_p goes low"); + `DV_SPINWAIT(wait (alert_tx.alert_p == 1);, , , "Wait for alert_p goes high"); + main_clk.wait_clks(WaitAlertHandshakeDone); + main_clk.apply_reset(); + main_clk.wait_clks(WaitAlertInitDone); + end + $display("[prim_alert_seq] Alert request sequence %0d/10 finished!", num_trans); + end + + // Sequence 2). Alert test sequence. + main_clk.wait_clks($urandom_range(MinHandshakeWait, 10)); + alert_test = 1; + main_clk.wait_clks(1); + alert_test = 0; + repeat ($urandom_range(10, 20)) begin + if (alert_ack == 1) begin + $error("Alert ack should not set high during alert_test sequence!"); + error = 1; + end + main_clk.wait_clks(1); + end + $display("[prim_alert_seq] Alert test sequence finished!"); + + // Sequence 3) Ping request sequence. + // Loop the ping request twice to cover the alert_rx.ping_p/n toggle coverage. + for (int i = 0; i < 2; i++) begin + int rand_wait_init_trig = $urandom_range(1, WaitAlertHandshakeDone + 10); + main_clk.wait_clks($urandom_range(MinHandshakeWait, 10)); + ping_req = 1; + fork + begin + `DV_SPINWAIT(wait (ping_ok == 1);, , , "Wait for ping_ok timeout"); + ping_req = 0; + main_clk.wait_clks(WaitCycle + WaitAlertHandshakeDone); end begin main_clk.wait_clks(rand_wait_init_trig); @@ -235,71 +213,12 @@ module prim_alert_tb; join_any disable fork; if (init_trig == prim_mubi_pkg::MuBi4True) begin - alert_req = 0; + ping_req = 0; main_clk.wait_clks($urandom_range(0, 10)); init_trig = prim_mubi_pkg::MuBi4False; main_clk.wait_clks(WaitAlertInitDone); end - // For fatal alert, ensure alert keeps firing until reset. - // This check is valid if the alert is fatal, and alert is requested before init request. - if (IsFatal && (rand_wait_alert_req + 1) <= rand_wait_init_trig) begin - main_clk.wait_clks($urandom_range(10, 100)); - wait (alert_tx.alert_p == 0); - wait (alert_tx.alert_p == 1); - main_clk.wait_clks(1); - check_alert_handshake(.exp_ping_value(0)); - main_clk.apply_reset(); - main_clk.wait_clks(WaitAlertInitDone); - end - $display("Alert request sequence %0d/10 finished!", num_trans); - end - - // Sequence 2). Alert test sequence. - main_clk.wait_clks($urandom_range(MinHandshakeWait, 10)); - alert_test = 1; - fork : isolation_fork - begin: isolation_fork - fork - begin - main_clk.wait_clks(1); - alert_test = 0; - check_alert_handshake(.exp_ping_value(0)); - // wait random clocks to ensure alert_ack is not set after alert handshake finishes. - main_clk.wait_clks($urandom_range(10, 20)); - end - forever begin - main_clk.wait_clks(1); - if (alert_ack == 1) begin - $error("Alert ack should not set high during alert_test sequence!"); - error = 1; - end - end - join_any - disable fork; - end - join - $display("Alert test sequence finished!"); - - // Sequence 3) Ping request sequence. - // Loop the ping request twice to cover the alert_rx.ping_p/n toggle coverage. - for (int i = 0; i < 2; i++) begin - // Ping is level triggered, so the two exp_ping value should be 1 and 0. - automatic bit exp_ping = (i == 0); - main_clk.wait_clks($urandom_range(MinHandshakeWait, 10)); - ping_req = 1; - fork - begin - main_clk.wait_clks(1); - check_diff_pair(exp_ping, PingPair); - main_clk.wait_clks(WaitCycle); - check_alert_handshake(.exp_ping_value(exp_ping)); - end - begin - wait (ping_ok == 1); - ping_req = 0; - end - join - $display($sformatf("Ping request sequence[%0d] finished!", i)); + $display($sformatf("[prim_alert_seq] Ping request sequence[%0d] finished!", i)); end // Sequence 4) `Ack_p/n` integrity check sequence. @@ -309,31 +228,31 @@ module prim_alert_tb; $assertoff(0, prim_alert_tb.i_alert_receiver.AckDiffOk_A); force i_alert_receiver.alert_rx_o.ack_p = 0; - wait (integ_fail == 1); + `DV_SPINWAIT(wait (integ_fail == 1);, , , "Wait for integrity error timeout"); alert_req = 0; release i_alert_receiver.alert_rx_o.ack_p; // Wait until async or sync signal propogate from alert to ack. main_clk.wait_clks(WaitCycle); $asserton(0, prim_alert_tb.i_alert_receiver.AckDiffOk_A); - $display("Ack signal integrity error sequence finished!"); + $display("[prim_alert_seq] Ack signal integrity error sequence finished!"); // Sequence 5) `Ping_p/n` integrity check sequence. // Disable the assertion at least two clock cycles before sending the ping request, because the // `PingDiffOk_A` assertion has ##2 delay. - $assertoff(2, prim_alert_tb.i_alert_receiver.PingDiffOk_A); + $assertoff(0, prim_alert_tb.i_alert_receiver.PingDiffOk_A); main_clk.wait_clks($urandom_range(MinHandshakeWait, 10)); + force i_alert_receiver.alert_rx_o.ping_n = i_alert_receiver.alert_rx_o.ping_n; ping_req = 1; - force i_alert_receiver.alert_rx_o.ping_n = 1; wait (integ_fail == 1); ping_req = 0; - release i_alert_receiver.alert_rx_o.ping_p; + release i_alert_receiver.alert_rx_o.ping_n; // Ping is the first signal of the handshake, so we can directly turn on the assertion once the // forced ping signal is released. $asserton(0, prim_alert_tb.i_alert_receiver.PingDiffOk_A); - $display("Ping signal integrity error sequence finished!"); + $display("[prim_alert_seq] Ping signal integrity error sequence finished!"); dv_test_status_pkg::dv_test_status(.passed(!error)); $finish(); diff --git a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c index e9ef24ef..e61909f7 100644 --- a/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c +++ b/vendor/lowrisc_ip/ip/prim/dv/prim_secded/secded_enc.c @@ -95,11 +95,11 @@ uint8_t enc_secded_72_64(const uint8_t bytes[8]) { uint8_t enc_secded_inv_22_16(const uint8_t bytes[2]) { uint16_t word = ((uint16_t)bytes[0] << 0) | ((uint16_t)bytes[1] << 8); - return (calc_parity(word & 0x496e, true) << 0) | + return (calc_parity(word & 0x496e, false) << 0) | (calc_parity(word & 0xf20b, true) << 1) | - (calc_parity(word & 0x8ed8, true) << 2) | + (calc_parity(word & 0x8ed8, false) << 2) | (calc_parity(word & 0x7714, true) << 3) | - (calc_parity(word & 0xaca5, true) << 4) | + (calc_parity(word & 0xaca5, false) << 4) | (calc_parity(word & 0x11f3, true) << 5); } @@ -107,11 +107,11 @@ uint8_t enc_secded_inv_28_22(const uint8_t bytes[3]) { uint32_t word = ((uint32_t)bytes[0] << 0) | ((uint32_t)bytes[1] << 8) | ((uint32_t)bytes[2] << 16); - return (calc_parity(word & 0x3003ff, true) << 0) | + return (calc_parity(word & 0x3003ff, false) << 0) | (calc_parity(word & 0x10fc0f, true) << 1) | - (calc_parity(word & 0x271c71, true) << 2) | + (calc_parity(word & 0x271c71, false) << 2) | (calc_parity(word & 0x3b6592, true) << 3) | - (calc_parity(word & 0x3daaa4, true) << 4) | + (calc_parity(word & 0x3daaa4, false) << 4) | (calc_parity(word & 0x3ed348, true) << 5); } @@ -119,13 +119,13 @@ uint8_t enc_secded_inv_39_32(const uint8_t bytes[4]) { uint32_t word = ((uint32_t)bytes[0] << 0) | ((uint32_t)bytes[1] << 8) | ((uint32_t)bytes[2] << 16) | ((uint32_t)bytes[3] << 24); - return (calc_parity(word & 0x2606bd25, true) << 0) | + return (calc_parity(word & 0x2606bd25, false) << 0) | (calc_parity(word & 0xdeba8050, true) << 1) | - (calc_parity(word & 0x413d89aa, true) << 2) | + (calc_parity(word & 0x413d89aa, false) << 2) | (calc_parity(word & 0x31234ed1, true) << 3) | - (calc_parity(word & 0xc2c1323b, true) << 4) | + (calc_parity(word & 0xc2c1323b, false) << 4) | (calc_parity(word & 0x2dcc624c, true) << 5) | - (calc_parity(word & 0x98505586, true) << 6); + (calc_parity(word & 0x98505586, false) << 6); } uint8_t enc_secded_inv_64_57(const uint8_t bytes[8]) { @@ -134,13 +134,13 @@ uint8_t enc_secded_inv_64_57(const uint8_t bytes[8]) { ((uint64_t)bytes[4] << 32) | ((uint64_t)bytes[5] << 40) | ((uint64_t)bytes[6] << 48) | ((uint64_t)bytes[7] << 56); - return (calc_parity(word & 0x103fff800007fff, true) << 0) | + return (calc_parity(word & 0x103fff800007fff, false) << 0) | (calc_parity(word & 0x17c1ff801ff801f, true) << 1) | - (calc_parity(word & 0x1bde1f87e0781e1, true) << 2) | + (calc_parity(word & 0x1bde1f87e0781e1, false) << 2) | (calc_parity(word & 0x1deee3b8e388e22, true) << 3) | - (calc_parity(word & 0x1ef76cdb2c93244, true) << 4) | + (calc_parity(word & 0x1ef76cdb2c93244, false) << 4) | (calc_parity(word & 0x1f7bb56d5525488, true) << 5) | - (calc_parity(word & 0x1fbdda769a46910, true) << 6); + (calc_parity(word & 0x1fbdda769a46910, false) << 6); } uint8_t enc_secded_inv_72_64(const uint8_t bytes[8]) { @@ -149,12 +149,12 @@ uint8_t enc_secded_inv_72_64(const uint8_t bytes[8]) { ((uint64_t)bytes[4] << 32) | ((uint64_t)bytes[5] << 40) | ((uint64_t)bytes[6] << 48) | ((uint64_t)bytes[7] << 56); - return (calc_parity(word & 0xb9000000001fffff, true) << 0) | + return (calc_parity(word & 0xb9000000001fffff, false) << 0) | (calc_parity(word & 0x5e00000fffe0003f, true) << 1) | - (calc_parity(word & 0x67003ff003e007c1, true) << 2) | + (calc_parity(word & 0x67003ff003e007c1, false) << 2) | (calc_parity(word & 0xcd0fc0f03c207842, true) << 3) | - (calc_parity(word & 0xb671c711c4438884, true) << 4) | + (calc_parity(word & 0xb671c711c4438884, false) << 4) | (calc_parity(word & 0xb5b65926488c9108, true) << 5) | - (calc_parity(word & 0xcbdaaa4a91152210, true) << 6) | + (calc_parity(word & 0xcbdaaa4a91152210, false) << 6) | (calc_parity(word & 0x7aed348d221a4420, true) << 7); } diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv index 9953a002..1102d956 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_22_16_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv index 7a334b38..e7da60e9 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_22_16_tb.sv @@ -9,20 +9,19 @@ module prim_secded_22_16_tb ( input rst_ni, input [15:0] data_i, output logic [15:0] data_o, + output logic [21:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [21:0] error_inject_i ); - logic [21:0] data_enc; - prim_secded_22_16_enc prim_secded_22_16_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_22_16_dec prim_secded_22_16_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv index 81c0345c..06a0ab79 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_28_22_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv index 2a3c0cb7..6a6ff792 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_28_22_tb.sv @@ -9,20 +9,19 @@ module prim_secded_28_22_tb ( input rst_ni, input [21:0] data_i, output logic [21:0] data_o, + output logic [27:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [27:0] error_inject_i ); - logic [27:0] data_enc; - prim_secded_28_22_enc prim_secded_28_22_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_28_22_dec prim_secded_28_22_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv index 216412ee..1215d79e 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_39_32_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv index 6dc9b70b..a497af98 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_39_32_tb.sv @@ -9,20 +9,19 @@ module prim_secded_39_32_tb ( input rst_ni, input [31:0] data_i, output logic [31:0] data_o, + output logic [38:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [38:0] error_inject_i ); - logic [38:0] data_enc; - prim_secded_39_32_enc prim_secded_39_32_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_39_32_dec prim_secded_39_32_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv index 9852d521..0acfbe8e 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_64_57_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv index f32c8114..9cc9ef36 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_64_57_tb.sv @@ -9,20 +9,19 @@ module prim_secded_64_57_tb ( input rst_ni, input [56:0] data_i, output logic [56:0] data_o, + output logic [63:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [63:0] error_inject_i ); - logic [63:0] data_enc; - prim_secded_64_57_enc prim_secded_64_57_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_64_57_dec prim_secded_64_57_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv index 2eaa49e9..31a1657c 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_72_64_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv index 543e29a3..f653524d 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_72_64_tb.sv @@ -9,20 +9,19 @@ module prim_secded_72_64_tb ( input rst_ni, input [63:0] data_i, output logic [63:0] data_o, + output logic [71:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [71:0] error_inject_i ); - logic [71:0] data_enc; - prim_secded_72_64_enc prim_secded_72_64_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_72_64_dec prim_secded_72_64_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv index 16bef297..8ecfc234 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_hamming_22_16_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv index 0ba05175..cffae6b6 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_22_16_tb.sv @@ -9,20 +9,19 @@ module prim_secded_hamming_22_16_tb ( input rst_ni, input [15:0] data_i, output logic [15:0] data_o, + output logic [21:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [21:0] error_inject_i ); - logic [21:0] data_enc; - prim_secded_hamming_22_16_enc prim_secded_hamming_22_16_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_hamming_22_16_dec prim_secded_hamming_22_16_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv index 2f70c08c..35eb0bf2 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_hamming_39_32_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv index b94d3482..5a59e151 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_39_32_tb.sv @@ -9,20 +9,19 @@ module prim_secded_hamming_39_32_tb ( input rst_ni, input [31:0] data_i, output logic [31:0] data_o, + output logic [38:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [38:0] error_inject_i ); - logic [38:0] data_enc; - prim_secded_hamming_39_32_enc prim_secded_hamming_39_32_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_hamming_39_32_dec prim_secded_hamming_39_32_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv index 8574601b..bf09d376 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_hamming_72_64_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv index ae1faf61..5f4c8e3b 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_72_64_tb.sv @@ -9,20 +9,19 @@ module prim_secded_hamming_72_64_tb ( input rst_ni, input [63:0] data_i, output logic [63:0] data_o, + output logic [71:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [71:0] error_inject_i ); - logic [71:0] data_enc; - prim_secded_hamming_72_64_enc prim_secded_hamming_72_64_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_hamming_72_64_dec prim_secded_hamming_72_64_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv index 18cc1b7d..4962eb1a 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_hamming_76_68_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv index 201f6c80..a599ce1d 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_hamming_76_68_tb.sv @@ -9,20 +9,19 @@ module prim_secded_hamming_76_68_tb ( input rst_ni, input [67:0] data_i, output logic [67:0] data_o, + output logic [75:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [75:0] error_inject_i ); - logic [75:0] data_enc; - prim_secded_hamming_76_68_enc prim_secded_hamming_76_68_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_hamming_76_68_dec prim_secded_hamming_76_68_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv index 3a3c0a7d..96d0c95a 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_22_16_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv index 8f974d2c..aaa51230 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_22_16_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_22_16_tb ( input rst_ni, input [15:0] data_i, output logic [15:0] data_o, + output logic [21:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [21:0] error_inject_i ); - logic [21:0] data_enc; - prim_secded_inv_22_16_enc prim_secded_inv_22_16_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_22_16_dec prim_secded_inv_22_16_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv index 69e7de00..5b114b2c 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_28_22_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv index bcf5e4cb..ff4caf40 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_28_22_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_28_22_tb ( input rst_ni, input [21:0] data_i, output logic [21:0] data_o, + output logic [27:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [27:0] error_inject_i ); - logic [27:0] data_enc; - prim_secded_inv_28_22_enc prim_secded_inv_28_22_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_28_22_dec prim_secded_inv_28_22_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv index 6a3057a3..a1159648 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_39_32_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv index debec411..b1c5af62 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_39_32_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_39_32_tb ( input rst_ni, input [31:0] data_i, output logic [31:0] data_o, + output logic [38:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [38:0] error_inject_i ); - logic [38:0] data_enc; - prim_secded_inv_39_32_enc prim_secded_inv_39_32_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_39_32_dec prim_secded_inv_39_32_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv index 5dd52d55..81bb663f 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_64_57_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv index afc717b9..fd0751dd 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_64_57_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_64_57_tb ( input rst_ni, input [56:0] data_i, output logic [56:0] data_o, + output logic [63:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [63:0] error_inject_i ); - logic [63:0] data_enc; - prim_secded_inv_64_57_enc prim_secded_inv_64_57_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_64_57_dec prim_secded_inv_64_57_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv index 7e907405..3a37a45b 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_72_64_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv index a9971056..1d2c6d8d 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_72_64_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_72_64_tb ( input rst_ni, input [63:0] data_i, output logic [63:0] data_o, + output logic [71:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [71:0] error_inject_i ); - logic [71:0] data_enc; - prim_secded_inv_72_64_enc prim_secded_inv_72_64_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_72_64_dec prim_secded_inv_72_64_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv index 519d8411..07e95af1 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_hamming_22_16_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv index 9a04c87c..6397d77b 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_22_16_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_hamming_22_16_tb ( input rst_ni, input [15:0] data_i, output logic [15:0] data_o, + output logic [21:0] encoded_o, output logic [5:0] syndrome_o, output logic [1:0] err_o, input [21:0] error_inject_i ); - logic [21:0] data_enc; - prim_secded_inv_hamming_22_16_enc prim_secded_inv_hamming_22_16_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_hamming_22_16_dec prim_secded_inv_hamming_22_16_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv index 026df352..a364b15d 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_hamming_39_32_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv index 3db6b689..7d1fcdf5 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_39_32_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_hamming_39_32_tb ( input rst_ni, input [31:0] data_i, output logic [31:0] data_o, + output logic [38:0] encoded_o, output logic [6:0] syndrome_o, output logic [1:0] err_o, input [38:0] error_inject_i ); - logic [38:0] data_enc; - prim_secded_inv_hamming_39_32_enc prim_secded_inv_hamming_39_32_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_hamming_39_32_dec prim_secded_inv_hamming_39_32_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv index ffa32209..4c4bc3a3 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_hamming_72_64_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv index d881c64b..52acaddb 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_72_64_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_hamming_72_64_tb ( input rst_ni, input [63:0] data_i, output logic [63:0] data_o, + output logic [71:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [71:0] error_inject_i ); - logic [71:0] data_enc; - prim_secded_inv_hamming_72_64_enc prim_secded_inv_hamming_72_64_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_hamming_72_64_dec prim_secded_inv_hamming_72_64_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv index 3ce6d9f4..8c2bac91 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_bind_fpv.sv @@ -12,6 +12,7 @@ module prim_secded_inv_hamming_76_68_bind_fpv; .rst_ni, .data_i, .data_o, + .encoded_o, .syndrome_o, .err_o, .error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv index 7d80ef72..c635bb11 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/tb/prim_secded_inv_hamming_76_68_tb.sv @@ -9,20 +9,19 @@ module prim_secded_inv_hamming_76_68_tb ( input rst_ni, input [67:0] data_i, output logic [67:0] data_o, + output logic [75:0] encoded_o, output logic [7:0] syndrome_o, output logic [1:0] err_o, input [75:0] error_inject_i ); - logic [75:0] data_enc; - prim_secded_inv_hamming_76_68_enc prim_secded_inv_hamming_76_68_enc ( .data_i, - .data_o(data_enc) + .data_o(encoded_o) ); prim_secded_inv_hamming_76_68_dec prim_secded_inv_hamming_76_68_dec ( - .data_i(data_enc ^ error_inject_i), + .data_i(encoded_o ^ error_inject_i), .data_o, .syndrome_o, .err_o diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv index ff752795..93e65c89 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_22_16_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_22_16_assert_fpv ( input rst_ni, input [15:0] data_i, input [15:0] data_o, + input [21:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [21:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv index 7b39b91e..8e5c1d27 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_28_22_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_28_22_assert_fpv ( input rst_ni, input [21:0] data_i, input [21:0] data_o, + input [27:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [27:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv index 9d5f57e6..91a8033a 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_39_32_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_39_32_assert_fpv ( input rst_ni, input [31:0] data_i, input [31:0] data_o, + input [38:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [38:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv index eb324337..b7240609 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_64_57_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_64_57_assert_fpv ( input rst_ni, input [56:0] data_i, input [56:0] data_o, + input [63:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [63:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv index 7fd00664..dfbc2b57 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_72_64_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_72_64_assert_fpv ( input rst_ni, input [63:0] data_i, input [63:0] data_o, + input [71:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [71:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv index 600576b2..213533e0 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_22_16_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_hamming_22_16_assert_fpv ( input rst_ni, input [15:0] data_i, input [15:0] data_o, + input [21:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [21:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv index 1b2c0b4a..0a237318 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_39_32_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_hamming_39_32_assert_fpv ( input rst_ni, input [31:0] data_i, input [31:0] data_o, + input [38:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [38:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv index fed2707d..78657dd5 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_72_64_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_hamming_72_64_assert_fpv ( input rst_ni, input [63:0] data_i, input [63:0] data_o, + input [71:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [71:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv index 45ce2f07..146194a4 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_hamming_76_68_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_hamming_76_68_assert_fpv ( input rst_ni, input [67:0] data_i, input [67:0] data_o, + input [75:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [75:0] error_inject_i diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv index 8f0d802c..d039f351 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_22_16_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_22_16_assert_fpv ( input rst_ni, input [15:0] data_i, input [15:0] data_o, + input [21:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [21:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_22_16_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_22_16_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv index aeee0467..a9b9ad76 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_28_22_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_28_22_assert_fpv ( input rst_ni, input [21:0] data_i, input [21:0] data_o, + input [27:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [27:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_28_22_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_28_22_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv index 27c52cc7..55df09e3 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_39_32_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_39_32_assert_fpv ( input rst_ni, input [31:0] data_i, input [31:0] data_o, + input [38:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [38:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_39_32_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_39_32_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv index 6803f2c1..e1ca7e09 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_64_57_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_64_57_assert_fpv ( input rst_ni, input [56:0] data_i, input [56:0] data_o, + input [63:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [63:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_64_57_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_64_57_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv index 252ea324..c662a1bc 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_72_64_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_72_64_assert_fpv ( input rst_ni, input [63:0] data_i, input [63:0] data_o, + input [71:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [71:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_72_64_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_72_64_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv index 4123a18b..29c97d3f 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_22_16_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_hamming_22_16_assert_fpv ( input rst_ni, input [15:0] data_i, input [15:0] data_o, + input [21:0] encoded_o, input [5:0] syndrome_o, input [1:0] err_o, input [21:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_hamming_22_16_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_hamming_22_16_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv index fe3790eb..a14cc791 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_39_32_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_hamming_39_32_assert_fpv ( input rst_ni, input [31:0] data_i, input [31:0] data_o, + input [38:0] encoded_o, input [6:0] syndrome_o, input [1:0] err_o, input [38:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_hamming_39_32_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_hamming_39_32_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv index e483a3f6..b3159d21 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_72_64_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_hamming_72_64_assert_fpv ( input rst_ni, input [63:0] data_i, input [63:0] data_o, + input [71:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [71:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_hamming_72_64_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_hamming_72_64_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv index 414bbd41..170b0d15 100644 --- a/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv +++ b/vendor/lowrisc_ip/ip/prim/fpv/vip/prim_secded_inv_hamming_76_68_assert_fpv.sv @@ -9,6 +9,7 @@ module prim_secded_inv_hamming_76_68_assert_fpv ( input rst_ni, input [67:0] data_i, input [67:0] data_o, + input [75:0] encoded_o, input [7:0] syndrome_o, input [1:0] err_o, input [75:0] error_inject_i @@ -30,4 +31,9 @@ module prim_secded_inv_hamming_76_68_assert_fpv ( `ASSERT(SyndromeCheck_A, |syndrome_o |-> $countones(error_inject_i) > 0) `ASSERT(SyndromeCheckReverse_A, $countones(error_inject_i) > 0 |-> |syndrome_o) + // Check that all-one and all-zero data does not result in all-one or all-zero codewords + `ASSERT(AllZerosCheck_A, data_i == '0 |-> encoded_o != '0) + `ASSERT(AllOnesCheck_A, data_i == '1 |-> encoded_o != '1) + + endmodule : prim_secded_inv_hamming_76_68_assert_fpv diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt b/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt new file mode 100644 index 00000000..85805e66 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/lint/prim_crc32.vlt @@ -0,0 +1,7 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +`verilator_config + +split_var -module "prim_crc32" -var "crc_stages" diff --git a/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm.waiver b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm.waiver new file mode 100644 index 00000000..61356a8e --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/lint/prim_sparse_fsm.waiver @@ -0,0 +1,11 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +# +# waiver file for prim_sparse_fsm_flop + +waive -rules {IFDEF_CODE} -location {prim_sparse_fsm_flop.sv} -regexp {.*unused_valid_st.*} \ + -comment "The unused_valid_st signal is used purely for DV only and is switched to a constant during lint / synth." + +waive -rules {PARAM_NOT_USED} -location {prim_sparse_fsm_flop.sv} -regexp {.*StateEnumT.*} \ + -comment "The state enum is used only during DV / FPV." \ No newline at end of file diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/README.md b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/README.md new file mode 100644 index 00000000..3bc3ff0b --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/README.md @@ -0,0 +1,20 @@ +CRC32 Calculator Testbench +========================== + +This is a primitive testbench to check the basic functionality of the CRC32 +primitive. It is not intended as a full verification environment. + +It is built via fusesoc (from repository root) + + ```sh + fusesoc --cores-root=. run --target=sim --setup --build lowrisc:prim:crc32_sim + ./build/lowrisc_prim_crc32_sim_0/sim-verilator/Vprim_crc32_sim + ``` + +`predv_expected.txt` contains the expected output which can be generated by the +`expected_out.py` python script. This is simply a dump of expected CRC values +as test data is fed in. + +The `run_predv.sh` script will build and run the simulator and diff the output +against the expected output, producing an error if this results in a mismatch or +any other part of the process fails. diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py new file mode 100644 index 00000000..62a27eef --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/expected_out.py @@ -0,0 +1,18 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +# Generates expected outputs for simple prim_crc32 testbench + +import binascii + +test_data = 0xdeadbeef +crc = 0x0 +for i in range(2, 100): + print(f'{crc:08x}') + test_data_bytes = test_data.to_bytes(4, byteorder='little') + crc = binascii.crc32(test_data_bytes, crc) + test_count_bytes = i.to_bytes(1, byteorder='little') + crc = binascii.crc32(test_count_bytes, crc) + crc = binascii.crc32(test_count_bytes, crc) + test_data += 1 diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/predv_expected.txt b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/predv_expected.txt new file mode 100644 index 00000000..fa4fe772 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/predv_expected.txt @@ -0,0 +1,98 @@ +00000000 +1d0964cd +29a7761a +a8136dd4 +0eae6f80 +a8e41048 +7498536b +93f207e1 +f1f4fb6f +4fcaa2d5 +81e6d0f6 +e8606fcc +b8aabef3 +f527ac6c +175f8d02 +56e3b9ef +66ecca59 +117d8434 +a12e0527 +ae7562ad +c59442a9 +ccfdfcfb +18aa511b +867869b2 +ba624d42 +f01ca74c +c1d575f9 +4c7225ec +f6a3a319 +a2031a67 +db3bb2b5 +8fc18cf3 +223760b3 +cb9e1695 +6635e9e8 +4a5eb08d +129c3f21 +886741ae +f39924e2 +38b72216 +0c6b5e6c +ac68e7b4 +1b55521f +68802c7e +427f42f4 +49f1a87d +60e02d95 +b7c616c3 +5ef7d490 +d0e4b045 +cc929600 +9c97a2ee +57926ba1 +9ec501fd +8db60d26 +8b2ecc6b +786cd232 +73da2e0d +a0346b8c +46dd166b +a24ec8f6 +4d15ebb9 +f8d12885 +bc27e2c3 +fa95e4d6 +9cda24e1 +7f01b54f +f0f94bd1 +61a2c352 +e1b5d5cf +f00ff7b9 +2525d043 +4e88d2d0 +2d41d198 +577444be +1b8d3f21 +13d91499 +60558305 +ebf640d8 +d2534f66 +c944eee3 +6ebb2fc5 +fd61fb52 +2db28ba5 +8d1712f5 +873a3ae8 +e5158c32 +a64e3c12 +377df973 +b2171673 +34bc3b73 +6846f931 +ddf6bb83 +0f58a169 +c277a8a9 +9a4dbab3 +37914b18 +f544ca16 diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc new file mode 100644 index 00000000..9403703d --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.cc @@ -0,0 +1,34 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +#include +#include + +#include "verilated_toplevel.h" +#include "verilator_sim_ctrl.h" + +int main(int argc, char **argv) { + prim_crc32_sim top; + VerilatorSimCtrl &simctrl = VerilatorSimCtrl::GetInstance(); + simctrl.SetTop(&top, &top.IO_CLK, &top.IO_RST_N, + VerilatorSimCtrlFlags::ResetPolarityNegative); + + bool exit_app = false; + int ret_code = simctrl.ParseCommandArgs(argc, argv, exit_app); + if (exit_app) { + return ret_code; + } + + std::cout << "Simulation" << std::endl + << "==================" << std::endl + << std::endl; + + simctrl.RunSimulation(); + + if (!simctrl.WasSimulationSuccessful()) { + return 1; + } + + return 0; +} diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core new file mode 100644 index 00000000..7c6e9d4d --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.core @@ -0,0 +1,61 @@ +CAPI=2: +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +name: "lowrisc:prim:crc32_sim" +description: "Verilator simulation of CRC32 calculation block" + +filesets: + files_crc32: + depend: + - lowrisc:prim:crc32 + files_verilator: + depend: + - lowrisc:dv_verilator:simutil_verilator + files: + - prim_crc32_sim.cc: { file_type: cppSource } + - prim_crc32_sim.sv: { file_type: systemVerilogSource } + +targets: + default: &default_target + filesets: + - files_crc32 + - files_verilator + toplevel: prim_crc32_sim + + lint: + <<: *default_target + default_tool: verilator + tools: + verilator: + mode: lint-only + verilator_options: + - "-Wall" + # RAM primitives wider than 64bit (required for ECC) fail to build in + # Verilator without increasing the unroll count (see Verilator#1266) + - "--unroll-count 72" + + sim: + <<: *default_target + default_tool: verilator + tools: + vcs: + vcs_options: + - '-xlrm uniq_prior_final' + - '-debug_access+r' + verilator: + mode: cc + verilator_options: + # Disabling tracing reduces compile times but doesn't have a + # huge influence on runtime performance. + - '--trace' + - '--trace-fst' # this requires -DVM_TRACE_FMT_FST in CFLAGS below! + - '--trace-structs' + - '--trace-params' + - '--trace-max-array 1024' + - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=prim_crc32_sim"' + - '-LDFLAGS "-pthread -lutil -lelf"' + - "-Wall" + # RAM primitives wider than 64bit (required for ECC) fail to build in + # Verilator without increasing the unroll count (see Verilator#1266) + - "--unroll-count 72" diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv new file mode 100644 index 00000000..041da16a --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/prim_crc32_sim.sv @@ -0,0 +1,50 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 + +module prim_crc32_sim ( + input IO_CLK, + input IO_RST_N +); + logic [47:0] test_crc_in; + logic [31:0] test_data; + logic [31:0] crc_out; + logic [31:0] cnt; + logic set_crc; + + assign test_crc_in = {cnt[7:0], cnt[7:0], test_data}; + + always @(posedge IO_CLK or negedge IO_RST_N) begin + if (!IO_RST_N) begin + test_data <= 32'hdeadbeee; + cnt <= '0; + set_crc <= 1'b0; + end else begin + if (cnt == 0) begin + set_crc <= 1'b1; + cnt <= cnt + 32'd1; + end else if (cnt < 100) begin + set_crc <= 1'b0; + test_data <= test_data + 32'd1; + cnt <= cnt + 32'd1; + + $display("%08x", crc_out); + end else begin + $finish(); + end + end + end + + prim_crc32 #(.BytesPerWord(6)) dut ( + .clk_i(IO_CLK), + .rst_ni(IO_RST_N), + + .set_crc_i(set_crc), + .crc_in_i(32'h00000000), + + .data_valid_i(~set_crc), + .data_i(test_crc_in), + .crc_out_o(crc_out) + ); + +endmodule diff --git a/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh new file mode 100755 index 00000000..48029c45 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/pre_dv/prim_crc32/run_predv.sh @@ -0,0 +1,49 @@ +#!/bin/bash +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +# Runs the CRC32 pre-dv testbench (build simulation, +# runs simulation and checks expected output) + +fail() { + echo >&2 "PRE-DV FAILURE: $@" + exit 1 +} + +set -o pipefail + +SCRIPT_DIR="$(dirname "$(readlink -e "$BASH_SOURCE")")" +UTIL_DIR="$(readlink -e "$SCRIPT_DIR/../../../../../util")" || \ + fail "Can't find OpenTitan util dir" + +source "$UTIL_DIR/build_consts.sh" + +PREDV_DIR=$REPO_TOP/hw/ip/prim/pre_dv/prim_crc32 + +(cd $REPO_TOP; + fusesoc --cores-root=. run --target=sim --setup --build \ + lowrisc:prim:crc32_sim || fail "HW Sim build failed") + +RUN_LOG=`mktemp` +trap "rm -rf $RUN_LOG" EXIT + +timeout 5s \ + $REPO_TOP/build/lowrisc_prim_crc32_sim_0/sim-verilator/Vprim_crc32_sim | \ + tee $RUN_LOG + +if [ $? -eq 124 ]; then + fail "Simulation timeout" +fi + +if [ $? -ne 0 ]; then + fail "Simulator run failed" +fi + +grep -A 97 "00000000" $RUN_LOG | diff $PREDV_DIR/predv_expected.txt - + +if [ $? -eq 0 ]; then + echo "PRE-DV PASS" +else + fail "Simulator output does not match expected output" +fi diff --git a/vendor/lowrisc_ip/ip/prim/prim_crc32.core b/vendor/lowrisc_ip/ip/prim/prim_crc32.core new file mode 100644 index 00000000..178b68c7 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/prim_crc32.core @@ -0,0 +1,38 @@ +CAPI=2: +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +name: "lowrisc:prim:crc32" +description: "CRC32 Checksum Calculator" +filesets: + files_rtl: + files: + - rtl/prim_crc32.sv + file_type: systemVerilogSource + + files_verilator_waiver: + depend: + # common waivers + - lowrisc:lint:common + files: + - lint/prim_crc32.vlt + file_type: vlt + + files_ascentlint_waiver: + depend: + # common waivers + - lowrisc:lint:common + + files_veriblelint_waiver: + depend: + # common waivers + - lowrisc:lint:common + +targets: + default: + filesets: + - tool_verilator ? (files_verilator_waiver) + - tool_ascentlint ? (files_ascentlint_waiver) + - tool_veriblelint ? (files_veriblelint_waiver) + - files_rtl diff --git a/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core b/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core index 53670855..54fa810f 100644 --- a/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core +++ b/vendor/lowrisc_ip/ip/prim/prim_sparse_fsm.core @@ -22,6 +22,10 @@ filesets: depend: # common waivers - lowrisc:lint:common + files: + - lint/prim_sparse_fsm.waiver + file_type: waiver + files_veriblelint_waiver: depend: diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv index 2fd24d0e..b4f7f7fb 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_alert_receiver.sv @@ -272,6 +272,9 @@ module prim_alert_receiver // shift sequence two cycles to the right to avoid reset effects. `ASSERT(PingDiffOk_A, ##2 $past(send_init) ^ alert_rx_o.ping_p ^ alert_rx_o.ping_n) `ASSERT(AckDiffOk_A, ##2 $past(send_init) ^ alert_rx_o.ack_p ^ alert_rx_o.ack_n) + `ASSERT(InitReq_A, mubi4_test_true_strict(init_trig_i) && + !(state_q inside {InitReq, InitAckWait}) |=> send_init) + // ping request at input -> need to see encoded ping request `ASSERT(PingRequest0_A, ##1 $rose(ping_req_i) && !send_init |=> $changed(alert_rx_o.ping_p)) // ping response implies it has been requested diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv new file mode 100644 index 00000000..f3cdb164 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_crc32.sv @@ -0,0 +1,324 @@ +// Copyright lowRISC contributors. +// Licensed under the Apache License, Version 2.0, see LICENSE for details. +// SPDX-License-Identifier: Apache-2.0 +// +// CRC32 calculator +// +// This module takes in n-bits data words (n defined by BytePerWord parameter) and updates an +// internally stored CRC with each valid data word. The polynomial used is the standard CRC32 IEEE +// one. An interface is provided to set the internal CRC to an arbitrary value. The output CRC is an +// inverted version of the internally stored CRC and the input CRC is inverted before being stored. +// This is done so results match existing widely used software libraries (e.g. the crc32 +// functionality available in Python). Note that a initial CRC of 0x0 (corresponding to an internal +// CRC of 0xffffffff) must be used to match results generated elsewhere. + + +module prim_crc32 #( + parameter int unsigned BytesPerWord = 4 +) ( + input logic clk_i, + input logic rst_ni, + + input logic set_crc_i, + input logic [31:0] crc_in_i, + + input logic data_valid_i, + input logic [BytesPerWord*8-1:0] data_i, + + output logic [31:0] crc_out_o +); + // Generated using hw/ip/prim/util/prim_crc32_table_gen.py + function automatic logic [31:0] crc32_byte_calc(logic [7:0] b); + unique case (b) + 8'hff: crc32_byte_calc = 32'h2d02ef8d; + 8'hfe: crc32_byte_calc = 32'h5a05df1b; + 8'hfd: crc32_byte_calc = 32'hc30c8ea1; + 8'hfc: crc32_byte_calc = 32'hb40bbe37; + 8'hfb: crc32_byte_calc = 32'h2a6f2b94; + 8'hfa: crc32_byte_calc = 32'h5d681b02; + 8'hf9: crc32_byte_calc = 32'hc4614ab8; + 8'hf8: crc32_byte_calc = 32'hb3667a2e; + 8'hf7: crc32_byte_calc = 32'h23d967bf; + 8'hf6: crc32_byte_calc = 32'h54de5729; + 8'hf5: crc32_byte_calc = 32'hcdd70693; + 8'hf4: crc32_byte_calc = 32'hbad03605; + 8'hf3: crc32_byte_calc = 32'h24b4a3a6; + 8'hf2: crc32_byte_calc = 32'h53b39330; + 8'hf1: crc32_byte_calc = 32'hcabac28a; + 8'hf0: crc32_byte_calc = 32'hbdbdf21c; + 8'hef: crc32_byte_calc = 32'h30b5ffe9; + 8'hee: crc32_byte_calc = 32'h47b2cf7f; + 8'hed: crc32_byte_calc = 32'hdebb9ec5; + 8'hec: crc32_byte_calc = 32'ha9bcae53; + 8'heb: crc32_byte_calc = 32'h37d83bf0; + 8'hea: crc32_byte_calc = 32'h40df0b66; + 8'he9: crc32_byte_calc = 32'hd9d65adc; + 8'he8: crc32_byte_calc = 32'haed16a4a; + 8'he7: crc32_byte_calc = 32'h3e6e77db; + 8'he6: crc32_byte_calc = 32'h4969474d; + 8'he5: crc32_byte_calc = 32'hd06016f7; + 8'he4: crc32_byte_calc = 32'ha7672661; + 8'he3: crc32_byte_calc = 32'h3903b3c2; + 8'he2: crc32_byte_calc = 32'h4e048354; + 8'he1: crc32_byte_calc = 32'hd70dd2ee; + 8'he0: crc32_byte_calc = 32'ha00ae278; + 8'hdf: crc32_byte_calc = 32'h166ccf45; + 8'hde: crc32_byte_calc = 32'h616bffd3; + 8'hdd: crc32_byte_calc = 32'hf862ae69; + 8'hdc: crc32_byte_calc = 32'h8f659eff; + 8'hdb: crc32_byte_calc = 32'h11010b5c; + 8'hda: crc32_byte_calc = 32'h66063bca; + 8'hd9: crc32_byte_calc = 32'hff0f6a70; + 8'hd8: crc32_byte_calc = 32'h88085ae6; + 8'hd7: crc32_byte_calc = 32'h18b74777; + 8'hd6: crc32_byte_calc = 32'h6fb077e1; + 8'hd5: crc32_byte_calc = 32'hf6b9265b; + 8'hd4: crc32_byte_calc = 32'h81be16cd; + 8'hd3: crc32_byte_calc = 32'h1fda836e; + 8'hd2: crc32_byte_calc = 32'h68ddb3f8; + 8'hd1: crc32_byte_calc = 32'hf1d4e242; + 8'hd0: crc32_byte_calc = 32'h86d3d2d4; + 8'hcf: crc32_byte_calc = 32'h0bdbdf21; + 8'hce: crc32_byte_calc = 32'h7cdcefb7; + 8'hcd: crc32_byte_calc = 32'he5d5be0d; + 8'hcc: crc32_byte_calc = 32'h92d28e9b; + 8'hcb: crc32_byte_calc = 32'h0cb61b38; + 8'hca: crc32_byte_calc = 32'h7bb12bae; + 8'hc9: crc32_byte_calc = 32'he2b87a14; + 8'hc8: crc32_byte_calc = 32'h95bf4a82; + 8'hc7: crc32_byte_calc = 32'h05005713; + 8'hc6: crc32_byte_calc = 32'h72076785; + 8'hc5: crc32_byte_calc = 32'heb0e363f; + 8'hc4: crc32_byte_calc = 32'h9c0906a9; + 8'hc3: crc32_byte_calc = 32'h026d930a; + 8'hc2: crc32_byte_calc = 32'h756aa39c; + 8'hc1: crc32_byte_calc = 32'hec63f226; + 8'hc0: crc32_byte_calc = 32'h9b64c2b0; + 8'hbf: crc32_byte_calc = 32'h5bdeae1d; + 8'hbe: crc32_byte_calc = 32'h2cd99e8b; + 8'hbd: crc32_byte_calc = 32'hb5d0cf31; + 8'hbc: crc32_byte_calc = 32'hc2d7ffa7; + 8'hbb: crc32_byte_calc = 32'h5cb36a04; + 8'hba: crc32_byte_calc = 32'h2bb45a92; + 8'hb9: crc32_byte_calc = 32'hb2bd0b28; + 8'hb8: crc32_byte_calc = 32'hc5ba3bbe; + 8'hb7: crc32_byte_calc = 32'h5505262f; + 8'hb6: crc32_byte_calc = 32'h220216b9; + 8'hb5: crc32_byte_calc = 32'hbb0b4703; + 8'hb4: crc32_byte_calc = 32'hcc0c7795; + 8'hb3: crc32_byte_calc = 32'h5268e236; + 8'hb2: crc32_byte_calc = 32'h256fd2a0; + 8'hb1: crc32_byte_calc = 32'hbc66831a; + 8'hb0: crc32_byte_calc = 32'hcb61b38c; + 8'haf: crc32_byte_calc = 32'h4669be79; + 8'hae: crc32_byte_calc = 32'h316e8eef; + 8'had: crc32_byte_calc = 32'ha867df55; + 8'hac: crc32_byte_calc = 32'hdf60efc3; + 8'hab: crc32_byte_calc = 32'h41047a60; + 8'haa: crc32_byte_calc = 32'h36034af6; + 8'ha9: crc32_byte_calc = 32'haf0a1b4c; + 8'ha8: crc32_byte_calc = 32'hd80d2bda; + 8'ha7: crc32_byte_calc = 32'h48b2364b; + 8'ha6: crc32_byte_calc = 32'h3fb506dd; + 8'ha5: crc32_byte_calc = 32'ha6bc5767; + 8'ha4: crc32_byte_calc = 32'hd1bb67f1; + 8'ha3: crc32_byte_calc = 32'h4fdff252; + 8'ha2: crc32_byte_calc = 32'h38d8c2c4; + 8'ha1: crc32_byte_calc = 32'ha1d1937e; + 8'ha0: crc32_byte_calc = 32'hd6d6a3e8; + 8'h9f: crc32_byte_calc = 32'h60b08ed5; + 8'h9e: crc32_byte_calc = 32'h17b7be43; + 8'h9d: crc32_byte_calc = 32'h8ebeeff9; + 8'h9c: crc32_byte_calc = 32'hf9b9df6f; + 8'h9b: crc32_byte_calc = 32'h67dd4acc; + 8'h9a: crc32_byte_calc = 32'h10da7a5a; + 8'h99: crc32_byte_calc = 32'h89d32be0; + 8'h98: crc32_byte_calc = 32'hfed41b76; + 8'h97: crc32_byte_calc = 32'h6e6b06e7; + 8'h96: crc32_byte_calc = 32'h196c3671; + 8'h95: crc32_byte_calc = 32'h806567cb; + 8'h94: crc32_byte_calc = 32'hf762575d; + 8'h93: crc32_byte_calc = 32'h6906c2fe; + 8'h92: crc32_byte_calc = 32'h1e01f268; + 8'h91: crc32_byte_calc = 32'h8708a3d2; + 8'h90: crc32_byte_calc = 32'hf00f9344; + 8'h8f: crc32_byte_calc = 32'h7d079eb1; + 8'h8e: crc32_byte_calc = 32'h0a00ae27; + 8'h8d: crc32_byte_calc = 32'h9309ff9d; + 8'h8c: crc32_byte_calc = 32'he40ecf0b; + 8'h8b: crc32_byte_calc = 32'h7a6a5aa8; + 8'h8a: crc32_byte_calc = 32'h0d6d6a3e; + 8'h89: crc32_byte_calc = 32'h94643b84; + 8'h88: crc32_byte_calc = 32'he3630b12; + 8'h87: crc32_byte_calc = 32'h73dc1683; + 8'h86: crc32_byte_calc = 32'h04db2615; + 8'h85: crc32_byte_calc = 32'h9dd277af; + 8'h84: crc32_byte_calc = 32'head54739; + 8'h83: crc32_byte_calc = 32'h74b1d29a; + 8'h82: crc32_byte_calc = 32'h03b6e20c; + 8'h81: crc32_byte_calc = 32'h9abfb3b6; + 8'h80: crc32_byte_calc = 32'hedb88320; + 8'h7f: crc32_byte_calc = 32'hc0ba6cad; + 8'h7e: crc32_byte_calc = 32'hb7bd5c3b; + 8'h7d: crc32_byte_calc = 32'h2eb40d81; + 8'h7c: crc32_byte_calc = 32'h59b33d17; + 8'h7b: crc32_byte_calc = 32'hc7d7a8b4; + 8'h7a: crc32_byte_calc = 32'hb0d09822; + 8'h79: crc32_byte_calc = 32'h29d9c998; + 8'h78: crc32_byte_calc = 32'h5edef90e; + 8'h77: crc32_byte_calc = 32'hce61e49f; + 8'h76: crc32_byte_calc = 32'hb966d409; + 8'h75: crc32_byte_calc = 32'h206f85b3; + 8'h74: crc32_byte_calc = 32'h5768b525; + 8'h73: crc32_byte_calc = 32'hc90c2086; + 8'h72: crc32_byte_calc = 32'hbe0b1010; + 8'h71: crc32_byte_calc = 32'h270241aa; + 8'h70: crc32_byte_calc = 32'h5005713c; + 8'h6f: crc32_byte_calc = 32'hdd0d7cc9; + 8'h6e: crc32_byte_calc = 32'haa0a4c5f; + 8'h6d: crc32_byte_calc = 32'h33031de5; + 8'h6c: crc32_byte_calc = 32'h44042d73; + 8'h6b: crc32_byte_calc = 32'hda60b8d0; + 8'h6a: crc32_byte_calc = 32'had678846; + 8'h69: crc32_byte_calc = 32'h346ed9fc; + 8'h68: crc32_byte_calc = 32'h4369e96a; + 8'h67: crc32_byte_calc = 32'hd3d6f4fb; + 8'h66: crc32_byte_calc = 32'ha4d1c46d; + 8'h65: crc32_byte_calc = 32'h3dd895d7; + 8'h64: crc32_byte_calc = 32'h4adfa541; + 8'h63: crc32_byte_calc = 32'hd4bb30e2; + 8'h62: crc32_byte_calc = 32'ha3bc0074; + 8'h61: crc32_byte_calc = 32'h3ab551ce; + 8'h60: crc32_byte_calc = 32'h4db26158; + 8'h5f: crc32_byte_calc = 32'hfbd44c65; + 8'h5e: crc32_byte_calc = 32'h8cd37cf3; + 8'h5d: crc32_byte_calc = 32'h15da2d49; + 8'h5c: crc32_byte_calc = 32'h62dd1ddf; + 8'h5b: crc32_byte_calc = 32'hfcb9887c; + 8'h5a: crc32_byte_calc = 32'h8bbeb8ea; + 8'h59: crc32_byte_calc = 32'h12b7e950; + 8'h58: crc32_byte_calc = 32'h65b0d9c6; + 8'h57: crc32_byte_calc = 32'hf50fc457; + 8'h56: crc32_byte_calc = 32'h8208f4c1; + 8'h55: crc32_byte_calc = 32'h1b01a57b; + 8'h54: crc32_byte_calc = 32'h6c0695ed; + 8'h53: crc32_byte_calc = 32'hf262004e; + 8'h52: crc32_byte_calc = 32'h856530d8; + 8'h51: crc32_byte_calc = 32'h1c6c6162; + 8'h50: crc32_byte_calc = 32'h6b6b51f4; + 8'h4f: crc32_byte_calc = 32'he6635c01; + 8'h4e: crc32_byte_calc = 32'h91646c97; + 8'h4d: crc32_byte_calc = 32'h086d3d2d; + 8'h4c: crc32_byte_calc = 32'h7f6a0dbb; + 8'h4b: crc32_byte_calc = 32'he10e9818; + 8'h4a: crc32_byte_calc = 32'h9609a88e; + 8'h49: crc32_byte_calc = 32'h0f00f934; + 8'h48: crc32_byte_calc = 32'h7807c9a2; + 8'h47: crc32_byte_calc = 32'he8b8d433; + 8'h46: crc32_byte_calc = 32'h9fbfe4a5; + 8'h45: crc32_byte_calc = 32'h06b6b51f; + 8'h44: crc32_byte_calc = 32'h71b18589; + 8'h43: crc32_byte_calc = 32'hefd5102a; + 8'h42: crc32_byte_calc = 32'h98d220bc; + 8'h41: crc32_byte_calc = 32'h01db7106; + 8'h40: crc32_byte_calc = 32'h76dc4190; + 8'h3f: crc32_byte_calc = 32'hb6662d3d; + 8'h3e: crc32_byte_calc = 32'hc1611dab; + 8'h3d: crc32_byte_calc = 32'h58684c11; + 8'h3c: crc32_byte_calc = 32'h2f6f7c87; + 8'h3b: crc32_byte_calc = 32'hb10be924; + 8'h3a: crc32_byte_calc = 32'hc60cd9b2; + 8'h39: crc32_byte_calc = 32'h5f058808; + 8'h38: crc32_byte_calc = 32'h2802b89e; + 8'h37: crc32_byte_calc = 32'hb8bda50f; + 8'h36: crc32_byte_calc = 32'hcfba9599; + 8'h35: crc32_byte_calc = 32'h56b3c423; + 8'h34: crc32_byte_calc = 32'h21b4f4b5; + 8'h33: crc32_byte_calc = 32'hbfd06116; + 8'h32: crc32_byte_calc = 32'hc8d75180; + 8'h31: crc32_byte_calc = 32'h51de003a; + 8'h30: crc32_byte_calc = 32'h26d930ac; + 8'h2f: crc32_byte_calc = 32'habd13d59; + 8'h2e: crc32_byte_calc = 32'hdcd60dcf; + 8'h2d: crc32_byte_calc = 32'h45df5c75; + 8'h2c: crc32_byte_calc = 32'h32d86ce3; + 8'h2b: crc32_byte_calc = 32'hacbcf940; + 8'h2a: crc32_byte_calc = 32'hdbbbc9d6; + 8'h29: crc32_byte_calc = 32'h42b2986c; + 8'h28: crc32_byte_calc = 32'h35b5a8fa; + 8'h27: crc32_byte_calc = 32'ha50ab56b; + 8'h26: crc32_byte_calc = 32'hd20d85fd; + 8'h25: crc32_byte_calc = 32'h4b04d447; + 8'h24: crc32_byte_calc = 32'h3c03e4d1; + 8'h23: crc32_byte_calc = 32'ha2677172; + 8'h22: crc32_byte_calc = 32'hd56041e4; + 8'h21: crc32_byte_calc = 32'h4c69105e; + 8'h20: crc32_byte_calc = 32'h3b6e20c8; + 8'h1f: crc32_byte_calc = 32'h8d080df5; + 8'h1e: crc32_byte_calc = 32'hfa0f3d63; + 8'h1d: crc32_byte_calc = 32'h63066cd9; + 8'h1c: crc32_byte_calc = 32'h14015c4f; + 8'h1b: crc32_byte_calc = 32'h8a65c9ec; + 8'h1a: crc32_byte_calc = 32'hfd62f97a; + 8'h19: crc32_byte_calc = 32'h646ba8c0; + 8'h18: crc32_byte_calc = 32'h136c9856; + 8'h17: crc32_byte_calc = 32'h83d385c7; + 8'h16: crc32_byte_calc = 32'hf4d4b551; + 8'h15: crc32_byte_calc = 32'h6ddde4eb; + 8'h14: crc32_byte_calc = 32'h1adad47d; + 8'h13: crc32_byte_calc = 32'h84be41de; + 8'h12: crc32_byte_calc = 32'hf3b97148; + 8'h11: crc32_byte_calc = 32'h6ab020f2; + 8'h10: crc32_byte_calc = 32'h1db71064; + 8'h0f: crc32_byte_calc = 32'h90bf1d91; + 8'h0e: crc32_byte_calc = 32'he7b82d07; + 8'h0d: crc32_byte_calc = 32'h7eb17cbd; + 8'h0c: crc32_byte_calc = 32'h09b64c2b; + 8'h0b: crc32_byte_calc = 32'h97d2d988; + 8'h0a: crc32_byte_calc = 32'he0d5e91e; + 8'h09: crc32_byte_calc = 32'h79dcb8a4; + 8'h08: crc32_byte_calc = 32'h0edb8832; + 8'h07: crc32_byte_calc = 32'h9e6495a3; + 8'h06: crc32_byte_calc = 32'he963a535; + 8'h05: crc32_byte_calc = 32'h706af48f; + 8'h04: crc32_byte_calc = 32'h076dc419; + 8'h03: crc32_byte_calc = 32'h990951ba; + 8'h02: crc32_byte_calc = 32'hee0e612c; + 8'h01: crc32_byte_calc = 32'h77073096; + 8'h00: crc32_byte_calc = 32'h00000000; + default: crc32_byte_calc = '0; + endcase + endfunction + + logic [31:0] crc_d, crc_q; + logic crc_en; + logic [31:0] crc_stages[BytesPerWord + 1]; + + assign crc_en = set_crc_i | data_valid_i; + + assign crc_stages[0] = crc_q; + + for (genvar i = 0;i < BytesPerWord; ++i) begin : g_crc_stages + assign crc_stages[i + 1] = + {8'h00, crc_stages[i][31:8]} ^ + crc32_byte_calc(crc_stages[i][7:0] ^ data_i[i * 8 +: 8]); + end + + always_comb begin + if (set_crc_i) begin + crc_d = ~crc_in_i; + end else begin + crc_d = crc_stages[BytesPerWord]; + end + end + + always @(posedge clk_i or negedge rst_ni) begin + if (!rst_ni) begin + crc_q <= 32'hFFFFFFFF; + end else if (crc_en) begin + crc_q <= crc_d; + end + end + + assign crc_out_o = ~crc_q; +endmodule diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv index 41ad31b9..47d30e5b 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_22_16_enc.sv @@ -11,12 +11,12 @@ module prim_secded_22_16_enc ( always_comb begin : p_encode data_o = 22'(data_i); - data_o[16] = ^(data_o & 22'h00496E); - data_o[17] = ^(data_o & 22'h00F20B); - data_o[18] = ^(data_o & 22'h008ED8); - data_o[19] = ^(data_o & 22'h007714); - data_o[20] = ^(data_o & 22'h00ACA5); - data_o[21] = ^(data_o & 22'h0011F3); + data_o[16] = 0 ^ ^(data_o & 22'h00496E); + data_o[17] = 0 ^ ^(data_o & 22'h00F20B); + data_o[18] = 0 ^ ^(data_o & 22'h008ED8); + data_o[19] = 0 ^ ^(data_o & 22'h007714); + data_o[20] = 0 ^ ^(data_o & 22'h00ACA5); + data_o[21] = 0 ^ ^(data_o & 22'h0011F3); end endmodule : prim_secded_22_16_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv index f4e451af..8aa3d902 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_28_22_enc.sv @@ -11,12 +11,12 @@ module prim_secded_28_22_enc ( always_comb begin : p_encode data_o = 28'(data_i); - data_o[22] = ^(data_o & 28'h03003FF); - data_o[23] = ^(data_o & 28'h010FC0F); - data_o[24] = ^(data_o & 28'h0271C71); - data_o[25] = ^(data_o & 28'h03B6592); - data_o[26] = ^(data_o & 28'h03DAAA4); - data_o[27] = ^(data_o & 28'h03ED348); + data_o[22] = 0 ^ ^(data_o & 28'h03003FF); + data_o[23] = 0 ^ ^(data_o & 28'h010FC0F); + data_o[24] = 0 ^ ^(data_o & 28'h0271C71); + data_o[25] = 0 ^ ^(data_o & 28'h03B6592); + data_o[26] = 0 ^ ^(data_o & 28'h03DAAA4); + data_o[27] = 0 ^ ^(data_o & 28'h03ED348); end endmodule : prim_secded_28_22_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv index 5668ff3a..cbe31954 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_39_32_enc.sv @@ -11,13 +11,13 @@ module prim_secded_39_32_enc ( always_comb begin : p_encode data_o = 39'(data_i); - data_o[32] = ^(data_o & 39'h002606BD25); - data_o[33] = ^(data_o & 39'h00DEBA8050); - data_o[34] = ^(data_o & 39'h00413D89AA); - data_o[35] = ^(data_o & 39'h0031234ED1); - data_o[36] = ^(data_o & 39'h00C2C1323B); - data_o[37] = ^(data_o & 39'h002DCC624C); - data_o[38] = ^(data_o & 39'h0098505586); + data_o[32] = 0 ^ ^(data_o & 39'h002606BD25); + data_o[33] = 0 ^ ^(data_o & 39'h00DEBA8050); + data_o[34] = 0 ^ ^(data_o & 39'h00413D89AA); + data_o[35] = 0 ^ ^(data_o & 39'h0031234ED1); + data_o[36] = 0 ^ ^(data_o & 39'h00C2C1323B); + data_o[37] = 0 ^ ^(data_o & 39'h002DCC624C); + data_o[38] = 0 ^ ^(data_o & 39'h0098505586); end endmodule : prim_secded_39_32_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv index 6e837262..6c89d91b 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_64_57_enc.sv @@ -11,13 +11,13 @@ module prim_secded_64_57_enc ( always_comb begin : p_encode data_o = 64'(data_i); - data_o[57] = ^(data_o & 64'h0103FFF800007FFF); - data_o[58] = ^(data_o & 64'h017C1FF801FF801F); - data_o[59] = ^(data_o & 64'h01BDE1F87E0781E1); - data_o[60] = ^(data_o & 64'h01DEEE3B8E388E22); - data_o[61] = ^(data_o & 64'h01EF76CDB2C93244); - data_o[62] = ^(data_o & 64'h01F7BB56D5525488); - data_o[63] = ^(data_o & 64'h01FBDDA769A46910); + data_o[57] = 0 ^ ^(data_o & 64'h0103FFF800007FFF); + data_o[58] = 0 ^ ^(data_o & 64'h017C1FF801FF801F); + data_o[59] = 0 ^ ^(data_o & 64'h01BDE1F87E0781E1); + data_o[60] = 0 ^ ^(data_o & 64'h01DEEE3B8E388E22); + data_o[61] = 0 ^ ^(data_o & 64'h01EF76CDB2C93244); + data_o[62] = 0 ^ ^(data_o & 64'h01F7BB56D5525488); + data_o[63] = 0 ^ ^(data_o & 64'h01FBDDA769A46910); end endmodule : prim_secded_64_57_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv index 5e9f674d..d3957b1f 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_72_64_enc.sv @@ -11,14 +11,14 @@ module prim_secded_72_64_enc ( always_comb begin : p_encode data_o = 72'(data_i); - data_o[64] = ^(data_o & 72'h00B9000000001FFFFF); - data_o[65] = ^(data_o & 72'h005E00000FFFE0003F); - data_o[66] = ^(data_o & 72'h0067003FF003E007C1); - data_o[67] = ^(data_o & 72'h00CD0FC0F03C207842); - data_o[68] = ^(data_o & 72'h00B671C711C4438884); - data_o[69] = ^(data_o & 72'h00B5B65926488C9108); - data_o[70] = ^(data_o & 72'h00CBDAAA4A91152210); - data_o[71] = ^(data_o & 72'h007AED348D221A4420); + data_o[64] = 0 ^ ^(data_o & 72'h00B9000000001FFFFF); + data_o[65] = 0 ^ ^(data_o & 72'h005E00000FFFE0003F); + data_o[66] = 0 ^ ^(data_o & 72'h0067003FF003E007C1); + data_o[67] = 0 ^ ^(data_o & 72'h00CD0FC0F03C207842); + data_o[68] = 0 ^ ^(data_o & 72'h00B671C711C4438884); + data_o[69] = 0 ^ ^(data_o & 72'h00B5B65926488C9108); + data_o[70] = 0 ^ ^(data_o & 72'h00CBDAAA4A91152210); + data_o[71] = 0 ^ ^(data_o & 72'h007AED348D221A4420); end endmodule : prim_secded_72_64_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv index 9eb7295e..6fc33426 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_22_16_enc.sv @@ -11,12 +11,12 @@ module prim_secded_hamming_22_16_enc ( always_comb begin : p_encode data_o = 22'(data_i); - data_o[16] = ^(data_o & 22'h00AD5B); - data_o[17] = ^(data_o & 22'h00366D); - data_o[18] = ^(data_o & 22'h00C78E); - data_o[19] = ^(data_o & 22'h0007F0); - data_o[20] = ^(data_o & 22'h00F800); - data_o[21] = ^(data_o & 22'h1FFFFF); + data_o[16] = 0 ^ ^(data_o & 22'h00AD5B); + data_o[17] = 0 ^ ^(data_o & 22'h00366D); + data_o[18] = 0 ^ ^(data_o & 22'h00C78E); + data_o[19] = 0 ^ ^(data_o & 22'h0007F0); + data_o[20] = 0 ^ ^(data_o & 22'h00F800); + data_o[21] = 0 ^ ^(data_o & 22'h1FFFFF); end endmodule : prim_secded_hamming_22_16_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv index 47b60f56..3ce5392d 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_39_32_enc.sv @@ -11,13 +11,13 @@ module prim_secded_hamming_39_32_enc ( always_comb begin : p_encode data_o = 39'(data_i); - data_o[32] = ^(data_o & 39'h0056AAAD5B); - data_o[33] = ^(data_o & 39'h009B33366D); - data_o[34] = ^(data_o & 39'h00E3C3C78E); - data_o[35] = ^(data_o & 39'h0003FC07F0); - data_o[36] = ^(data_o & 39'h0003FFF800); - data_o[37] = ^(data_o & 39'h00FC000000); - data_o[38] = ^(data_o & 39'h3FFFFFFFFF); + data_o[32] = 0 ^ ^(data_o & 39'h0056AAAD5B); + data_o[33] = 0 ^ ^(data_o & 39'h009B33366D); + data_o[34] = 0 ^ ^(data_o & 39'h00E3C3C78E); + data_o[35] = 0 ^ ^(data_o & 39'h0003FC07F0); + data_o[36] = 0 ^ ^(data_o & 39'h0003FFF800); + data_o[37] = 0 ^ ^(data_o & 39'h00FC000000); + data_o[38] = 0 ^ ^(data_o & 39'h3FFFFFFFFF); end endmodule : prim_secded_hamming_39_32_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv index a24f3c8f..689e4eae 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_72_64_enc.sv @@ -11,14 +11,14 @@ module prim_secded_hamming_72_64_enc ( always_comb begin : p_encode data_o = 72'(data_i); - data_o[64] = ^(data_o & 72'h00AB55555556AAAD5B); - data_o[65] = ^(data_o & 72'h00CD9999999B33366D); - data_o[66] = ^(data_o & 72'h00F1E1E1E1E3C3C78E); - data_o[67] = ^(data_o & 72'h0001FE01FE03FC07F0); - data_o[68] = ^(data_o & 72'h0001FFFE0003FFF800); - data_o[69] = ^(data_o & 72'h0001FFFFFFFC000000); - data_o[70] = ^(data_o & 72'h00FE00000000000000); - data_o[71] = ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); + data_o[64] = 0 ^ ^(data_o & 72'h00AB55555556AAAD5B); + data_o[65] = 0 ^ ^(data_o & 72'h00CD9999999B33366D); + data_o[66] = 0 ^ ^(data_o & 72'h00F1E1E1E1E3C3C78E); + data_o[67] = 0 ^ ^(data_o & 72'h0001FE01FE03FC07F0); + data_o[68] = 0 ^ ^(data_o & 72'h0001FFFE0003FFF800); + data_o[69] = 0 ^ ^(data_o & 72'h0001FFFFFFFC000000); + data_o[70] = 0 ^ ^(data_o & 72'h00FE00000000000000); + data_o[71] = 0 ^ ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); end endmodule : prim_secded_hamming_72_64_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv index 3e940838..e8c44d1c 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_hamming_76_68_enc.sv @@ -11,14 +11,14 @@ module prim_secded_hamming_76_68_enc ( always_comb begin : p_encode data_o = 76'(data_i); - data_o[68] = ^(data_o & 76'h00AAB55555556AAAD5B); - data_o[69] = ^(data_o & 76'h00CCD9999999B33366D); - data_o[70] = ^(data_o & 76'h000F1E1E1E1E3C3C78E); - data_o[71] = ^(data_o & 76'h00F01FE01FE03FC07F0); - data_o[72] = ^(data_o & 76'h00001FFFE0003FFF800); - data_o[73] = ^(data_o & 76'h00001FFFFFFFC000000); - data_o[74] = ^(data_o & 76'h00FFE00000000000000); - data_o[75] = ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); + data_o[68] = 0 ^ ^(data_o & 76'h00AAB55555556AAAD5B); + data_o[69] = 0 ^ ^(data_o & 76'h00CCD9999999B33366D); + data_o[70] = 0 ^ ^(data_o & 76'h000F1E1E1E1E3C3C78E); + data_o[71] = 0 ^ ^(data_o & 76'h00F01FE01FE03FC07F0); + data_o[72] = 0 ^ ^(data_o & 76'h00001FFFE0003FFF800); + data_o[73] = 0 ^ ^(data_o & 76'h00001FFFFFFFC000000); + data_o[74] = 0 ^ ^(data_o & 76'h00FFE00000000000000); + data_o[75] = 0 ^ ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); end endmodule : prim_secded_hamming_76_68_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv index 386208ff..5d53680e 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_dec.sv @@ -13,12 +13,12 @@ module prim_secded_inv_22_16_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 22'h3F0000) & 22'h01496E); - syndrome_o[1] = ^((data_i ^ 22'h3F0000) & 22'h02F20B); - syndrome_o[2] = ^((data_i ^ 22'h3F0000) & 22'h048ED8); - syndrome_o[3] = ^((data_i ^ 22'h3F0000) & 22'h087714); - syndrome_o[4] = ^((data_i ^ 22'h3F0000) & 22'h10ACA5); - syndrome_o[5] = ^((data_i ^ 22'h3F0000) & 22'h2011F3); + syndrome_o[0] = ^((data_i ^ 22'h2A0000) & 22'h01496E); + syndrome_o[1] = ^((data_i ^ 22'h2A0000) & 22'h02F20B); + syndrome_o[2] = ^((data_i ^ 22'h2A0000) & 22'h048ED8); + syndrome_o[3] = ^((data_i ^ 22'h2A0000) & 22'h087714); + syndrome_o[4] = ^((data_i ^ 22'h2A0000) & 22'h10ACA5); + syndrome_o[5] = ^((data_i ^ 22'h2A0000) & 22'h2011F3); // Corrected output calculation data_o[0] = (syndrome_o == 6'h32) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv index b89772d5..2932a185 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_22_16_enc.sv @@ -11,12 +11,12 @@ module prim_secded_inv_22_16_enc ( always_comb begin : p_encode data_o = 22'(data_i); - data_o[16] = ~^(data_o & 22'h00496E); - data_o[17] = ~^(data_o & 22'h00F20B); - data_o[18] = ~^(data_o & 22'h008ED8); - data_o[19] = ~^(data_o & 22'h007714); - data_o[20] = ~^(data_o & 22'h00ACA5); - data_o[21] = ~^(data_o & 22'h0011F3); + data_o[16] = 0 ^ ^(data_o & 22'h00496E); + data_o[17] = 1 ^ ^(data_o & 22'h00F20B); + data_o[18] = 0 ^ ^(data_o & 22'h008ED8); + data_o[19] = 1 ^ ^(data_o & 22'h007714); + data_o[20] = 0 ^ ^(data_o & 22'h00ACA5); + data_o[21] = 1 ^ ^(data_o & 22'h0011F3); end endmodule : prim_secded_inv_22_16_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv index 0f69caf5..b54b6474 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_dec.sv @@ -13,12 +13,12 @@ module prim_secded_inv_28_22_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 28'hFC00000) & 28'h07003FF); - syndrome_o[1] = ^((data_i ^ 28'hFC00000) & 28'h090FC0F); - syndrome_o[2] = ^((data_i ^ 28'hFC00000) & 28'h1271C71); - syndrome_o[3] = ^((data_i ^ 28'hFC00000) & 28'h23B6592); - syndrome_o[4] = ^((data_i ^ 28'hFC00000) & 28'h43DAAA4); - syndrome_o[5] = ^((data_i ^ 28'hFC00000) & 28'h83ED348); + syndrome_o[0] = ^((data_i ^ 28'hA800000) & 28'h07003FF); + syndrome_o[1] = ^((data_i ^ 28'hA800000) & 28'h090FC0F); + syndrome_o[2] = ^((data_i ^ 28'hA800000) & 28'h1271C71); + syndrome_o[3] = ^((data_i ^ 28'hA800000) & 28'h23B6592); + syndrome_o[4] = ^((data_i ^ 28'hA800000) & 28'h43DAAA4); + syndrome_o[5] = ^((data_i ^ 28'hA800000) & 28'h83ED348); // Corrected output calculation data_o[0] = (syndrome_o == 6'h7) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv index 290dbfab..9ec75ac7 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_28_22_enc.sv @@ -11,12 +11,12 @@ module prim_secded_inv_28_22_enc ( always_comb begin : p_encode data_o = 28'(data_i); - data_o[22] = ~^(data_o & 28'h03003FF); - data_o[23] = ~^(data_o & 28'h010FC0F); - data_o[24] = ~^(data_o & 28'h0271C71); - data_o[25] = ~^(data_o & 28'h03B6592); - data_o[26] = ~^(data_o & 28'h03DAAA4); - data_o[27] = ~^(data_o & 28'h03ED348); + data_o[22] = 0 ^ ^(data_o & 28'h03003FF); + data_o[23] = 1 ^ ^(data_o & 28'h010FC0F); + data_o[24] = 0 ^ ^(data_o & 28'h0271C71); + data_o[25] = 1 ^ ^(data_o & 28'h03B6592); + data_o[26] = 0 ^ ^(data_o & 28'h03DAAA4); + data_o[27] = 1 ^ ^(data_o & 28'h03ED348); end endmodule : prim_secded_inv_28_22_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv index f58a78de..a40a86cd 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_dec.sv @@ -13,13 +13,13 @@ module prim_secded_inv_39_32_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 39'h7F00000000) & 39'h012606BD25); - syndrome_o[1] = ^((data_i ^ 39'h7F00000000) & 39'h02DEBA8050); - syndrome_o[2] = ^((data_i ^ 39'h7F00000000) & 39'h04413D89AA); - syndrome_o[3] = ^((data_i ^ 39'h7F00000000) & 39'h0831234ED1); - syndrome_o[4] = ^((data_i ^ 39'h7F00000000) & 39'h10C2C1323B); - syndrome_o[5] = ^((data_i ^ 39'h7F00000000) & 39'h202DCC624C); - syndrome_o[6] = ^((data_i ^ 39'h7F00000000) & 39'h4098505586); + syndrome_o[0] = ^((data_i ^ 39'h2A00000000) & 39'h012606BD25); + syndrome_o[1] = ^((data_i ^ 39'h2A00000000) & 39'h02DEBA8050); + syndrome_o[2] = ^((data_i ^ 39'h2A00000000) & 39'h04413D89AA); + syndrome_o[3] = ^((data_i ^ 39'h2A00000000) & 39'h0831234ED1); + syndrome_o[4] = ^((data_i ^ 39'h2A00000000) & 39'h10C2C1323B); + syndrome_o[5] = ^((data_i ^ 39'h2A00000000) & 39'h202DCC624C); + syndrome_o[6] = ^((data_i ^ 39'h2A00000000) & 39'h4098505586); // Corrected output calculation data_o[0] = (syndrome_o == 7'h19) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv index 0161f719..c0b62a18 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_39_32_enc.sv @@ -11,13 +11,13 @@ module prim_secded_inv_39_32_enc ( always_comb begin : p_encode data_o = 39'(data_i); - data_o[32] = ~^(data_o & 39'h002606BD25); - data_o[33] = ~^(data_o & 39'h00DEBA8050); - data_o[34] = ~^(data_o & 39'h00413D89AA); - data_o[35] = ~^(data_o & 39'h0031234ED1); - data_o[36] = ~^(data_o & 39'h00C2C1323B); - data_o[37] = ~^(data_o & 39'h002DCC624C); - data_o[38] = ~^(data_o & 39'h0098505586); + data_o[32] = 0 ^ ^(data_o & 39'h002606BD25); + data_o[33] = 1 ^ ^(data_o & 39'h00DEBA8050); + data_o[34] = 0 ^ ^(data_o & 39'h00413D89AA); + data_o[35] = 1 ^ ^(data_o & 39'h0031234ED1); + data_o[36] = 0 ^ ^(data_o & 39'h00C2C1323B); + data_o[37] = 1 ^ ^(data_o & 39'h002DCC624C); + data_o[38] = 0 ^ ^(data_o & 39'h0098505586); end endmodule : prim_secded_inv_39_32_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv index 83406e9d..6e34b502 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_dec.sv @@ -13,13 +13,13 @@ module prim_secded_inv_64_57_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 64'hFE00000000000000) & 64'h0303FFF800007FFF); - syndrome_o[1] = ^((data_i ^ 64'hFE00000000000000) & 64'h057C1FF801FF801F); - syndrome_o[2] = ^((data_i ^ 64'hFE00000000000000) & 64'h09BDE1F87E0781E1); - syndrome_o[3] = ^((data_i ^ 64'hFE00000000000000) & 64'h11DEEE3B8E388E22); - syndrome_o[4] = ^((data_i ^ 64'hFE00000000000000) & 64'h21EF76CDB2C93244); - syndrome_o[5] = ^((data_i ^ 64'hFE00000000000000) & 64'h41F7BB56D5525488); - syndrome_o[6] = ^((data_i ^ 64'hFE00000000000000) & 64'h81FBDDA769A46910); + syndrome_o[0] = ^((data_i ^ 64'h5400000000000000) & 64'h0303FFF800007FFF); + syndrome_o[1] = ^((data_i ^ 64'h5400000000000000) & 64'h057C1FF801FF801F); + syndrome_o[2] = ^((data_i ^ 64'h5400000000000000) & 64'h09BDE1F87E0781E1); + syndrome_o[3] = ^((data_i ^ 64'h5400000000000000) & 64'h11DEEE3B8E388E22); + syndrome_o[4] = ^((data_i ^ 64'h5400000000000000) & 64'h21EF76CDB2C93244); + syndrome_o[5] = ^((data_i ^ 64'h5400000000000000) & 64'h41F7BB56D5525488); + syndrome_o[6] = ^((data_i ^ 64'h5400000000000000) & 64'h81FBDDA769A46910); // Corrected output calculation data_o[0] = (syndrome_o == 7'h7) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv index 74b26b5b..71d1b21a 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_64_57_enc.sv @@ -11,13 +11,13 @@ module prim_secded_inv_64_57_enc ( always_comb begin : p_encode data_o = 64'(data_i); - data_o[57] = ~^(data_o & 64'h0103FFF800007FFF); - data_o[58] = ~^(data_o & 64'h017C1FF801FF801F); - data_o[59] = ~^(data_o & 64'h01BDE1F87E0781E1); - data_o[60] = ~^(data_o & 64'h01DEEE3B8E388E22); - data_o[61] = ~^(data_o & 64'h01EF76CDB2C93244); - data_o[62] = ~^(data_o & 64'h01F7BB56D5525488); - data_o[63] = ~^(data_o & 64'h01FBDDA769A46910); + data_o[57] = 0 ^ ^(data_o & 64'h0103FFF800007FFF); + data_o[58] = 1 ^ ^(data_o & 64'h017C1FF801FF801F); + data_o[59] = 0 ^ ^(data_o & 64'h01BDE1F87E0781E1); + data_o[60] = 1 ^ ^(data_o & 64'h01DEEE3B8E388E22); + data_o[61] = 0 ^ ^(data_o & 64'h01EF76CDB2C93244); + data_o[62] = 1 ^ ^(data_o & 64'h01F7BB56D5525488); + data_o[63] = 0 ^ ^(data_o & 64'h01FBDDA769A46910); end endmodule : prim_secded_inv_64_57_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv index 86ffe70c..aa4c5b59 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_dec.sv @@ -13,14 +13,14 @@ module prim_secded_inv_72_64_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 72'hFF0000000000000000) & 72'h01B9000000001FFFFF); - syndrome_o[1] = ^((data_i ^ 72'hFF0000000000000000) & 72'h025E00000FFFE0003F); - syndrome_o[2] = ^((data_i ^ 72'hFF0000000000000000) & 72'h0467003FF003E007C1); - syndrome_o[3] = ^((data_i ^ 72'hFF0000000000000000) & 72'h08CD0FC0F03C207842); - syndrome_o[4] = ^((data_i ^ 72'hFF0000000000000000) & 72'h10B671C711C4438884); - syndrome_o[5] = ^((data_i ^ 72'hFF0000000000000000) & 72'h20B5B65926488C9108); - syndrome_o[6] = ^((data_i ^ 72'hFF0000000000000000) & 72'h40CBDAAA4A91152210); - syndrome_o[7] = ^((data_i ^ 72'hFF0000000000000000) & 72'h807AED348D221A4420); + syndrome_o[0] = ^((data_i ^ 72'hAA0000000000000000) & 72'h01B9000000001FFFFF); + syndrome_o[1] = ^((data_i ^ 72'hAA0000000000000000) & 72'h025E00000FFFE0003F); + syndrome_o[2] = ^((data_i ^ 72'hAA0000000000000000) & 72'h0467003FF003E007C1); + syndrome_o[3] = ^((data_i ^ 72'hAA0000000000000000) & 72'h08CD0FC0F03C207842); + syndrome_o[4] = ^((data_i ^ 72'hAA0000000000000000) & 72'h10B671C711C4438884); + syndrome_o[5] = ^((data_i ^ 72'hAA0000000000000000) & 72'h20B5B65926488C9108); + syndrome_o[6] = ^((data_i ^ 72'hAA0000000000000000) & 72'h40CBDAAA4A91152210); + syndrome_o[7] = ^((data_i ^ 72'hAA0000000000000000) & 72'h807AED348D221A4420); // Corrected output calculation data_o[0] = (syndrome_o == 8'h7) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv index 7a32a2db..8f6e6902 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_72_64_enc.sv @@ -11,14 +11,14 @@ module prim_secded_inv_72_64_enc ( always_comb begin : p_encode data_o = 72'(data_i); - data_o[64] = ~^(data_o & 72'h00B9000000001FFFFF); - data_o[65] = ~^(data_o & 72'h005E00000FFFE0003F); - data_o[66] = ~^(data_o & 72'h0067003FF003E007C1); - data_o[67] = ~^(data_o & 72'h00CD0FC0F03C207842); - data_o[68] = ~^(data_o & 72'h00B671C711C4438884); - data_o[69] = ~^(data_o & 72'h00B5B65926488C9108); - data_o[70] = ~^(data_o & 72'h00CBDAAA4A91152210); - data_o[71] = ~^(data_o & 72'h007AED348D221A4420); + data_o[64] = 0 ^ ^(data_o & 72'h00B9000000001FFFFF); + data_o[65] = 1 ^ ^(data_o & 72'h005E00000FFFE0003F); + data_o[66] = 0 ^ ^(data_o & 72'h0067003FF003E007C1); + data_o[67] = 1 ^ ^(data_o & 72'h00CD0FC0F03C207842); + data_o[68] = 0 ^ ^(data_o & 72'h00B671C711C4438884); + data_o[69] = 1 ^ ^(data_o & 72'h00B5B65926488C9108); + data_o[70] = 0 ^ ^(data_o & 72'h00CBDAAA4A91152210); + data_o[71] = 1 ^ ^(data_o & 72'h007AED348D221A4420); end endmodule : prim_secded_inv_72_64_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv index 48b21178..0f077ee7 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_dec.sv @@ -13,12 +13,12 @@ module prim_secded_inv_hamming_22_16_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 22'h3F0000) & 22'h01AD5B); - syndrome_o[1] = ^((data_i ^ 22'h3F0000) & 22'h02366D); - syndrome_o[2] = ^((data_i ^ 22'h3F0000) & 22'h04C78E); - syndrome_o[3] = ^((data_i ^ 22'h3F0000) & 22'h0807F0); - syndrome_o[4] = ^((data_i ^ 22'h3F0000) & 22'h10F800); - syndrome_o[5] = ^((data_i ^ 22'h3F0000) & 22'h3FFFFF); + syndrome_o[0] = ^((data_i ^ 22'h2A0000) & 22'h01AD5B); + syndrome_o[1] = ^((data_i ^ 22'h2A0000) & 22'h02366D); + syndrome_o[2] = ^((data_i ^ 22'h2A0000) & 22'h04C78E); + syndrome_o[3] = ^((data_i ^ 22'h2A0000) & 22'h0807F0); + syndrome_o[4] = ^((data_i ^ 22'h2A0000) & 22'h10F800); + syndrome_o[5] = ^((data_i ^ 22'h2A0000) & 22'h3FFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 6'h23) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv index 642473c6..ab606585 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_22_16_enc.sv @@ -11,12 +11,12 @@ module prim_secded_inv_hamming_22_16_enc ( always_comb begin : p_encode data_o = 22'(data_i); - data_o[16] = ~^(data_o & 22'h00AD5B); - data_o[17] = ~^(data_o & 22'h00366D); - data_o[18] = ~^(data_o & 22'h00C78E); - data_o[19] = ~^(data_o & 22'h0007F0); - data_o[20] = ~^(data_o & 22'h00F800); - data_o[21] = ~^(data_o & 22'h1FFFFF); + data_o[16] = 0 ^ ^(data_o & 22'h00AD5B); + data_o[17] = 1 ^ ^(data_o & 22'h00366D); + data_o[18] = 0 ^ ^(data_o & 22'h00C78E); + data_o[19] = 1 ^ ^(data_o & 22'h0007F0); + data_o[20] = 0 ^ ^(data_o & 22'h00F800); + data_o[21] = 1 ^ ^(data_o & 22'h1FFFFF); end endmodule : prim_secded_inv_hamming_22_16_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv index 9d5ccc33..f65e86d5 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_dec.sv @@ -13,13 +13,13 @@ module prim_secded_inv_hamming_39_32_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 39'h7F00000000) & 39'h0156AAAD5B); - syndrome_o[1] = ^((data_i ^ 39'h7F00000000) & 39'h029B33366D); - syndrome_o[2] = ^((data_i ^ 39'h7F00000000) & 39'h04E3C3C78E); - syndrome_o[3] = ^((data_i ^ 39'h7F00000000) & 39'h0803FC07F0); - syndrome_o[4] = ^((data_i ^ 39'h7F00000000) & 39'h1003FFF800); - syndrome_o[5] = ^((data_i ^ 39'h7F00000000) & 39'h20FC000000); - syndrome_o[6] = ^((data_i ^ 39'h7F00000000) & 39'h7FFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 39'h2A00000000) & 39'h0156AAAD5B); + syndrome_o[1] = ^((data_i ^ 39'h2A00000000) & 39'h029B33366D); + syndrome_o[2] = ^((data_i ^ 39'h2A00000000) & 39'h04E3C3C78E); + syndrome_o[3] = ^((data_i ^ 39'h2A00000000) & 39'h0803FC07F0); + syndrome_o[4] = ^((data_i ^ 39'h2A00000000) & 39'h1003FFF800); + syndrome_o[5] = ^((data_i ^ 39'h2A00000000) & 39'h20FC000000); + syndrome_o[6] = ^((data_i ^ 39'h2A00000000) & 39'h7FFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 7'h43) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv index 905b6c5e..710d7b5b 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_39_32_enc.sv @@ -11,13 +11,13 @@ module prim_secded_inv_hamming_39_32_enc ( always_comb begin : p_encode data_o = 39'(data_i); - data_o[32] = ~^(data_o & 39'h0056AAAD5B); - data_o[33] = ~^(data_o & 39'h009B33366D); - data_o[34] = ~^(data_o & 39'h00E3C3C78E); - data_o[35] = ~^(data_o & 39'h0003FC07F0); - data_o[36] = ~^(data_o & 39'h0003FFF800); - data_o[37] = ~^(data_o & 39'h00FC000000); - data_o[38] = ~^(data_o & 39'h3FFFFFFFFF); + data_o[32] = 0 ^ ^(data_o & 39'h0056AAAD5B); + data_o[33] = 1 ^ ^(data_o & 39'h009B33366D); + data_o[34] = 0 ^ ^(data_o & 39'h00E3C3C78E); + data_o[35] = 1 ^ ^(data_o & 39'h0003FC07F0); + data_o[36] = 0 ^ ^(data_o & 39'h0003FFF800); + data_o[37] = 1 ^ ^(data_o & 39'h00FC000000); + data_o[38] = 0 ^ ^(data_o & 39'h3FFFFFFFFF); end endmodule : prim_secded_inv_hamming_39_32_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv index 1b946607..99c2e5de 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_dec.sv @@ -13,14 +13,14 @@ module prim_secded_inv_hamming_72_64_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 72'hFF0000000000000000) & 72'h01AB55555556AAAD5B); - syndrome_o[1] = ^((data_i ^ 72'hFF0000000000000000) & 72'h02CD9999999B33366D); - syndrome_o[2] = ^((data_i ^ 72'hFF0000000000000000) & 72'h04F1E1E1E1E3C3C78E); - syndrome_o[3] = ^((data_i ^ 72'hFF0000000000000000) & 72'h0801FE01FE03FC07F0); - syndrome_o[4] = ^((data_i ^ 72'hFF0000000000000000) & 72'h1001FFFE0003FFF800); - syndrome_o[5] = ^((data_i ^ 72'hFF0000000000000000) & 72'h2001FFFFFFFC000000); - syndrome_o[6] = ^((data_i ^ 72'hFF0000000000000000) & 72'h40FE00000000000000); - syndrome_o[7] = ^((data_i ^ 72'hFF0000000000000000) & 72'hFFFFFFFFFFFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 72'hAA0000000000000000) & 72'h01AB55555556AAAD5B); + syndrome_o[1] = ^((data_i ^ 72'hAA0000000000000000) & 72'h02CD9999999B33366D); + syndrome_o[2] = ^((data_i ^ 72'hAA0000000000000000) & 72'h04F1E1E1E1E3C3C78E); + syndrome_o[3] = ^((data_i ^ 72'hAA0000000000000000) & 72'h0801FE01FE03FC07F0); + syndrome_o[4] = ^((data_i ^ 72'hAA0000000000000000) & 72'h1001FFFE0003FFF800); + syndrome_o[5] = ^((data_i ^ 72'hAA0000000000000000) & 72'h2001FFFFFFFC000000); + syndrome_o[6] = ^((data_i ^ 72'hAA0000000000000000) & 72'h40FE00000000000000); + syndrome_o[7] = ^((data_i ^ 72'hAA0000000000000000) & 72'hFFFFFFFFFFFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 8'h83) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv index 9584abe9..cf815303 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_72_64_enc.sv @@ -11,14 +11,14 @@ module prim_secded_inv_hamming_72_64_enc ( always_comb begin : p_encode data_o = 72'(data_i); - data_o[64] = ~^(data_o & 72'h00AB55555556AAAD5B); - data_o[65] = ~^(data_o & 72'h00CD9999999B33366D); - data_o[66] = ~^(data_o & 72'h00F1E1E1E1E3C3C78E); - data_o[67] = ~^(data_o & 72'h0001FE01FE03FC07F0); - data_o[68] = ~^(data_o & 72'h0001FFFE0003FFF800); - data_o[69] = ~^(data_o & 72'h0001FFFFFFFC000000); - data_o[70] = ~^(data_o & 72'h00FE00000000000000); - data_o[71] = ~^(data_o & 72'h7FFFFFFFFFFFFFFFFF); + data_o[64] = 0 ^ ^(data_o & 72'h00AB55555556AAAD5B); + data_o[65] = 1 ^ ^(data_o & 72'h00CD9999999B33366D); + data_o[66] = 0 ^ ^(data_o & 72'h00F1E1E1E1E3C3C78E); + data_o[67] = 1 ^ ^(data_o & 72'h0001FE01FE03FC07F0); + data_o[68] = 0 ^ ^(data_o & 72'h0001FFFE0003FFF800); + data_o[69] = 1 ^ ^(data_o & 72'h0001FFFFFFFC000000); + data_o[70] = 0 ^ ^(data_o & 72'h00FE00000000000000); + data_o[71] = 1 ^ ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); end endmodule : prim_secded_inv_hamming_72_64_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv index da1368b3..c2aa75e4 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_dec.sv @@ -13,14 +13,14 @@ module prim_secded_inv_hamming_76_68_dec ( always_comb begin : p_encode // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 76'hFF00000000000000000) & 76'h01AAB55555556AAAD5B); - syndrome_o[1] = ^((data_i ^ 76'hFF00000000000000000) & 76'h02CCD9999999B33366D); - syndrome_o[2] = ^((data_i ^ 76'hFF00000000000000000) & 76'h040F1E1E1E1E3C3C78E); - syndrome_o[3] = ^((data_i ^ 76'hFF00000000000000000) & 76'h08F01FE01FE03FC07F0); - syndrome_o[4] = ^((data_i ^ 76'hFF00000000000000000) & 76'h10001FFFE0003FFF800); - syndrome_o[5] = ^((data_i ^ 76'hFF00000000000000000) & 76'h20001FFFFFFFC000000); - syndrome_o[6] = ^((data_i ^ 76'hFF00000000000000000) & 76'h40FFE00000000000000); - syndrome_o[7] = ^((data_i ^ 76'hFF00000000000000000) & 76'hFFFFFFFFFFFFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 76'hAA00000000000000000) & 76'h01AAB55555556AAAD5B); + syndrome_o[1] = ^((data_i ^ 76'hAA00000000000000000) & 76'h02CCD9999999B33366D); + syndrome_o[2] = ^((data_i ^ 76'hAA00000000000000000) & 76'h040F1E1E1E1E3C3C78E); + syndrome_o[3] = ^((data_i ^ 76'hAA00000000000000000) & 76'h08F01FE01FE03FC07F0); + syndrome_o[4] = ^((data_i ^ 76'hAA00000000000000000) & 76'h10001FFFE0003FFF800); + syndrome_o[5] = ^((data_i ^ 76'hAA00000000000000000) & 76'h20001FFFFFFFC000000); + syndrome_o[6] = ^((data_i ^ 76'hAA00000000000000000) & 76'h40FFE00000000000000); + syndrome_o[7] = ^((data_i ^ 76'hAA00000000000000000) & 76'hFFFFFFFFFFFFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 8'h83) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv index c37f374e..a9c08ef6 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_inv_hamming_76_68_enc.sv @@ -11,14 +11,14 @@ module prim_secded_inv_hamming_76_68_enc ( always_comb begin : p_encode data_o = 76'(data_i); - data_o[68] = ~^(data_o & 76'h00AAB55555556AAAD5B); - data_o[69] = ~^(data_o & 76'h00CCD9999999B33366D); - data_o[70] = ~^(data_o & 76'h000F1E1E1E1E3C3C78E); - data_o[71] = ~^(data_o & 76'h00F01FE01FE03FC07F0); - data_o[72] = ~^(data_o & 76'h00001FFFE0003FFF800); - data_o[73] = ~^(data_o & 76'h00001FFFFFFFC000000); - data_o[74] = ~^(data_o & 76'h00FFE00000000000000); - data_o[75] = ~^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); + data_o[68] = 0 ^ ^(data_o & 76'h00AAB55555556AAAD5B); + data_o[69] = 1 ^ ^(data_o & 76'h00CCD9999999B33366D); + data_o[70] = 0 ^ ^(data_o & 76'h000F1E1E1E1E3C3C78E); + data_o[71] = 1 ^ ^(data_o & 76'h00F01FE01FE03FC07F0); + data_o[72] = 0 ^ ^(data_o & 76'h00001FFFE0003FFF800); + data_o[73] = 1 ^ ^(data_o & 76'h00001FFFFFFFC000000); + data_o[74] = 0 ^ ^(data_o & 76'h00FFE00000000000000); + data_o[75] = 1 ^ ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); end endmodule : prim_secded_inv_hamming_76_68_enc diff --git a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv index 005ff102..21f52975 100644 --- a/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv +++ b/vendor/lowrisc_ip/ip/prim/rtl/prim_secded_pkg.sv @@ -78,108 +78,162 @@ package prim_secded_pkg; endcase endfunction + parameter logic [5:0] Secded2216ZeroEcc = 6'h0; + parameter logic [21:0] Secded2216ZeroWord = 22'h0; + typedef struct packed { logic [15:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_22_16_t; + parameter logic [5:0] Secded2822ZeroEcc = 6'h0; + parameter logic [27:0] Secded2822ZeroWord = 28'h0; + typedef struct packed { logic [21:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_28_22_t; + parameter logic [6:0] Secded3932ZeroEcc = 7'h0; + parameter logic [38:0] Secded3932ZeroWord = 39'h0; + typedef struct packed { logic [31:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_39_32_t; + parameter logic [6:0] Secded6457ZeroEcc = 7'h0; + parameter logic [63:0] Secded6457ZeroWord = 64'h0; + typedef struct packed { logic [56:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_64_57_t; + parameter logic [7:0] Secded7264ZeroEcc = 8'h0; + parameter logic [71:0] Secded7264ZeroWord = 72'h0; + typedef struct packed { logic [63:0] data; logic [7:0] syndrome; logic [1:0] err; } secded_72_64_t; + parameter logic [5:0] SecdedHamming2216ZeroEcc = 6'h0; + parameter logic [21:0] SecdedHamming2216ZeroWord = 22'h0; + typedef struct packed { logic [15:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_hamming_22_16_t; + parameter logic [6:0] SecdedHamming3932ZeroEcc = 7'h0; + parameter logic [38:0] SecdedHamming3932ZeroWord = 39'h0; + typedef struct packed { logic [31:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_hamming_39_32_t; + parameter logic [7:0] SecdedHamming7264ZeroEcc = 8'h0; + parameter logic [71:0] SecdedHamming7264ZeroWord = 72'h0; + typedef struct packed { logic [63:0] data; logic [7:0] syndrome; logic [1:0] err; } secded_hamming_72_64_t; + parameter logic [7:0] SecdedHamming7668ZeroEcc = 8'h0; + parameter logic [75:0] SecdedHamming7668ZeroWord = 76'h0; + typedef struct packed { logic [67:0] data; logic [7:0] syndrome; logic [1:0] err; } secded_hamming_76_68_t; + parameter logic [5:0] SecdedInv2216ZeroEcc = 6'h2A; + parameter logic [21:0] SecdedInv2216ZeroWord = 22'h2A0000; + typedef struct packed { logic [15:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_inv_22_16_t; + parameter logic [5:0] SecdedInv2822ZeroEcc = 6'h2A; + parameter logic [27:0] SecdedInv2822ZeroWord = 28'hA800000; + typedef struct packed { logic [21:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_inv_28_22_t; + parameter logic [6:0] SecdedInv3932ZeroEcc = 7'h2A; + parameter logic [38:0] SecdedInv3932ZeroWord = 39'h2A00000000; + typedef struct packed { logic [31:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_inv_39_32_t; + parameter logic [6:0] SecdedInv6457ZeroEcc = 7'h2A; + parameter logic [63:0] SecdedInv6457ZeroWord = 64'h5400000000000000; + typedef struct packed { logic [56:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_inv_64_57_t; + parameter logic [7:0] SecdedInv7264ZeroEcc = 8'hAA; + parameter logic [71:0] SecdedInv7264ZeroWord = 72'hAA0000000000000000; + typedef struct packed { logic [63:0] data; logic [7:0] syndrome; logic [1:0] err; } secded_inv_72_64_t; + parameter logic [5:0] SecdedInvHamming2216ZeroEcc = 6'h2A; + parameter logic [21:0] SecdedInvHamming2216ZeroWord = 22'h2A0000; + typedef struct packed { logic [15:0] data; logic [5:0] syndrome; logic [1:0] err; } secded_inv_hamming_22_16_t; + parameter logic [6:0] SecdedInvHamming3932ZeroEcc = 7'h2A; + parameter logic [38:0] SecdedInvHamming3932ZeroWord = 39'h2A00000000; + typedef struct packed { logic [31:0] data; logic [6:0] syndrome; logic [1:0] err; } secded_inv_hamming_39_32_t; + parameter logic [7:0] SecdedInvHamming7264ZeroEcc = 8'hAA; + parameter logic [71:0] SecdedInvHamming7264ZeroWord = 72'hAA0000000000000000; + typedef struct packed { logic [63:0] data; logic [7:0] syndrome; logic [1:0] err; } secded_inv_hamming_72_64_t; + parameter logic [7:0] SecdedInvHamming7668ZeroEcc = 8'hAA; + parameter logic [75:0] SecdedInvHamming7668ZeroWord = 76'hAA00000000000000000; + typedef struct packed { logic [67:0] data; logic [7:0] syndrome; @@ -190,12 +244,12 @@ package prim_secded_pkg; prim_secded_22_16_enc (logic [15:0] data_i); logic [21:0] data_o; data_o = 22'(data_i); - data_o[16] = ^(data_o & 22'h00496E); - data_o[17] = ^(data_o & 22'h00F20B); - data_o[18] = ^(data_o & 22'h008ED8); - data_o[19] = ^(data_o & 22'h007714); - data_o[20] = ^(data_o & 22'h00ACA5); - data_o[21] = ^(data_o & 22'h0011F3); + data_o[16] = 0 ^ ^(data_o & 22'h00496E); + data_o[17] = 0 ^ ^(data_o & 22'h00F20B); + data_o[18] = 0 ^ ^(data_o & 22'h008ED8); + data_o[19] = 0 ^ ^(data_o & 22'h007714); + data_o[20] = 0 ^ ^(data_o & 22'h00ACA5); + data_o[21] = 0 ^ ^(data_o & 22'h0011F3); return data_o; endfunction @@ -248,12 +302,12 @@ package prim_secded_pkg; prim_secded_28_22_enc (logic [21:0] data_i); logic [27:0] data_o; data_o = 28'(data_i); - data_o[22] = ^(data_o & 28'h03003FF); - data_o[23] = ^(data_o & 28'h010FC0F); - data_o[24] = ^(data_o & 28'h0271C71); - data_o[25] = ^(data_o & 28'h03B6592); - data_o[26] = ^(data_o & 28'h03DAAA4); - data_o[27] = ^(data_o & 28'h03ED348); + data_o[22] = 0 ^ ^(data_o & 28'h03003FF); + data_o[23] = 0 ^ ^(data_o & 28'h010FC0F); + data_o[24] = 0 ^ ^(data_o & 28'h0271C71); + data_o[25] = 0 ^ ^(data_o & 28'h03B6592); + data_o[26] = 0 ^ ^(data_o & 28'h03DAAA4); + data_o[27] = 0 ^ ^(data_o & 28'h03ED348); return data_o; endfunction @@ -312,13 +366,13 @@ package prim_secded_pkg; prim_secded_39_32_enc (logic [31:0] data_i); logic [38:0] data_o; data_o = 39'(data_i); - data_o[32] = ^(data_o & 39'h002606BD25); - data_o[33] = ^(data_o & 39'h00DEBA8050); - data_o[34] = ^(data_o & 39'h00413D89AA); - data_o[35] = ^(data_o & 39'h0031234ED1); - data_o[36] = ^(data_o & 39'h00C2C1323B); - data_o[37] = ^(data_o & 39'h002DCC624C); - data_o[38] = ^(data_o & 39'h0098505586); + data_o[32] = 0 ^ ^(data_o & 39'h002606BD25); + data_o[33] = 0 ^ ^(data_o & 39'h00DEBA8050); + data_o[34] = 0 ^ ^(data_o & 39'h00413D89AA); + data_o[35] = 0 ^ ^(data_o & 39'h0031234ED1); + data_o[36] = 0 ^ ^(data_o & 39'h00C2C1323B); + data_o[37] = 0 ^ ^(data_o & 39'h002DCC624C); + data_o[38] = 0 ^ ^(data_o & 39'h0098505586); return data_o; endfunction @@ -388,13 +442,13 @@ package prim_secded_pkg; prim_secded_64_57_enc (logic [56:0] data_i); logic [63:0] data_o; data_o = 64'(data_i); - data_o[57] = ^(data_o & 64'h0103FFF800007FFF); - data_o[58] = ^(data_o & 64'h017C1FF801FF801F); - data_o[59] = ^(data_o & 64'h01BDE1F87E0781E1); - data_o[60] = ^(data_o & 64'h01DEEE3B8E388E22); - data_o[61] = ^(data_o & 64'h01EF76CDB2C93244); - data_o[62] = ^(data_o & 64'h01F7BB56D5525488); - data_o[63] = ^(data_o & 64'h01FBDDA769A46910); + data_o[57] = 0 ^ ^(data_o & 64'h0103FFF800007FFF); + data_o[58] = 0 ^ ^(data_o & 64'h017C1FF801FF801F); + data_o[59] = 0 ^ ^(data_o & 64'h01BDE1F87E0781E1); + data_o[60] = 0 ^ ^(data_o & 64'h01DEEE3B8E388E22); + data_o[61] = 0 ^ ^(data_o & 64'h01EF76CDB2C93244); + data_o[62] = 0 ^ ^(data_o & 64'h01F7BB56D5525488); + data_o[63] = 0 ^ ^(data_o & 64'h01FBDDA769A46910); return data_o; endfunction @@ -489,14 +543,14 @@ package prim_secded_pkg; prim_secded_72_64_enc (logic [63:0] data_i); logic [71:0] data_o; data_o = 72'(data_i); - data_o[64] = ^(data_o & 72'h00B9000000001FFFFF); - data_o[65] = ^(data_o & 72'h005E00000FFFE0003F); - data_o[66] = ^(data_o & 72'h0067003FF003E007C1); - data_o[67] = ^(data_o & 72'h00CD0FC0F03C207842); - data_o[68] = ^(data_o & 72'h00B671C711C4438884); - data_o[69] = ^(data_o & 72'h00B5B65926488C9108); - data_o[70] = ^(data_o & 72'h00CBDAAA4A91152210); - data_o[71] = ^(data_o & 72'h007AED348D221A4420); + data_o[64] = 0 ^ ^(data_o & 72'h00B9000000001FFFFF); + data_o[65] = 0 ^ ^(data_o & 72'h005E00000FFFE0003F); + data_o[66] = 0 ^ ^(data_o & 72'h0067003FF003E007C1); + data_o[67] = 0 ^ ^(data_o & 72'h00CD0FC0F03C207842); + data_o[68] = 0 ^ ^(data_o & 72'h00B671C711C4438884); + data_o[69] = 0 ^ ^(data_o & 72'h00B5B65926488C9108); + data_o[70] = 0 ^ ^(data_o & 72'h00CBDAAA4A91152210); + data_o[71] = 0 ^ ^(data_o & 72'h007AED348D221A4420); return data_o; endfunction @@ -599,12 +653,12 @@ package prim_secded_pkg; prim_secded_hamming_22_16_enc (logic [15:0] data_i); logic [21:0] data_o; data_o = 22'(data_i); - data_o[16] = ^(data_o & 22'h00AD5B); - data_o[17] = ^(data_o & 22'h00366D); - data_o[18] = ^(data_o & 22'h00C78E); - data_o[19] = ^(data_o & 22'h0007F0); - data_o[20] = ^(data_o & 22'h00F800); - data_o[21] = ^(data_o & 22'h1FFFFF); + data_o[16] = 0 ^ ^(data_o & 22'h00AD5B); + data_o[17] = 0 ^ ^(data_o & 22'h00366D); + data_o[18] = 0 ^ ^(data_o & 22'h00C78E); + data_o[19] = 0 ^ ^(data_o & 22'h0007F0); + data_o[20] = 0 ^ ^(data_o & 22'h00F800); + data_o[21] = 0 ^ ^(data_o & 22'h1FFFFF); return data_o; endfunction @@ -657,13 +711,13 @@ package prim_secded_pkg; prim_secded_hamming_39_32_enc (logic [31:0] data_i); logic [38:0] data_o; data_o = 39'(data_i); - data_o[32] = ^(data_o & 39'h0056AAAD5B); - data_o[33] = ^(data_o & 39'h009B33366D); - data_o[34] = ^(data_o & 39'h00E3C3C78E); - data_o[35] = ^(data_o & 39'h0003FC07F0); - data_o[36] = ^(data_o & 39'h0003FFF800); - data_o[37] = ^(data_o & 39'h00FC000000); - data_o[38] = ^(data_o & 39'h3FFFFFFFFF); + data_o[32] = 0 ^ ^(data_o & 39'h0056AAAD5B); + data_o[33] = 0 ^ ^(data_o & 39'h009B33366D); + data_o[34] = 0 ^ ^(data_o & 39'h00E3C3C78E); + data_o[35] = 0 ^ ^(data_o & 39'h0003FC07F0); + data_o[36] = 0 ^ ^(data_o & 39'h0003FFF800); + data_o[37] = 0 ^ ^(data_o & 39'h00FC000000); + data_o[38] = 0 ^ ^(data_o & 39'h3FFFFFFFFF); return data_o; endfunction @@ -733,14 +787,14 @@ package prim_secded_pkg; prim_secded_hamming_72_64_enc (logic [63:0] data_i); logic [71:0] data_o; data_o = 72'(data_i); - data_o[64] = ^(data_o & 72'h00AB55555556AAAD5B); - data_o[65] = ^(data_o & 72'h00CD9999999B33366D); - data_o[66] = ^(data_o & 72'h00F1E1E1E1E3C3C78E); - data_o[67] = ^(data_o & 72'h0001FE01FE03FC07F0); - data_o[68] = ^(data_o & 72'h0001FFFE0003FFF800); - data_o[69] = ^(data_o & 72'h0001FFFFFFFC000000); - data_o[70] = ^(data_o & 72'h00FE00000000000000); - data_o[71] = ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); + data_o[64] = 0 ^ ^(data_o & 72'h00AB55555556AAAD5B); + data_o[65] = 0 ^ ^(data_o & 72'h00CD9999999B33366D); + data_o[66] = 0 ^ ^(data_o & 72'h00F1E1E1E1E3C3C78E); + data_o[67] = 0 ^ ^(data_o & 72'h0001FE01FE03FC07F0); + data_o[68] = 0 ^ ^(data_o & 72'h0001FFFE0003FFF800); + data_o[69] = 0 ^ ^(data_o & 72'h0001FFFFFFFC000000); + data_o[70] = 0 ^ ^(data_o & 72'h00FE00000000000000); + data_o[71] = 0 ^ ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); return data_o; endfunction @@ -843,14 +897,14 @@ package prim_secded_pkg; prim_secded_hamming_76_68_enc (logic [67:0] data_i); logic [75:0] data_o; data_o = 76'(data_i); - data_o[68] = ^(data_o & 76'h00AAB55555556AAAD5B); - data_o[69] = ^(data_o & 76'h00CCD9999999B33366D); - data_o[70] = ^(data_o & 76'h000F1E1E1E1E3C3C78E); - data_o[71] = ^(data_o & 76'h00F01FE01FE03FC07F0); - data_o[72] = ^(data_o & 76'h00001FFFE0003FFF800); - data_o[73] = ^(data_o & 76'h00001FFFFFFFC000000); - data_o[74] = ^(data_o & 76'h00FFE00000000000000); - data_o[75] = ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); + data_o[68] = 0 ^ ^(data_o & 76'h00AAB55555556AAAD5B); + data_o[69] = 0 ^ ^(data_o & 76'h00CCD9999999B33366D); + data_o[70] = 0 ^ ^(data_o & 76'h000F1E1E1E1E3C3C78E); + data_o[71] = 0 ^ ^(data_o & 76'h00F01FE01FE03FC07F0); + data_o[72] = 0 ^ ^(data_o & 76'h00001FFFE0003FFF800); + data_o[73] = 0 ^ ^(data_o & 76'h00001FFFFFFFC000000); + data_o[74] = 0 ^ ^(data_o & 76'h00FFE00000000000000); + data_o[75] = 0 ^ ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); return data_o; endfunction @@ -957,12 +1011,12 @@ package prim_secded_pkg; prim_secded_inv_22_16_enc (logic [15:0] data_i); logic [21:0] data_o; data_o = 22'(data_i); - data_o[16] = ~^(data_o & 22'h00496E); - data_o[17] = ~^(data_o & 22'h00F20B); - data_o[18] = ~^(data_o & 22'h008ED8); - data_o[19] = ~^(data_o & 22'h007714); - data_o[20] = ~^(data_o & 22'h00ACA5); - data_o[21] = ~^(data_o & 22'h0011F3); + data_o[16] = 0 ^ ^(data_o & 22'h00496E); + data_o[17] = 1 ^ ^(data_o & 22'h00F20B); + data_o[18] = 0 ^ ^(data_o & 22'h008ED8); + data_o[19] = 1 ^ ^(data_o & 22'h007714); + data_o[20] = 0 ^ ^(data_o & 22'h00ACA5); + data_o[21] = 1 ^ ^(data_o & 22'h0011F3); return data_o; endfunction @@ -975,12 +1029,12 @@ package prim_secded_pkg; secded_inv_22_16_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 22'h3F0000) & 22'h01496E); - syndrome_o[1] = ^((data_i ^ 22'h3F0000) & 22'h02F20B); - syndrome_o[2] = ^((data_i ^ 22'h3F0000) & 22'h048ED8); - syndrome_o[3] = ^((data_i ^ 22'h3F0000) & 22'h087714); - syndrome_o[4] = ^((data_i ^ 22'h3F0000) & 22'h10ACA5); - syndrome_o[5] = ^((data_i ^ 22'h3F0000) & 22'h2011F3); + syndrome_o[0] = ^((data_i ^ 22'h2A0000) & 22'h01496E); + syndrome_o[1] = ^((data_i ^ 22'h2A0000) & 22'h02F20B); + syndrome_o[2] = ^((data_i ^ 22'h2A0000) & 22'h048ED8); + syndrome_o[3] = ^((data_i ^ 22'h2A0000) & 22'h087714); + syndrome_o[4] = ^((data_i ^ 22'h2A0000) & 22'h10ACA5); + syndrome_o[5] = ^((data_i ^ 22'h2A0000) & 22'h2011F3); // Corrected output calculation data_o[0] = (syndrome_o == 6'h32) ^ data_i[0]; @@ -1015,12 +1069,12 @@ package prim_secded_pkg; prim_secded_inv_28_22_enc (logic [21:0] data_i); logic [27:0] data_o; data_o = 28'(data_i); - data_o[22] = ~^(data_o & 28'h03003FF); - data_o[23] = ~^(data_o & 28'h010FC0F); - data_o[24] = ~^(data_o & 28'h0271C71); - data_o[25] = ~^(data_o & 28'h03B6592); - data_o[26] = ~^(data_o & 28'h03DAAA4); - data_o[27] = ~^(data_o & 28'h03ED348); + data_o[22] = 0 ^ ^(data_o & 28'h03003FF); + data_o[23] = 1 ^ ^(data_o & 28'h010FC0F); + data_o[24] = 0 ^ ^(data_o & 28'h0271C71); + data_o[25] = 1 ^ ^(data_o & 28'h03B6592); + data_o[26] = 0 ^ ^(data_o & 28'h03DAAA4); + data_o[27] = 1 ^ ^(data_o & 28'h03ED348); return data_o; endfunction @@ -1033,12 +1087,12 @@ package prim_secded_pkg; secded_inv_28_22_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 28'hFC00000) & 28'h07003FF); - syndrome_o[1] = ^((data_i ^ 28'hFC00000) & 28'h090FC0F); - syndrome_o[2] = ^((data_i ^ 28'hFC00000) & 28'h1271C71); - syndrome_o[3] = ^((data_i ^ 28'hFC00000) & 28'h23B6592); - syndrome_o[4] = ^((data_i ^ 28'hFC00000) & 28'h43DAAA4); - syndrome_o[5] = ^((data_i ^ 28'hFC00000) & 28'h83ED348); + syndrome_o[0] = ^((data_i ^ 28'hA800000) & 28'h07003FF); + syndrome_o[1] = ^((data_i ^ 28'hA800000) & 28'h090FC0F); + syndrome_o[2] = ^((data_i ^ 28'hA800000) & 28'h1271C71); + syndrome_o[3] = ^((data_i ^ 28'hA800000) & 28'h23B6592); + syndrome_o[4] = ^((data_i ^ 28'hA800000) & 28'h43DAAA4); + syndrome_o[5] = ^((data_i ^ 28'hA800000) & 28'h83ED348); // Corrected output calculation data_o[0] = (syndrome_o == 6'h7) ^ data_i[0]; @@ -1079,13 +1133,13 @@ package prim_secded_pkg; prim_secded_inv_39_32_enc (logic [31:0] data_i); logic [38:0] data_o; data_o = 39'(data_i); - data_o[32] = ~^(data_o & 39'h002606BD25); - data_o[33] = ~^(data_o & 39'h00DEBA8050); - data_o[34] = ~^(data_o & 39'h00413D89AA); - data_o[35] = ~^(data_o & 39'h0031234ED1); - data_o[36] = ~^(data_o & 39'h00C2C1323B); - data_o[37] = ~^(data_o & 39'h002DCC624C); - data_o[38] = ~^(data_o & 39'h0098505586); + data_o[32] = 0 ^ ^(data_o & 39'h002606BD25); + data_o[33] = 1 ^ ^(data_o & 39'h00DEBA8050); + data_o[34] = 0 ^ ^(data_o & 39'h00413D89AA); + data_o[35] = 1 ^ ^(data_o & 39'h0031234ED1); + data_o[36] = 0 ^ ^(data_o & 39'h00C2C1323B); + data_o[37] = 1 ^ ^(data_o & 39'h002DCC624C); + data_o[38] = 0 ^ ^(data_o & 39'h0098505586); return data_o; endfunction @@ -1098,13 +1152,13 @@ package prim_secded_pkg; secded_inv_39_32_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 39'h7F00000000) & 39'h012606BD25); - syndrome_o[1] = ^((data_i ^ 39'h7F00000000) & 39'h02DEBA8050); - syndrome_o[2] = ^((data_i ^ 39'h7F00000000) & 39'h04413D89AA); - syndrome_o[3] = ^((data_i ^ 39'h7F00000000) & 39'h0831234ED1); - syndrome_o[4] = ^((data_i ^ 39'h7F00000000) & 39'h10C2C1323B); - syndrome_o[5] = ^((data_i ^ 39'h7F00000000) & 39'h202DCC624C); - syndrome_o[6] = ^((data_i ^ 39'h7F00000000) & 39'h4098505586); + syndrome_o[0] = ^((data_i ^ 39'h2A00000000) & 39'h012606BD25); + syndrome_o[1] = ^((data_i ^ 39'h2A00000000) & 39'h02DEBA8050); + syndrome_o[2] = ^((data_i ^ 39'h2A00000000) & 39'h04413D89AA); + syndrome_o[3] = ^((data_i ^ 39'h2A00000000) & 39'h0831234ED1); + syndrome_o[4] = ^((data_i ^ 39'h2A00000000) & 39'h10C2C1323B); + syndrome_o[5] = ^((data_i ^ 39'h2A00000000) & 39'h202DCC624C); + syndrome_o[6] = ^((data_i ^ 39'h2A00000000) & 39'h4098505586); // Corrected output calculation data_o[0] = (syndrome_o == 7'h19) ^ data_i[0]; @@ -1155,13 +1209,13 @@ package prim_secded_pkg; prim_secded_inv_64_57_enc (logic [56:0] data_i); logic [63:0] data_o; data_o = 64'(data_i); - data_o[57] = ~^(data_o & 64'h0103FFF800007FFF); - data_o[58] = ~^(data_o & 64'h017C1FF801FF801F); - data_o[59] = ~^(data_o & 64'h01BDE1F87E0781E1); - data_o[60] = ~^(data_o & 64'h01DEEE3B8E388E22); - data_o[61] = ~^(data_o & 64'h01EF76CDB2C93244); - data_o[62] = ~^(data_o & 64'h01F7BB56D5525488); - data_o[63] = ~^(data_o & 64'h01FBDDA769A46910); + data_o[57] = 0 ^ ^(data_o & 64'h0103FFF800007FFF); + data_o[58] = 1 ^ ^(data_o & 64'h017C1FF801FF801F); + data_o[59] = 0 ^ ^(data_o & 64'h01BDE1F87E0781E1); + data_o[60] = 1 ^ ^(data_o & 64'h01DEEE3B8E388E22); + data_o[61] = 0 ^ ^(data_o & 64'h01EF76CDB2C93244); + data_o[62] = 1 ^ ^(data_o & 64'h01F7BB56D5525488); + data_o[63] = 0 ^ ^(data_o & 64'h01FBDDA769A46910); return data_o; endfunction @@ -1174,13 +1228,13 @@ package prim_secded_pkg; secded_inv_64_57_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 64'hFE00000000000000) & 64'h0303FFF800007FFF); - syndrome_o[1] = ^((data_i ^ 64'hFE00000000000000) & 64'h057C1FF801FF801F); - syndrome_o[2] = ^((data_i ^ 64'hFE00000000000000) & 64'h09BDE1F87E0781E1); - syndrome_o[3] = ^((data_i ^ 64'hFE00000000000000) & 64'h11DEEE3B8E388E22); - syndrome_o[4] = ^((data_i ^ 64'hFE00000000000000) & 64'h21EF76CDB2C93244); - syndrome_o[5] = ^((data_i ^ 64'hFE00000000000000) & 64'h41F7BB56D5525488); - syndrome_o[6] = ^((data_i ^ 64'hFE00000000000000) & 64'h81FBDDA769A46910); + syndrome_o[0] = ^((data_i ^ 64'h5400000000000000) & 64'h0303FFF800007FFF); + syndrome_o[1] = ^((data_i ^ 64'h5400000000000000) & 64'h057C1FF801FF801F); + syndrome_o[2] = ^((data_i ^ 64'h5400000000000000) & 64'h09BDE1F87E0781E1); + syndrome_o[3] = ^((data_i ^ 64'h5400000000000000) & 64'h11DEEE3B8E388E22); + syndrome_o[4] = ^((data_i ^ 64'h5400000000000000) & 64'h21EF76CDB2C93244); + syndrome_o[5] = ^((data_i ^ 64'h5400000000000000) & 64'h41F7BB56D5525488); + syndrome_o[6] = ^((data_i ^ 64'h5400000000000000) & 64'h81FBDDA769A46910); // Corrected output calculation data_o[0] = (syndrome_o == 7'h7) ^ data_i[0]; @@ -1256,14 +1310,14 @@ package prim_secded_pkg; prim_secded_inv_72_64_enc (logic [63:0] data_i); logic [71:0] data_o; data_o = 72'(data_i); - data_o[64] = ~^(data_o & 72'h00B9000000001FFFFF); - data_o[65] = ~^(data_o & 72'h005E00000FFFE0003F); - data_o[66] = ~^(data_o & 72'h0067003FF003E007C1); - data_o[67] = ~^(data_o & 72'h00CD0FC0F03C207842); - data_o[68] = ~^(data_o & 72'h00B671C711C4438884); - data_o[69] = ~^(data_o & 72'h00B5B65926488C9108); - data_o[70] = ~^(data_o & 72'h00CBDAAA4A91152210); - data_o[71] = ~^(data_o & 72'h007AED348D221A4420); + data_o[64] = 0 ^ ^(data_o & 72'h00B9000000001FFFFF); + data_o[65] = 1 ^ ^(data_o & 72'h005E00000FFFE0003F); + data_o[66] = 0 ^ ^(data_o & 72'h0067003FF003E007C1); + data_o[67] = 1 ^ ^(data_o & 72'h00CD0FC0F03C207842); + data_o[68] = 0 ^ ^(data_o & 72'h00B671C711C4438884); + data_o[69] = 1 ^ ^(data_o & 72'h00B5B65926488C9108); + data_o[70] = 0 ^ ^(data_o & 72'h00CBDAAA4A91152210); + data_o[71] = 1 ^ ^(data_o & 72'h007AED348D221A4420); return data_o; endfunction @@ -1276,14 +1330,14 @@ package prim_secded_pkg; secded_inv_72_64_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 72'hFF0000000000000000) & 72'h01B9000000001FFFFF); - syndrome_o[1] = ^((data_i ^ 72'hFF0000000000000000) & 72'h025E00000FFFE0003F); - syndrome_o[2] = ^((data_i ^ 72'hFF0000000000000000) & 72'h0467003FF003E007C1); - syndrome_o[3] = ^((data_i ^ 72'hFF0000000000000000) & 72'h08CD0FC0F03C207842); - syndrome_o[4] = ^((data_i ^ 72'hFF0000000000000000) & 72'h10B671C711C4438884); - syndrome_o[5] = ^((data_i ^ 72'hFF0000000000000000) & 72'h20B5B65926488C9108); - syndrome_o[6] = ^((data_i ^ 72'hFF0000000000000000) & 72'h40CBDAAA4A91152210); - syndrome_o[7] = ^((data_i ^ 72'hFF0000000000000000) & 72'h807AED348D221A4420); + syndrome_o[0] = ^((data_i ^ 72'hAA0000000000000000) & 72'h01B9000000001FFFFF); + syndrome_o[1] = ^((data_i ^ 72'hAA0000000000000000) & 72'h025E00000FFFE0003F); + syndrome_o[2] = ^((data_i ^ 72'hAA0000000000000000) & 72'h0467003FF003E007C1); + syndrome_o[3] = ^((data_i ^ 72'hAA0000000000000000) & 72'h08CD0FC0F03C207842); + syndrome_o[4] = ^((data_i ^ 72'hAA0000000000000000) & 72'h10B671C711C4438884); + syndrome_o[5] = ^((data_i ^ 72'hAA0000000000000000) & 72'h20B5B65926488C9108); + syndrome_o[6] = ^((data_i ^ 72'hAA0000000000000000) & 72'h40CBDAAA4A91152210); + syndrome_o[7] = ^((data_i ^ 72'hAA0000000000000000) & 72'h807AED348D221A4420); // Corrected output calculation data_o[0] = (syndrome_o == 8'h7) ^ data_i[0]; @@ -1366,12 +1420,12 @@ package prim_secded_pkg; prim_secded_inv_hamming_22_16_enc (logic [15:0] data_i); logic [21:0] data_o; data_o = 22'(data_i); - data_o[16] = ~^(data_o & 22'h00AD5B); - data_o[17] = ~^(data_o & 22'h00366D); - data_o[18] = ~^(data_o & 22'h00C78E); - data_o[19] = ~^(data_o & 22'h0007F0); - data_o[20] = ~^(data_o & 22'h00F800); - data_o[21] = ~^(data_o & 22'h1FFFFF); + data_o[16] = 0 ^ ^(data_o & 22'h00AD5B); + data_o[17] = 1 ^ ^(data_o & 22'h00366D); + data_o[18] = 0 ^ ^(data_o & 22'h00C78E); + data_o[19] = 1 ^ ^(data_o & 22'h0007F0); + data_o[20] = 0 ^ ^(data_o & 22'h00F800); + data_o[21] = 1 ^ ^(data_o & 22'h1FFFFF); return data_o; endfunction @@ -1384,12 +1438,12 @@ package prim_secded_pkg; secded_inv_hamming_22_16_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 22'h3F0000) & 22'h01AD5B); - syndrome_o[1] = ^((data_i ^ 22'h3F0000) & 22'h02366D); - syndrome_o[2] = ^((data_i ^ 22'h3F0000) & 22'h04C78E); - syndrome_o[3] = ^((data_i ^ 22'h3F0000) & 22'h0807F0); - syndrome_o[4] = ^((data_i ^ 22'h3F0000) & 22'h10F800); - syndrome_o[5] = ^((data_i ^ 22'h3F0000) & 22'h3FFFFF); + syndrome_o[0] = ^((data_i ^ 22'h2A0000) & 22'h01AD5B); + syndrome_o[1] = ^((data_i ^ 22'h2A0000) & 22'h02366D); + syndrome_o[2] = ^((data_i ^ 22'h2A0000) & 22'h04C78E); + syndrome_o[3] = ^((data_i ^ 22'h2A0000) & 22'h0807F0); + syndrome_o[4] = ^((data_i ^ 22'h2A0000) & 22'h10F800); + syndrome_o[5] = ^((data_i ^ 22'h2A0000) & 22'h3FFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 6'h23) ^ data_i[0]; @@ -1424,13 +1478,13 @@ package prim_secded_pkg; prim_secded_inv_hamming_39_32_enc (logic [31:0] data_i); logic [38:0] data_o; data_o = 39'(data_i); - data_o[32] = ~^(data_o & 39'h0056AAAD5B); - data_o[33] = ~^(data_o & 39'h009B33366D); - data_o[34] = ~^(data_o & 39'h00E3C3C78E); - data_o[35] = ~^(data_o & 39'h0003FC07F0); - data_o[36] = ~^(data_o & 39'h0003FFF800); - data_o[37] = ~^(data_o & 39'h00FC000000); - data_o[38] = ~^(data_o & 39'h3FFFFFFFFF); + data_o[32] = 0 ^ ^(data_o & 39'h0056AAAD5B); + data_o[33] = 1 ^ ^(data_o & 39'h009B33366D); + data_o[34] = 0 ^ ^(data_o & 39'h00E3C3C78E); + data_o[35] = 1 ^ ^(data_o & 39'h0003FC07F0); + data_o[36] = 0 ^ ^(data_o & 39'h0003FFF800); + data_o[37] = 1 ^ ^(data_o & 39'h00FC000000); + data_o[38] = 0 ^ ^(data_o & 39'h3FFFFFFFFF); return data_o; endfunction @@ -1443,13 +1497,13 @@ package prim_secded_pkg; secded_inv_hamming_39_32_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 39'h7F00000000) & 39'h0156AAAD5B); - syndrome_o[1] = ^((data_i ^ 39'h7F00000000) & 39'h029B33366D); - syndrome_o[2] = ^((data_i ^ 39'h7F00000000) & 39'h04E3C3C78E); - syndrome_o[3] = ^((data_i ^ 39'h7F00000000) & 39'h0803FC07F0); - syndrome_o[4] = ^((data_i ^ 39'h7F00000000) & 39'h1003FFF800); - syndrome_o[5] = ^((data_i ^ 39'h7F00000000) & 39'h20FC000000); - syndrome_o[6] = ^((data_i ^ 39'h7F00000000) & 39'h7FFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 39'h2A00000000) & 39'h0156AAAD5B); + syndrome_o[1] = ^((data_i ^ 39'h2A00000000) & 39'h029B33366D); + syndrome_o[2] = ^((data_i ^ 39'h2A00000000) & 39'h04E3C3C78E); + syndrome_o[3] = ^((data_i ^ 39'h2A00000000) & 39'h0803FC07F0); + syndrome_o[4] = ^((data_i ^ 39'h2A00000000) & 39'h1003FFF800); + syndrome_o[5] = ^((data_i ^ 39'h2A00000000) & 39'h20FC000000); + syndrome_o[6] = ^((data_i ^ 39'h2A00000000) & 39'h7FFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 7'h43) ^ data_i[0]; @@ -1500,14 +1554,14 @@ package prim_secded_pkg; prim_secded_inv_hamming_72_64_enc (logic [63:0] data_i); logic [71:0] data_o; data_o = 72'(data_i); - data_o[64] = ~^(data_o & 72'h00AB55555556AAAD5B); - data_o[65] = ~^(data_o & 72'h00CD9999999B33366D); - data_o[66] = ~^(data_o & 72'h00F1E1E1E1E3C3C78E); - data_o[67] = ~^(data_o & 72'h0001FE01FE03FC07F0); - data_o[68] = ~^(data_o & 72'h0001FFFE0003FFF800); - data_o[69] = ~^(data_o & 72'h0001FFFFFFFC000000); - data_o[70] = ~^(data_o & 72'h00FE00000000000000); - data_o[71] = ~^(data_o & 72'h7FFFFFFFFFFFFFFFFF); + data_o[64] = 0 ^ ^(data_o & 72'h00AB55555556AAAD5B); + data_o[65] = 1 ^ ^(data_o & 72'h00CD9999999B33366D); + data_o[66] = 0 ^ ^(data_o & 72'h00F1E1E1E1E3C3C78E); + data_o[67] = 1 ^ ^(data_o & 72'h0001FE01FE03FC07F0); + data_o[68] = 0 ^ ^(data_o & 72'h0001FFFE0003FFF800); + data_o[69] = 1 ^ ^(data_o & 72'h0001FFFFFFFC000000); + data_o[70] = 0 ^ ^(data_o & 72'h00FE00000000000000); + data_o[71] = 1 ^ ^(data_o & 72'h7FFFFFFFFFFFFFFFFF); return data_o; endfunction @@ -1520,14 +1574,14 @@ package prim_secded_pkg; secded_inv_hamming_72_64_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 72'hFF0000000000000000) & 72'h01AB55555556AAAD5B); - syndrome_o[1] = ^((data_i ^ 72'hFF0000000000000000) & 72'h02CD9999999B33366D); - syndrome_o[2] = ^((data_i ^ 72'hFF0000000000000000) & 72'h04F1E1E1E1E3C3C78E); - syndrome_o[3] = ^((data_i ^ 72'hFF0000000000000000) & 72'h0801FE01FE03FC07F0); - syndrome_o[4] = ^((data_i ^ 72'hFF0000000000000000) & 72'h1001FFFE0003FFF800); - syndrome_o[5] = ^((data_i ^ 72'hFF0000000000000000) & 72'h2001FFFFFFFC000000); - syndrome_o[6] = ^((data_i ^ 72'hFF0000000000000000) & 72'h40FE00000000000000); - syndrome_o[7] = ^((data_i ^ 72'hFF0000000000000000) & 72'hFFFFFFFFFFFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 72'hAA0000000000000000) & 72'h01AB55555556AAAD5B); + syndrome_o[1] = ^((data_i ^ 72'hAA0000000000000000) & 72'h02CD9999999B33366D); + syndrome_o[2] = ^((data_i ^ 72'hAA0000000000000000) & 72'h04F1E1E1E1E3C3C78E); + syndrome_o[3] = ^((data_i ^ 72'hAA0000000000000000) & 72'h0801FE01FE03FC07F0); + syndrome_o[4] = ^((data_i ^ 72'hAA0000000000000000) & 72'h1001FFFE0003FFF800); + syndrome_o[5] = ^((data_i ^ 72'hAA0000000000000000) & 72'h2001FFFFFFFC000000); + syndrome_o[6] = ^((data_i ^ 72'hAA0000000000000000) & 72'h40FE00000000000000); + syndrome_o[7] = ^((data_i ^ 72'hAA0000000000000000) & 72'hFFFFFFFFFFFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 8'h83) ^ data_i[0]; @@ -1610,14 +1664,14 @@ package prim_secded_pkg; prim_secded_inv_hamming_76_68_enc (logic [67:0] data_i); logic [75:0] data_o; data_o = 76'(data_i); - data_o[68] = ~^(data_o & 76'h00AAB55555556AAAD5B); - data_o[69] = ~^(data_o & 76'h00CCD9999999B33366D); - data_o[70] = ~^(data_o & 76'h000F1E1E1E1E3C3C78E); - data_o[71] = ~^(data_o & 76'h00F01FE01FE03FC07F0); - data_o[72] = ~^(data_o & 76'h00001FFFE0003FFF800); - data_o[73] = ~^(data_o & 76'h00001FFFFFFFC000000); - data_o[74] = ~^(data_o & 76'h00FFE00000000000000); - data_o[75] = ~^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); + data_o[68] = 0 ^ ^(data_o & 76'h00AAB55555556AAAD5B); + data_o[69] = 1 ^ ^(data_o & 76'h00CCD9999999B33366D); + data_o[70] = 0 ^ ^(data_o & 76'h000F1E1E1E1E3C3C78E); + data_o[71] = 1 ^ ^(data_o & 76'h00F01FE01FE03FC07F0); + data_o[72] = 0 ^ ^(data_o & 76'h00001FFFE0003FFF800); + data_o[73] = 1 ^ ^(data_o & 76'h00001FFFFFFFC000000); + data_o[74] = 0 ^ ^(data_o & 76'h00FFE00000000000000); + data_o[75] = 1 ^ ^(data_o & 76'h7FFFFFFFFFFFFFFFFFF); return data_o; endfunction @@ -1630,14 +1684,14 @@ package prim_secded_pkg; secded_inv_hamming_76_68_t dec; // Syndrome calculation - syndrome_o[0] = ^((data_i ^ 76'hFF00000000000000000) & 76'h01AAB55555556AAAD5B); - syndrome_o[1] = ^((data_i ^ 76'hFF00000000000000000) & 76'h02CCD9999999B33366D); - syndrome_o[2] = ^((data_i ^ 76'hFF00000000000000000) & 76'h040F1E1E1E1E3C3C78E); - syndrome_o[3] = ^((data_i ^ 76'hFF00000000000000000) & 76'h08F01FE01FE03FC07F0); - syndrome_o[4] = ^((data_i ^ 76'hFF00000000000000000) & 76'h10001FFFE0003FFF800); - syndrome_o[5] = ^((data_i ^ 76'hFF00000000000000000) & 76'h20001FFFFFFFC000000); - syndrome_o[6] = ^((data_i ^ 76'hFF00000000000000000) & 76'h40FFE00000000000000); - syndrome_o[7] = ^((data_i ^ 76'hFF00000000000000000) & 76'hFFFFFFFFFFFFFFFFFFF); + syndrome_o[0] = ^((data_i ^ 76'hAA00000000000000000) & 76'h01AAB55555556AAAD5B); + syndrome_o[1] = ^((data_i ^ 76'hAA00000000000000000) & 76'h02CCD9999999B33366D); + syndrome_o[2] = ^((data_i ^ 76'hAA00000000000000000) & 76'h040F1E1E1E1E3C3C78E); + syndrome_o[3] = ^((data_i ^ 76'hAA00000000000000000) & 76'h08F01FE01FE03FC07F0); + syndrome_o[4] = ^((data_i ^ 76'hAA00000000000000000) & 76'h10001FFFE0003FFF800); + syndrome_o[5] = ^((data_i ^ 76'hAA00000000000000000) & 76'h20001FFFFFFFC000000); + syndrome_o[6] = ^((data_i ^ 76'hAA00000000000000000) & 76'h40FFE00000000000000); + syndrome_o[7] = ^((data_i ^ 76'hAA00000000000000000) & 76'hFFFFFFFFFFFFFFFFFFF); // Corrected output calculation data_o[0] = (syndrome_o == 8'h83) ^ data_i[0]; diff --git a/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py b/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py new file mode 100755 index 00000000..a978d44a --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim/util/prim_crc32_table_gen.py @@ -0,0 +1,42 @@ +#!/usr/bin/env python3 +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +import binascii + +function_header = ''' +// Generated using hw/ip/prim/util/prim_crc32_table_gen.py +function automatic logic [31:0] crc32_byte_calc(logic [7:0] b); + unique case (b)''' + +function_footer = ''' default: crc32_byte_calc = '0; + endcase +endfunction +''' + +function_table_line = " 8'h{:02x}: crc32_byte_calc = 32'h{:08x};" + + +def main(): + print(function_header) + # Loop through all bytes to calculate a lookup table. + for i in range(256): + # The CRC update function using a byte lookup table is: + # + # crc = (crc >> 8) ^ crc_table[(crc & 0xff) ^ b] + # + # Where b is the byte input and the initial CRC is 0xffffffff. So given + # input i, an inverted i (i ^ 0xff) is the input to the table giving + # `table_in`. binascii.crc32 inverts the crc before returning. The ^ + # 0xff000000 reverses this along with the (crc >> 8) that is XORed to + # the table output giving table_out. + table_in = i ^ 0xff + b = i.to_bytes(1, byteorder='little') + table_out = binascii.crc32(b) ^ 0xff000000 + print(function_table_line.format(table_in, table_out)) + print(function_footer) + + +if __name__ == '__main__': + main() diff --git a/vendor/lowrisc_ip/ip/prim_generic/BUILD b/vendor/lowrisc_ip/ip/prim_generic/BUILD new file mode 100644 index 00000000..c87fb863 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim_generic/BUILD @@ -0,0 +1,11 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "all_files", + srcs = glob(["**"]) + [ + ], +) diff --git a/vendor/lowrisc_ip/ip/prim_xilinx/BUILD b/vendor/lowrisc_ip/ip/prim_xilinx/BUILD new file mode 100644 index 00000000..c87fb863 --- /dev/null +++ b/vendor/lowrisc_ip/ip/prim_xilinx/BUILD @@ -0,0 +1,11 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 + +package(default_visibility = ["//visibility:public"]) + +filegroup( + name = "all_files", + srcs = glob(["**"]) + [ + ], +) diff --git a/vendor/lowrisc_ip/util/dvsim/CdcCfg.py b/vendor/lowrisc_ip/util/dvsim/CdcCfg.py new file mode 100644 index 00000000..3444127e --- /dev/null +++ b/vendor/lowrisc_ip/util/dvsim/CdcCfg.py @@ -0,0 +1,26 @@ +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +r''' +Class describing lint configuration object +''' + +import logging as log +from pathlib import Path + +from tabulate import tabulate + +from LintCfg import LintCfg +from utils import subst_wildcards, check_bool +from MsgBuckets import MsgBuckets + + +class CdcCfg(LintCfg): + '''Derivative class for linting purposes.''' + + flow = 'cdc' + + def __init__(self, flow_cfg_file, hjson_data, args, mk_config): + super().__init__(flow_cfg_file, hjson_data, args, mk_config) + + self.results_title = f'{self.name.upper()} CDC Results' diff --git a/vendor/lowrisc_ip/util/dvsim/CfgFactory.py b/vendor/lowrisc_ip/util/dvsim/CfgFactory.py index 0486bec2..d38cc995 100644 --- a/vendor/lowrisc_ip/util/dvsim/CfgFactory.py +++ b/vendor/lowrisc_ip/util/dvsim/CfgFactory.py @@ -9,6 +9,7 @@ import os from CfgJson import load_hjson import FormalCfg +import CdcCfg import LintCfg import SimCfg import SynCfg @@ -40,6 +41,7 @@ def _load_cfg(path, initial_values): .format(path)) classes = [ + CdcCfg.CdcCfg, LintCfg.LintCfg, SynCfg.SynCfg, FormalCfg.FormalCfg, diff --git a/vendor/lowrisc_ip/util/dvsim/LintCfg.py b/vendor/lowrisc_ip/util/dvsim/LintCfg.py index 6270acf9..89923d86 100644 --- a/vendor/lowrisc_ip/util/dvsim/LintCfg.py +++ b/vendor/lowrisc_ip/util/dvsim/LintCfg.py @@ -37,8 +37,10 @@ class LintCfg(OneShotCfg): super().__init__(flow_cfg_file, hjson_data, args, mk_config) - # Convert to boolean if needed. - self.is_style_lint = check_bool(self.is_style_lint) + if self.is_style_lint == '': + self.is_style_lint = False + else: + self.is_style_lint = check_bool(self.is_style_lint) # Set the title for lint results. if self.is_style_lint: diff --git a/vendor/lowrisc_ip/util/dvsim/dvsim.py b/vendor/lowrisc_ip/util/dvsim/dvsim.py index e20d55bd..b2c1bd43 100755 --- a/vendor/lowrisc_ip/util/dvsim/dvsim.py +++ b/vendor/lowrisc_ip/util/dvsim/dvsim.py @@ -286,7 +286,7 @@ def parse_args(): "optional for running simulations (where it can " "be set in an .hjson file), but is required for " "other flows. Possible tools include: vcs, " - "xcelium, ascentlint, veriblelint, verilator, dc.")) + "xcelium, ascentlint, verixcdc, veriblelint, verilator, dc.")) parser.add_argument("--list", "-l", diff --git a/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py b/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py new file mode 100755 index 00000000..485873f6 --- /dev/null +++ b/vendor/lowrisc_ip/util/dvsim/verixcdc-report-parser.py @@ -0,0 +1,247 @@ +#!/usr/bin/env python3 +# Copyright lowRISC contributors. +# Licensed under the Apache License, Version 2.0, see LICENSE for details. +# SPDX-License-Identifier: Apache-2.0 +r"""Parses cdc report and dump filtered messages in hjson format. +""" +import argparse +import logging as log +import re +import sys +import os +import hjson + +from pathlib import Path +from LintParser import LintParser + + +def extract_rule_patterns(file_path: Path): + ''' + This parses the CDC summary table to get the message totals, + rule names and corresponding severities. + ''' + + rule_patterns = [] + full_file = '' + try: + with Path(file_path).open() as f: + full_file = f.read() + except IOError: + # We will attempt read this file again in a second pass to parse out + # the details, this error will get caught and reported. + pass + + category = '' + severity = '' + known_rule_names = {} + total_msgs = 0 + # extract the summary table + m = re.findall( + r'^Summary of Policy: ALL((?:.|\n|\r\n)*)Rule Details of Policy: ALL', + full_file, flags=re.MULTILINE) + if m: + # step through the table and identify rule names and their + # category and severity + for line in m[0].split('\n'): + if re.match(r'^POLICY\s+ALL', line): + total = re.findall(r'^POLICY\s+ALL\s+([0-9]+)', line) + total_msgs = int(total[0]) + elif re.match(r'^ GROUP\s+SDC_ENV_LINT', line): + category = 'sdc' + elif re.match(r'^ GROUP\s+VCDC_SETUP_CHECKS', line): + category = 'setup' + elif re.match(r'^ GROUP\s+VCDC_ANALYSIS_CHECKS', line): + category = 'cdc' + elif re.match(r'^ GROUP\s+ERROR', line): + severity = 'error' + elif re.match(r'^ GROUP\s+WARNING', line): + severity = 'warning' + elif re.match(r'^ GROUP\s+INFO', line): + severity = 'info' + elif re.match(r'^ GROUP\s+REVIEW', line): + severity = 'review' + elif re.match(r'^ INSTANCE', line): + # we've found a new rule. convert it to a known rule pattern + # with the correct category and severity + rule = re.findall( + r'^ INSTANCE\s+([a-zA-Z0-9\_]+)\s+([0-9\_]+)', line) + name = rule[0][0] + count = int(rule[0][1]) + # a few rules produce messages with different severities but + # the same rule labels. for simplicity, we promote messages + # from lower severity buckets to the severity bucket where + # this rule name has first been encountered. since higher + # severity messages are listed first in this summary table, it + # is straightforward to check whether the rule name has + # already appeared in a higher severity bucket. + if name in known_rule_names: + msg_group = known_rule_names[name] + log.warning('Rule {} is reported in multiple severity ' + 'classes. All messages of this rule are ' + 'promoted to {}'.format(name, msg_group)) + + else: + msg_group = category + '_' + severity + known_rule_names.update({name: msg_group}) + rule_patterns.append((msg_group, r'^{}:.*'.format(name))) + + return rule_patterns + + +# Reuse the lint parser, but add more buckets. +class CdcParser(LintParser): + + def __init__(self) -> None: + self.buckets = { + 'flow_info': [], + 'flow_warning': [], + 'flow_error': [], + 'sdc_info': [], + 'sdc_review': [], + 'sdc_warning': [], + 'sdc_error': [], + 'setup_info': [], + 'setup_review': [], + 'setup_warning': [], + 'setup_error': [], + 'cdc_info': [], + 'cdc_review': [], + 'cdc_warning': [], + 'cdc_error': [], + # this bucket is temporary and will be removed at the end of the + # parsing pass. + 'fusesoc-error': [] + } + self.severities = { + 'flow_info': 'info', + 'flow_warning': 'warning', + 'flow_error': 'error', + 'sdc_info': 'info', + 'sdc_review': 'warning', + 'sdc_warning': 'warning', + 'sdc_error': 'error', + 'setup_info': 'info', + 'setup_review': 'warning', + 'setup_warning': 'warning', + 'setup_error': 'error', + 'cdc_info': 'info', + 'cdc_review': 'warning', + 'cdc_warning': 'warning', + 'cdc_error': 'error' + } + + +# TODO(#9079): this script will be removed long term once the +# parser has been merged with the Dvsim core code. +def main(): + parser = argparse.ArgumentParser( + description="""This script parses AscentLint log and report files from + a lint run, filters the messages and creates an aggregated result + .hjson file with lint messages and their severities. + + The script returns nonzero status if any warnings or errors are + present. + """) + parser.add_argument('--repdir', + type=lambda p: Path(p).resolve(), + default="./", + help="""The script searches the 'vcdc.log' and + 'vcdc.rpt' files in this directory. + Defaults to './'""") + + parser.add_argument('--outfile', + type=lambda p: Path(p).resolve(), + default="./results.hjson", + help="""Path to the results Hjson file. + Defaults to './results.hjson'""") + + args = parser.parse_args() + + # Define warning/error patterns for each logfile + parser_args = {} + + # Patterns for lint.log + parser_args.update({ + args.repdir.joinpath('build.log'): [ + # If lint warnings have been found, the lint tool will exit + # with a nonzero status code and fusesoc will always spit out + # an error like + # + # ERROR: Failed to build ip:core:name:0.1 : 'make' exited with an error code + # + # If we found any other warnings or errors, there's no point in + # listing this too. BUT we want to make sure we *do* see this + # error if there are no other errors or warnings, since that + # shows something has come unstuck. (Probably the lint tool + # spat out a warning that we don't understand) + ("fusesoc-error", + r"^ERROR: Failed to build .* : 'make' exited with an error code") + ] + }) + + # Patterns for vcdc.log + parser_args.update({ + args.repdir.joinpath('syn-icarus/vcdc.log'): [ + ("flow_error", r"^FlexNet Licensing error.*"), + ("flow_error", r"^Error: .*"), + ("flow_error", r"^ERROR.*"), + ("flow_error", r"^ ERR .*"), + ("flow_warning", r"^Warning: .*"), + # We ignore several messages here: + # #25010: unused signals + # #25011: unused signals + # #25012: unused port + # #25013: unused signals + # #26038: unused or RTL constant + # #39035: parameter becomes local + # #39122: non-positive repeat + # #39491: parameter in package + ("flow_warning", r"^ " + "(?!WARN \[#25010\])" + "(?!WARN \[#25011\])" + "(?!WARN \[#25012\])" + "(?!WARN \[#25013\])" + "(?!WARN \[#26038\])" + "(?!WARN \[#39035\])" + "(?!WARN \[#39122\])" + "(?!WARN \[#39491\])" + "WARN .*"), + ("flow_info", r"^ INFO .*") + ] + }) + + # The CDC messages are a bit more involved to parse out, since we + # need to know the names and associated severities to do this. + # The tool prints out an overview table in the report, which we are + # going to parse first in order to get this information. + # This is then used to construct the regex patterns to look for + # in a second pass to get the actual CDC messages. + cdc_rule_patterns = extract_rule_patterns( + args.repdir.joinpath('syn-icarus/vcdc.rpt')) + + # Patterns for vcdc.rpt + parser_args.update({ + args.repdir.joinpath('syn-icarus/vcdc.rpt'): cdc_rule_patterns + }) + + # Parse logs + parser = CdcParser() + num_messages = parser.get_results(parser_args) + + # Write out results file + parser.write_results_as_hjson(args.outfile) + + # return nonzero status if any warnings or errors are present + # lint infos do not count as failures + if num_messages['error'] > 0 or num_messages['warning'] > 0: + log.info("Found %d lint errors and %d lint warnings", + num_messages['error'], + num_messages['warning']) + sys.exit(1) + + log.info("Lint logfile parsed succesfully") + sys.exit(0) + + +if __name__ == "__main__": + main()