CAPI=2: # Copyright lowRISC contributors. # Licensed under the Apache License, Version 2.0, see LICENSE for details. # SPDX-License-Identifier: Apache-2.0 name: "lowrisc:ibex:ibex_core:0.1" description: "CPU core with 2 stage pipeline implementing the RV32IMC_Zicsr ISA" filesets: files_rtl: depend: - lowrisc:prim:assert files: - rtl/ibex_pkg.sv - rtl/ibex_alu.sv - rtl/ibex_compressed_decoder.sv - rtl/ibex_controller.sv - rtl/ibex_cs_registers.sv - rtl/ibex_counters.sv - rtl/ibex_decoder.sv - rtl/ibex_ex_block.sv - rtl/ibex_fetch_fifo.sv - rtl/ibex_id_stage.sv - rtl/ibex_if_stage.sv - rtl/ibex_load_store_unit.sv - rtl/ibex_multdiv_fast.sv - rtl/ibex_multdiv_slow.sv - rtl/ibex_prefetch_buffer.sv - rtl/ibex_pmp.sv - rtl/ibex_wb_stage.sv # XXX: Figure out the best way to switch these two implementations # dynamically on the target. # - rtl/ibex_register_file_latch.sv # ASIC # - rtl/ibex_register_file_fpga.sv # FPGA - rtl/ibex_register_file_ff.sv # generic FF-based - rtl/ibex_core.sv file_type: systemVerilogSource files_lint: depend: - lowrisc:ibex:sim_shared files_lint_verilator: files: - lint/verilator_waiver.vlt: {file_type: vlt} files_check_tool_requirements: depend: - lowrisc:ibex:check_tool_requirements parameters: RVFI: datatype: bool paramtype: vlogdefine SYNTHESIS: datatype: bool paramtype: vlogdefine RV32E: datatype: bool paramtype: vlogparam RV32M: datatype: bool paramtype: vlogparam MultiplierImplementation: datatype: str paramtype: vlogparam description: "Multiplier implementation. Valid values: fast, slow" default: fast BranchTargetALU: datatype: int paramtype: vlogparam default: 0 description: "Enables seperate branch target ALU (increasing branch performance EXPERIMENTAL) [0/1]" WritebackStage: datatype: int paramtype: vlogparam default: 0 description: "Enables third pipeline stage (EXPERIMENTAL) [0/1]" targets: default: filesets: - tool_verilator ? (files_lint_verilator) - files_rtl - files_check_tool_requirements lint: filesets: - tool_verilator ? (files_lint_verilator) - files_rtl - files_lint - files_check_tool_requirements parameters: - SYNTHESIS=true - RVFI=true default_tool: verilator toplevel: ibex_core tools: verilator: mode: lint-only verilator_options: - "-Wall"