///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-06-17 22:58:09.908718//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, 
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software 
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT 
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////

#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32I")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

RVTEST_CASE(0,"//check ISA:=regex(.*32.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",sub)

RVTEST_SIGBASE( x6, wally_signature)

# Testcase 0:  rs1:x3(0x00000000), rs2:x29(0x00000000), result rd:x28(0x00000000)
li x3, MASK_XLEN(0x00000000)
li x29, MASK_XLEN(0x00000000)
SUB x28, x3, x29
sw x28, 0(x6)

# Testcase 1:  rs1:x22(0x00000000), rs2:x11(0x00000001), result rd:x16(0xffffffff)
li x22, MASK_XLEN(0x00000000)
li x11, MASK_XLEN(0x00000001)
SUB x16, x22, x11
sw x16, 4(x6)

# Testcase 2:  rs1:x18(0x00000000), rs2:x4(0xffffffff), result rd:x12(0x00000001)
li x18, MASK_XLEN(0x00000000)
li x4, MASK_XLEN(0xffffffff)
SUB x12, x18, x4
sw x12, 8(x6)

# Testcase 3:  rs1:x14(0x00000001), rs2:x11(0x00000000), result rd:x20(0x00000001)
li x14, MASK_XLEN(0x00000001)
li x11, MASK_XLEN(0x00000000)
SUB x20, x14, x11
sw x20, 12(x6)

# Testcase 4:  rs1:x21(0x00000001), rs2:x30(0x00000001), result rd:x7(0x00000000)
li x21, MASK_XLEN(0x00000001)
li x30, MASK_XLEN(0x00000001)
SUB x7, x21, x30
sw x7, 16(x6)

# Testcase 5:  rs1:x31(0x00000001), rs2:x18(0xffffffff), result rd:x16(0x00000002)
li x31, MASK_XLEN(0x00000001)
li x18, MASK_XLEN(0xffffffff)
SUB x16, x31, x18
sw x16, 20(x6)

# Testcase 6:  rs1:x15(0xffffffff), rs2:x28(0x00000000), result rd:x17(0xffffffff)
li x15, MASK_XLEN(0xffffffff)
li x28, MASK_XLEN(0x00000000)
SUB x17, x15, x28
sw x17, 24(x6)

# Testcase 7:  rs1:x9(0xffffffff), rs2:x2(0x00000001), result rd:x26(0xfffffffe)
li x9, MASK_XLEN(0xffffffff)
li x2, MASK_XLEN(0x00000001)
SUB x26, x9, x2
sw x26, 28(x6)

# Testcase 8:  rs1:x30(0xffffffff), rs2:x18(0xffffffff), result rd:x30(0x00000000)
li x30, MASK_XLEN(0xffffffff)
li x18, MASK_XLEN(0xffffffff)
SUB x30, x30, x18
sw x30, 32(x6)

# Testcase 9:  rs1:x24(0x03983ca8), rs2:x27(0x17e0aa3c), result rd:x13(0xebb7926c)
li x24, MASK_XLEN(0x03983ca8)
li x27, MASK_XLEN(0x17e0aa3c)
SUB x13, x24, x27
sw x13, 36(x6)

# Testcase 10:  rs1:x26(0xb5d32b16), rs2:x22(0xd3290a4c), result rd:x21(0xe2aa20ca)
li x26, MASK_XLEN(0xb5d32b16)
li x22, MASK_XLEN(0xd3290a4c)
SUB x21, x26, x22
sw x21, 40(x6)

# Testcase 11:  rs1:x16(0x004ae545), rs2:x27(0x9ca5499d), result rd:x28(0x63a59ba8)
li x16, MASK_XLEN(0x004ae545)
li x27, MASK_XLEN(0x9ca5499d)
SUB x28, x16, x27
sw x28, 44(x6)

.EQU NUMTESTS,12

RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END

RVMODEL_DATA_BEGIN


wally_signature:
    .fill NUMTESTS*(XLEN/32),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*(XLEN/32),4,0xdeadbeef

#endif
sig_end_canary:
.int 0x0
rvtest_sig_end:

RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv32i_m/I/src/WALLY-SUB.S
// David_Harris@hmc.edu & Katherine Parry
