# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore

add16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      add16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

radd16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      radd16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

uradd16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uradd16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kadd16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kadd16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukadd16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukadd16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

sub16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sub16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

rsub16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rsub16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0


ursub16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ursub16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

ksub16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksub16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

uksub16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uksub16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

cras16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      cras16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

rcras16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rcras16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

urcras16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      urcras16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kcras16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kcras16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukcras16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukcras16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

crsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      crsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

rcrsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rcrsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

urcrsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      urcrsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kcrsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kcrsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukcrsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukcrsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

stas16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      stas16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

rstas16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rstas16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

urstas16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      urstas16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kstas16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kstas16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukstas16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukstas16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

stsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      stsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

rstsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rstsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

urstsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      urstsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kstsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kstsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukstsa16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukstsa16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

add8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      add8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

radd8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      radd8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

uradd8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uradd8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

kadd8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kadd8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

ukadd8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics: 
      ukadd8: 0
    rs1: 
      <<: *all_regs
    rs2: 
      <<: *all_regs
    rd: 
      <<: *all_regs
    op_comb: 
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

sub8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sub8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

rsub8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rsub8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

ursub8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ursub8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

ksub8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksub8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

uksub8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uksub8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

sra16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sra16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

srai16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srai16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_imm_val("imm_val", 4)': 0

sra16.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sra16.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

srai16.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srai16.u: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_imm_val("imm_val", 4)': 0

srl16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srl16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

srli16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srli16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_imm_val("imm_val", 4)': 0

srl16.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srl16.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

srli16.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srli16.u: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_imm_val("imm_val", 4)': 0

sll16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sll16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

slli16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      slli16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_imm_val("imm_val", 4)': 0

ksll16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksll16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(16, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(16, 2)), False)': 0
        'alternate("rs2_val", ceil(log(16, 2)), False)': 0

kslli16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslli16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_imm_val("imm_val", 4)': 0

kslra16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslra16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'walking_ones("rs2_val", xlen, True)': 0
        'walking_zeros("rs2_val", xlen, True)': 0
        'alternate("rs2_val", xlen, True)': 0

kslra16.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslra16.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'walking_ones("rs2_val", xlen, True)': 0
        'walking_zeros("rs2_val", xlen, True)': 0
        'alternate("rs2_val", xlen, True)': 0

sra8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sra8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

srai8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srai8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_imm_val("imm_val", 3)': 0

sra8.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sra8.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

srai8.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srai8.u: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_imm_val("imm_val", 3)': 0

srl8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srl8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

srli8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srli8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_imm_val("imm_val", 3)': 0

srl8.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srl8.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

srli8.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srli8.u: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_imm_val("imm_val", 3)': 0

sll8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sll8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

slli8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      slli8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_imm_val("imm_val", 3)': 0

ksll8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksll8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(8, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(8, 2)), False)': 0
        'alternate("rs2_val", ceil(log(8, 2)), False)': 0

kslli8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslli8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_imm_val("imm_val", 3)': 0

kslra8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslra8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'walking_ones("rs2_val", xlen, True)': 0
        'walking_zeros("rs2_val", xlen, True)': 0
        'alternate("rs2_val", xlen, True)': 0

kslra8.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslra8.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'walking_ones("rs2_val", xlen, True)': 0
        'walking_zeros("rs2_val", xlen, True)': 0
        'alternate("rs2_val", xlen, True)': 0

cmpeq16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      cmpeq16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

scmplt16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      scmplt16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

scmple16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      scmple16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ucmplt16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ucmplt16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

ucmple16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ucmple16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

cmpeq8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      cmpeq8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

scmplt8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      scmplt8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

scmple8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      scmple8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

ucmplt8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ucmplt8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

ucmple8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ucmple8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

smul16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smul16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smulx16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smulx16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

umul16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umul16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

umulx16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umulx16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

khm16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khm16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

khmx16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khmx16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smul8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smul8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

smulx8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smulx8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

umul8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umul8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

umulx8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umulx8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

khm8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khm8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

khmx8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khmx8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

smin16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smin16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

umin16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umin16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

smax16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smax16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

umax16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umax16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

sclip16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sclip16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_imm_val("imm_val", 4)': 0

uclip16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uclip16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_imm_val("imm_val", 4)': 0

kabs16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kabs16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0

clrs16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      clrs16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0

clz16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      clz16: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0

# alias of pkbt16
# swap16:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       swap16: 0
#     rs1:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     val_comb:
#       abstract_comb:
#         'simd_base_val("rs1", xlen, 16, signed=False)': 0

smin8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smin8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

umin8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umin8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

smax8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smax8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

umax8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umax8: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

kabs8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kabs8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

sclip8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sclip8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_imm_val("imm_val", 3)': 0

uclip8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uclip8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_imm_val("imm_val", 3)': 0

clrs8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      clrs8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

clz8:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      clz8: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

# instructions overlapping with those in the B extension in RV32/RV64 configuration (Zbpbo)
# swap8:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       swap8: 0
#     rs1:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     val_comb:
#       abstract_comb:
#         'simd_base_val("rs1", xlen, 8, signed=False)': 0

sunpkd810:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sunpkd810: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

sunpkd820:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sunpkd820: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

sunpkd830:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sunpkd830: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

sunpkd831:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sunpkd831: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

sunpkd832:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sunpkd832: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0

zunpkd810:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      zunpkd810: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

zunpkd820:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      zunpkd820: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

zunpkd830:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      zunpkd830: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

zunpkd831:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      zunpkd831: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

zunpkd832:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      zunpkd832: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0

# instructions overlapping with those in the B extension in RV32 configuration (Zbpbo)
# pkbb16:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       pkbb16: 0
#     rs1:
#       <<: *all_regs
#     rs2:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *rfmt_op_comb
#     val_comb:
#       abstract_comb:
#         'simd_base_val("rs1", xlen, 16, signed=False)': 0
#         'simd_base_val("rs2", xlen, 16, signed=False)': 0
#         'simd_val_comb(xlen, 16, signed=False)': 0

pkbt16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      pkbt16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

pktb16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      pktb16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

# instructions overlapping with those in the B extension in RV32 configuration (Zbpbo)
# pktt16:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       pktt16: 0
#     rs1:
#       <<: *all_regs
#     rs2:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *rfmt_op_comb
#     val_comb:
#       abstract_comb:
#         'simd_base_val("rs1", xlen, 16, signed=False)': 0
#         'simd_base_val("rs2", xlen, 16, signed=False)': 0
#         'simd_val_comb(xlen, 16, signed=False)': 0

# 2.3.2.
smmul:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmul: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

smmul.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmul.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kmmac:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmac: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kmmac.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmac.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kmmsb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmsb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kmmsb.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmsb.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kwmmul:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kwmmul: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

kwmmul.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kwmmul.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0


# 2.3.3 Most Significant Word 32x32 Multiply & Add Instructions

smmwb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmwb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

smmwb.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmwb.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

smmwt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmwt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

smmwt.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smmwt.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0


kmmawb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawb.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawb.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawt.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawt.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0


kmmwb2:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmwb2: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmwb2.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmwb2.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmwt2:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmwt2: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmwt2.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmwt2.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0


kmmawb2:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawb2: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawb2.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawb2.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawt2:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawt2: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

kmmawt2.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmmawt2.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

# 2.3.4

smbb16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smbb16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smbt16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smbt16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smtt16:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smtt16: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmxda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmxda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0
smds:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smds: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smdrs:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smdrs: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smxds:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smxds: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmabb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmabb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmabt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmabt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmatt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmatt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmada:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmada: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmaxda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmaxda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmads:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmads: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmadrs:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmadrs: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmaxds:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmaxds: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmsda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmsda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kmsxda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmsxda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

# 2.3.5
smal:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smal: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn]
      abstract_comb:
        'simd_base_val("rs2", xlen, 16, signed=True)': 0

# 2.3.6 Miscellaneous Instructions

sclip32:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sclip32: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_imm_val("imm_val", 5)': 0

uclip32:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uclip32: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_imm_val("imm_val", 5)': 0

clrs32:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      clrs32: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0

# instructions overlapping with those in the B extension in RV32 configuration (Zbpbo)
# clz32:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       clz32: 0
#     rs1:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     val_comb:
#       abstract_comb:
#         'simd_base_val("rs1", xlen, 32, signed=False)': 0

pbsad:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      pbsad: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

pbsada:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      pbsada: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

smaqa:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smaqa: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

umaqa:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umaqa: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=False)': 0
        'simd_base_val("rs2", xlen, 8, signed=False)': 0
        'simd_val_comb(xlen, 8, signed=False)': 0

smaqa.su:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smaqa.su: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 8, signed=True)': 0
        'simd_base_val("rs2", xlen, 8, signed=True)': 0
        'simd_val_comb(xlen, 8, signed=True)': 0

# 2.4.1
add64:
    config:
      - check ISA:=regex(.*32.*I.*P.*Zicsr.*)
    mnemonics:
      add64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

radd64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      radd64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

uradd64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uradd64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_unsgn, *rvp64_rs2val_unsgn, *rfmt_val_comb_unsgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_unsgn, *rvp64_rs2val_walking_unsgn]

kadd64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kadd64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

ukadd64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukadd64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_unsgn, *rvp64_rs2val_unsgn, *rfmt_val_comb_unsgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_unsgn, *rvp64_rs2val_walking_unsgn]

sub64:
    config:
      - check ISA:=regex(.*32.*I.*P.*Zicsr.*)
    mnemonics:
      sub64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

rsub64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rsub64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

ursub64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ursub64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_unsgn, *rvp64_rs2val_unsgn, *rfmt_val_comb_unsgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_unsgn, *rvp64_rs2val_walking_unsgn]

ksub64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksub64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_sgn, *rvp64_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_sgn, *rvp64_rs2val_walking_sgn]

uksub64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uksub64: 0
    rs1:
      <<: *pair_regs
    rs2:
      <<: *pair_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*rvp64_rs1val_unsgn, *rvp64_rs2val_unsgn, *rfmt_val_comb_unsgn]
      abstract_comb:
        <<: [*rvp64_rs1val_walking_unsgn, *rvp64_rs2val_walking_unsgn]

# 2.4.2
smar64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smar64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

smsr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smsr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

umar64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umar64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

umsr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      umsr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

kmar64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmar64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

kmsr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kmsr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

ukmar64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukmar64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

ukmsr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukmsr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

# 2.4.3
smalbb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalbb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smalbt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalbt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smaltt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smaltt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smalda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smalxda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalxda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smalds:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalds: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smaldrs:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smaldrs: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smalxds:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smalxds: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smslda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smslda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

smslxda:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      smslxda: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

# 2.5 Non-SIMD Instructions

kaddh:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kaddh: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ksubh:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksubh: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

khmbb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khmbb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

khmbt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khmbt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

khmtt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      khmtt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

ukaddh:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukaddh: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

uksubh:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uksubh: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=False)': 0
        'simd_base_val("rs2", xlen, 16, signed=False)': 0
        'simd_val_comb(xlen, 16, signed=False)': 0

kaddw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kaddw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

ukaddw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ukaddw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

ksubw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksubw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

uksubw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uksubw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
        'simd_val_comb(xlen, 32, signed=False)': 0

kdmbb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmbb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kdmbt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmbt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kdmtt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmtt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kslraw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslraw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0
        'simd_val_comb(xlen, 32, signed=True)': 0

kslraw.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslraw.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      'rs1_w0_val == rs2_w0_val': 0
      'rs1_w0_val != rs2_w0_val': 0
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

ksllw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ksllw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'walking_ones("rs2_val", ceil(log(32, 2)), False)': 0
        'walking_zeros("rs2_val", ceil(log(32, 2)), False)': 0
        'alternate("rs2_val", ceil(log(32, 2)), False)': 0

kslliw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kslliw: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_imm_val("imm_val", 5)': 0

kdmabb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmabb: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kdmabt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmabt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kdmatt:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kdmatt: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 16, signed=True)': 0
        'simd_base_val("rs2", xlen, 16, signed=True)': 0
        'simd_val_comb(xlen, 16, signed=True)': 0

kabsw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      kabsw: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0

# 2.5.3.
raddw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      raddw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

uraddw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      uraddw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0

rsubw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      rsubw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

ursubw:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ursubw: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0

mulr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      mulr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=False)': 0
        'simd_base_val("rs2", xlen, 32, signed=False)': 0
mulsr64:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      mulsr64: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *pair_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

maddr32:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      maddr32: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

msubr32:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      msubr32: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      abstract_comb:
        'simd_base_val("rs1", xlen, 32, signed=True)': 0
        'simd_base_val("rs2", xlen, 32, signed=True)': 0

# 2.5.4
# alias of csr operations 
# rdov:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       rdov: 0
#     rd:
#       <<: *all_regs
# 
# 
# clrov:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       clrov: 0
#     rd:
#       <<: *all_regs

# 2.5.5.
ave:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      ave: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*base_rs1val_sgn, *base_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rs1val_walking, *rs2val_walking]

sra.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      sra.u: 0
    rs1:
      <<: *all_regs
    rs2:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *rfmt_op_comb
    val_comb:
      <<: [*base_rs1val_sgn, *base_rs2val_sgn, *rfmt_val_comb_sgn]
      abstract_comb:
        <<: [*rs1val_walking, *rs2val_walking]

srai.u:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      srai.u: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      abstract_comb:
        <<: [*rs1val_walking, *ifmt_immval_walking_len]


# instructions overlapping with those in the B extension in RV32/RV64 configuration (Zbpbo)
# bitrev:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       bitrev: 0
#     rs1:
#       <<: *all_regs
#     rs2:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *rfmt_op_comb
#     val_comb:
#       <<: [*base_rs1val_sgn, *base_rs2val_sgn, *rfmt_val_comb_sgn]
#       abstract_comb:
#         <<: [*rs1val_walking, *rs2val_walking]
# 
# 
# bitrevi:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       bitrevi: 0
#     rs1:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *ifmt_op_comb
#     val_comb:
#       abstract_comb:
#         <<: [*rs1val_walking, *ifmt_immval_walking_len]

# instructions overlapping with those in the B extension in RV32/RV64 configuration (Zbpbo)
# wext:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       wext: 0
#     rs1:
#       <<: *pair_regs
#     rs2:
#       <<: *all_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *rfmt_op_comb
#     val_comb:
#       <<: [*rvp64_rs1val_sgn]
#       abstract_comb:
#         'simd_base_val("rs2", xlen, 8, signed=False)': 0
# 
# wexti:
#     config:
#       - check ISA:=regex(.*I.*P.*Zicsr.*)
#     mnemonics:
#       wexti: 0
#     rs1:
#       <<: *pair_regs
#     rd:
#       <<: *all_regs
#     op_comb:
#       <<: *ifmt_op_comb
#     val_comb:
#       <<: [*rvp64_rs1val_sgn]
#       abstract_comb:
#         'simd_imm_val("imm_val", 5)': 0

insb:
    config:
      - check ISA:=regex(.*I.*P.*Zicsr.*)
    mnemonics:
      insb: 0
    rs1:
      <<: *all_regs
    rd:
      <<: *all_regs
    op_comb:
      <<: *ifmt_op_comb
    val_comb:
      <<: [*base_rs1val_sgn]
      abstract_comb:
        'simd_imm_val("imm_val", ceil(log(xlen,2))-3)': 0
