# For Licence details look at https://gitlab.com/incoresemi/riscv-compliance/riscv_ctg/-/blob/master/LICENSE.incore

fcvt.wu.s_b1:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b1(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b22:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b22(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b23:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b23(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b24:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b24(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b27:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b27(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b28:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b28(flen,32, "fcvt.wu.s", 1)': 0
        
fcvt.wu.s_b29:
    config: 
      - check ISA:=regex(.*I.*F.*)
    mnemonics: 
      fcvt.wu.s: 0
    rs1: 
      <<: *all_fregs
    rd: 
      <<: *all_regs
    val_comb:
      abstract_comb:
        'ibm_b29(flen,32, "fcvt.wu.s", 1)': 0
