///////////////////////////////////////////
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry
// Created 2022-06-17 22:58:09.919138//
// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
//
// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, 
// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software 
// is furnished to do so, subject to the following conditions:
//
// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
//
// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 
// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 
// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT 
// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
///////////////////////////////////////////

#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV64I")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

RVTEST_SIGBASE( x6, wally_signature)

RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",xor)

# Testcase 0:  rs1:x27(0x0000000000000000), rs2:x22(0x0000000000000000), result rd:x17(0x0000000000000000)
li x27, MASK_XLEN(0x0000000000000000)
li x22, MASK_XLEN(0x0000000000000000)
XOR x17, x27, x22
sd x17, 0(x6)

# Testcase 1:  rs1:x20(0x0000000000000000), rs2:x4(0x0000000000000001), result rd:x7(0x0000000000000001)
li x20, MASK_XLEN(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
XOR x7, x20, x4
sd x7, 8(x6)

# Testcase 2:  rs1:x4(0x0000000000000000), rs2:x20(0xffffffffffffffff), result rd:x21(0xffffffffffffffff)
li x4, MASK_XLEN(0x0000000000000000)
li x20, MASK_XLEN(0xffffffffffffffff)
XOR x21, x4, x20
sd x21, 16(x6)

# Testcase 3:  rs1:x7(0x0000000000000001), rs2:x28(0x0000000000000000), result rd:x10(0x0000000000000001)
li x7, MASK_XLEN(0x0000000000000001)
li x28, MASK_XLEN(0x0000000000000000)
XOR x10, x7, x28
sd x10, 24(x6)

# Testcase 4:  rs1:x4(0x0000000000000001), rs2:x16(0x0000000000000001), result rd:x28(0x0000000000000000)
li x4, MASK_XLEN(0x0000000000000001)
li x16, MASK_XLEN(0x0000000000000001)
XOR x28, x4, x16
sd x28, 32(x6)

# Testcase 5:  rs1:x30(0x0000000000000001), rs2:x13(0xffffffffffffffff), result rd:x21(0xfffffffffffffffe)
li x30, MASK_XLEN(0x0000000000000001)
li x13, MASK_XLEN(0xffffffffffffffff)
XOR x21, x30, x13
sd x21, 40(x6)

# Testcase 6:  rs1:x3(0xffffffffffffffff), rs2:x1(0x0000000000000000), result rd:x9(0xffffffffffffffff)
li x3, MASK_XLEN(0xffffffffffffffff)
li x1, MASK_XLEN(0x0000000000000000)
XOR x9, x3, x1
sd x9, 48(x6)

# Testcase 7:  rs1:x30(0xffffffffffffffff), rs2:x15(0x0000000000000001), result rd:x26(0xfffffffffffffffe)
li x30, MASK_XLEN(0xffffffffffffffff)
li x15, MASK_XLEN(0x0000000000000001)
XOR x26, x30, x15
sd x26, 56(x6)

# Testcase 8:  rs1:x26(0xffffffffffffffff), rs2:x4(0xffffffffffffffff), result rd:x28(0x0000000000000000)
li x26, MASK_XLEN(0xffffffffffffffff)
li x4, MASK_XLEN(0xffffffffffffffff)
XOR x28, x26, x4
sd x28, 64(x6)

# Testcase 9:  rs1:x27(0x2227d96d41a93f90), rs2:x21(0x8557716aa7502a81), result rd:x21(0xa770a807e6f91511)
li x27, MASK_XLEN(0x2227d96d41a93f90)
li x21, MASK_XLEN(0x8557716aa7502a81)
XOR x21, x27, x21
sd x21, 72(x6)

# Testcase 10:  rs1:x9(0x1d77ce4058d87776), rs2:x28(0x27896389df3277fd), result rd:x1(0x3afeadc987ea008b)
li x9, MASK_XLEN(0x1d77ce4058d87776)
li x28, MASK_XLEN(0x27896389df3277fd)
XOR x1, x9, x28
sd x1, 80(x6)

# Testcase 11:  rs1:x9(0x0a68e88e0ad40415), rs2:x18(0xae55cdff34ab18fd), result rd:x11(0xa43d25713e7f1ce8)
li x9, MASK_XLEN(0x0a68e88e0ad40415)
li x18, MASK_XLEN(0xae55cdff34ab18fd)
XOR x11, x9, x18
sd x11, 88(x6)

.EQU NUMTESTS,12

RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0x98765432
RVTEST_DATA_END

RVMODEL_DATA_BEGIN


wally_signature:
    .fill NUMTESTS*(XLEN/32),4,0xdeadbeef

#ifdef rvtest_mtrap_routine

mtrap_sigptr:
    .fill 64*(XLEN/32),4,0xdeadbeef

#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*(XLEN/32),4,0xdeadbeef

#endif

RVMODEL_DATA_END
// ../wally-riscv-arch-test/riscv-test-suite/rv64i_m/I/src/WALLY-XOR.S
// David_Harris@hmc.edu & Katherine Parry
