
// -----------
// This file was generated by riscv_ctg (https://github.com/riscv-software-src/riscv-ctg)
// version   : 0.10.3
// timestamp : Mon May 22 12:18:53 2023 GMT
// usage     : riscv_ctg \
//                  -- cgf //                  --cgf /home/cm/src/riscv-ctg/zfa/sample_cgfs/dataset.cgf \
//                  --cgf /home/cm/src/riscv-ctg/zfa/sample_cgfs/zfa/fcvtmod.w.d.cgf \
 \
//                  -- xlen 32  \
// -----------
//
// -----------
// Copyright (c) 2020. RISC-V International. All rights reserved.
// SPDX-License-Identifier: BSD-3-Clause
// -----------
//
// This assembly file tests the fcvtmod.w.d instruction of the RISC-V RV32FD_Zicsr_Zfa,RV64FD_Zicsr_Zfa extension for the fcvtmod.w.d_b22 covergroup.
// 
#include "model_test.h"
#include "arch_test.h"
RVTEST_ISA("RV32IFD_Zicsr_Zfa,RV64IFD_Zicsr_Zfa")

.section .text.init
.globl rvtest_entry_point
rvtest_entry_point:
RVMODEL_BOOT
RVTEST_CODE_BEGIN

#ifdef TEST_CASE_1

RVTEST_CASE(0,"//check ISA:=regex(.*I.*D.*Zfa.*);def TEST_CASE_1=True;",fcvtmod.w.d_b22)

RVTEST_FP_ENABLE()
RVTEST_VALBASEUPD(x3,test_dataset_0)
RVTEST_SIGBASE(x1,signature_x1_1)

inst_0:// rs1==f31, rd==x31,fs1 == 0 and fe1 == 0x3fc and fm1 == 0x08577924770d3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0x3fc08577924770d3; valaddr_reg:x3;
val_offset:0*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x3, 0*FLEN/8, x4, x1, x2,FLREG)

inst_1:// rs1==f30, rd==x30,fs1 == 0 and fe1 == 0x3fd and fm1 == 0x93fdc7b89296c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f30; dest:x30; op1val:0x3fd93fdc7b89296c; valaddr_reg:x3;
val_offset:1*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x30, f30, rtz, 0, 0, x3, 1*FLEN/8, x4, x1, x2,FLREG)

inst_2:// rs1==f29, rd==x29,fs1 == 1 and fe1 == 0x3fe and fm1 == 0x766ba34c2da80 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f29; dest:x29; op1val:0xbfe766ba34c2da80; valaddr_reg:x3;
val_offset:2*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x29, f29, rtz, 0, 0, x3, 2*FLEN/8, x4, x1, x2,FLREG)

inst_3:// rs1==f28, rd==x28,fs1 == 0 and fe1 == 0x3ff and fm1 == 0xd2d6b7dc59a3a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f28; dest:x28; op1val:0x3ffd2d6b7dc59a3a; valaddr_reg:x3;
val_offset:3*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x28, f28, rtz, 0, 0, x3, 3*FLEN/8, x4, x1, x2,FLREG)

inst_4:// rs1==f27, rd==x27,fs1 == 0 and fe1 == 0x400 and fm1 == 0xcf84ba749f9c5 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f27; dest:x27; op1val:0x400cf84ba749f9c5; valaddr_reg:x3;
val_offset:4*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x27, f27, rtz, 0, 0, x3, 4*FLEN/8, x4, x1, x2,FLREG)

inst_5:// rs1==f26, rd==x26,fs1 == 0 and fe1 == 0x401 and fm1 == 0x854a908ceac39 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f26; dest:x26; op1val:0x401854a908ceac39; valaddr_reg:x3;
val_offset:5*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x26, f26, rtz, 0, 0, x3, 5*FLEN/8, x4, x1, x2,FLREG)

inst_6:// rs1==f25, rd==x25,fs1 == 0 and fe1 == 0x402 and fm1 == 0x137a953e8eb43 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f25; dest:x25; op1val:0x402137a953e8eb43; valaddr_reg:x3;
val_offset:6*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x25, f25, rtz, 0, 0, x3, 6*FLEN/8, x4, x1, x2,FLREG)

inst_7:// rs1==f24, rd==x24,fs1 == 1 and fe1 == 0x403 and fm1 == 0xf3ebcf3d06f86 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f24; dest:x24; op1val:0xc03f3ebcf3d06f86; valaddr_reg:x3;
val_offset:7*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x24, f24, rtz, 0, 0, x3, 7*FLEN/8, x4, x1, x2,FLREG)

inst_8:// rs1==f23, rd==x23,fs1 == 0 and fe1 == 0x404 and fm1 == 0x5c74eff1e5bef and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f23; dest:x23; op1val:0x4045c74eff1e5bef; valaddr_reg:x3;
val_offset:8*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x23, f23, rtz, 0, 0, x3, 8*FLEN/8, x4, x1, x2,FLREG)

inst_9:// rs1==f22, rd==x22,fs1 == 0 and fe1 == 0x405 and fm1 == 0xdc3386b9f15c4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f22; dest:x22; op1val:0x405dc3386b9f15c4; valaddr_reg:x3;
val_offset:9*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x22, f22, rtz, 0, 0, x3, 9*FLEN/8, x4, x1, x2,FLREG)

inst_10:// rs1==f21, rd==x21,fs1 == 0 and fe1 == 0x406 and fm1 == 0x5ae6a9a6ab329 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f21; dest:x21; op1val:0x4065ae6a9a6ab329; valaddr_reg:x3;
val_offset:10*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x21, f21, rtz, 0, 0, x3, 10*FLEN/8, x4, x1, x2,FLREG)

inst_11:// rs1==f20, rd==x20,fs1 == 1 and fe1 == 0x407 and fm1 == 0x489b36bd7f503 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f20; dest:x20; op1val:0xc07489b36bd7f503; valaddr_reg:x3;
val_offset:11*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x20, f20, rtz, 0, 0, x3, 11*FLEN/8, x4, x1, x2,FLREG)

inst_12:// rs1==f19, rd==x19,fs1 == 0 and fe1 == 0x408 and fm1 == 0x43277acca7f0d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f19; dest:x19; op1val:0x40843277acca7f0d; valaddr_reg:x3;
val_offset:12*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x19, f19, rtz, 0, 0, x3, 12*FLEN/8, x4, x1, x2,FLREG)

inst_13:// rs1==f18, rd==x18,fs1 == 0 and fe1 == 0x409 and fm1 == 0xaf9492cb7362c and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f18; dest:x18; op1val:0x409af9492cb7362c; valaddr_reg:x3;
val_offset:13*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x18, f18, rtz, 0, 0, x3, 13*FLEN/8, x4, x1, x2,FLREG)

inst_14:// rs1==f17, rd==x17,fs1 == 0 and fe1 == 0x40a and fm1 == 0x5cd28a96ec2b3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f17; dest:x17; op1val:0x40a5cd28a96ec2b3; valaddr_reg:x3;
val_offset:14*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x17, f17, rtz, 0, 0, x3, 14*FLEN/8, x4, x1, x2,FLREG)

inst_15:// rs1==f16, rd==x16,fs1 == 1 and fe1 == 0x40b and fm1 == 0xc491074f942cb and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f16; dest:x16; op1val:0xc0bc491074f942cb; valaddr_reg:x3;
val_offset:15*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x16, f16, rtz, 0, 0, x3, 15*FLEN/8, x4, x1, x2,FLREG)

inst_16:// rs1==f15, rd==x15,fs1 == 1 and fe1 == 0x40c and fm1 == 0x3d480fb7f6f5d and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f15; dest:x15; op1val:0xc0c3d480fb7f6f5d; valaddr_reg:x3;
val_offset:16*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x15, f15, rtz, 0, 0, x3, 16*FLEN/8, x4, x1, x2,FLREG)

inst_17:// rs1==f14, rd==x14,fs1 == 0 and fe1 == 0x40d and fm1 == 0x9d02f708cc1b6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f14; dest:x14; op1val:0x40d9d02f708cc1b6; valaddr_reg:x3;
val_offset:17*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x14, f14, rtz, 0, 0, x3, 17*FLEN/8, x4, x1, x2,FLREG)

inst_18:// rs1==f13, rd==x13,fs1 == 0 and fe1 == 0x40e and fm1 == 0x953b00b54aa22 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f13; dest:x13; op1val:0x40e953b00b54aa22; valaddr_reg:x3;
val_offset:18*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x13, f13, rtz, 0, 0, x3, 18*FLEN/8, x4, x1, x2,FLREG)

inst_19:// rs1==f12, rd==x12,fs1 == 0 and fe1 == 0x40f and fm1 == 0x224c03c53d0e3 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f12; dest:x12; op1val:0x40f224c03c53d0e3; valaddr_reg:x3;
val_offset:19*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x12, f12, rtz, 0, 0, x3, 19*FLEN/8, x4, x1, x2,FLREG)

inst_20:// rs1==f11, rd==x11,fs1 == 0 and fe1 == 0x410 and fm1 == 0xe8dacf0e58650 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f11; dest:x11; op1val:0x410e8dacf0e58650; valaddr_reg:x3;
val_offset:20*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x11, f11, rtz, 0, 0, x3, 20*FLEN/8, x4, x1, x2,FLREG)

inst_21:// rs1==f10, rd==x10,fs1 == 1 and fe1 == 0x411 and fm1 == 0x5dbbb894deab4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f10; dest:x10; op1val:0xc115dbbb894deab4; valaddr_reg:x3;
val_offset:21*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x10, f10, rtz, 0, 0, x3, 21*FLEN/8, x4, x1, x2,FLREG)

inst_22:// rs1==f9, rd==x9,fs1 == 0 and fe1 == 0x412 and fm1 == 0x3d7c9e5f0307e and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f9; dest:x9; op1val:0x4123d7c9e5f0307e; valaddr_reg:x3;
val_offset:22*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x9, f9, rtz, 0, 0, x3, 22*FLEN/8, x4, x1, x2,FLREG)

inst_23:// rs1==f8, rd==x8,fs1 == 0 and fe1 == 0x413 and fm1 == 0x8c8a1aaac3142 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f8; dest:x8; op1val:0x4138c8a1aaac3142; valaddr_reg:x3;
val_offset:23*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x8, f8, rtz, 0, 0, x3, 23*FLEN/8, x4, x1, x2,FLREG)
RVTEST_VALBASEUPD(x8,test_dataset_1)

inst_24:// rs1==f7, rd==x7,fs1 == 0 and fe1 == 0x414 and fm1 == 0x785036f9fb997 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f7; dest:x7; op1val:0x414785036f9fb997; valaddr_reg:x8;
val_offset:0*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x7, f7, rtz, 0, 0, x8, 0*FLEN/8, x9, x1, x2,FLREG)

inst_25:// rs1==f6, rd==x6,fs1 == 0 and fe1 == 0x415 and fm1 == 0x95a4da7298c66 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f6; dest:x6; op1val:0x41595a4da7298c66; valaddr_reg:x8;
val_offset:1*FLEN/8; rmval:rtz; correctval:??; testreg:x2;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x6, f6, rtz, 0, 0, x8, 1*FLEN/8, x9, x1, x2,FLREG)

inst_26:// rs1==f5, rd==x5,fs1 == 0 and fe1 == 0x416 and fm1 == 0x807dad814d575 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f5; dest:x5; op1val:0x416807dad814d575; valaddr_reg:x8;
val_offset:2*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x5, f5, rtz, 0, 0, x8, 2*FLEN/8, x9, x1, x6,FLREG)
RVTEST_SIGBASE(x5,signature_x5_0)

inst_27:// rs1==f4, rd==x4,fs1 == 1 and fe1 == 0x417 and fm1 == 0x396bad798c9cf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f4; dest:x4; op1val:0xc17396bad798c9cf; valaddr_reg:x8;
val_offset:3*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x4, f4, rtz, 0, 0, x8, 3*FLEN/8, x9, x5, x6,FLREG)

inst_28:// rs1==f3, rd==x3,fs1 == 0 and fe1 == 0x418 and fm1 == 0x3d06169b1dcbf and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f3; dest:x3; op1val:0x4183d06169b1dcbf; valaddr_reg:x8;
val_offset:4*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x3, f3, rtz, 0, 0, x8, 4*FLEN/8, x9, x5, x6,FLREG)

inst_29:// rs1==f2, rd==x2,fs1 == 0 and fe1 == 0x419 and fm1 == 0x7f21608208d09 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f2; dest:x2; op1val:0x4197f21608208d09; valaddr_reg:x8;
val_offset:5*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x2, f2, rtz, 0, 0, x8, 5*FLEN/8, x9, x5, x6,FLREG)

inst_30:// rs1==f1, rd==x1,fs1 == 1 and fe1 == 0x41a and fm1 == 0x9b4f3d167533a and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f1; dest:x1; op1val:0xc1a9b4f3d167533a; valaddr_reg:x8;
val_offset:6*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x1, f1, rtz, 0, 0, x8, 6*FLEN/8, x9, x5, x6,FLREG)

inst_31:// rs1==f0, rd==x0,fs1 == 1 and fe1 == 0x41b and fm1 == 0x889261270dee2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f0; dest:x0; op1val:0xc1b889261270dee2; valaddr_reg:x8;
val_offset:7*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x0, f0, rtz, 0, 0, x8, 7*FLEN/8, x9, x5, x6,FLREG)

inst_32:// fs1 == 0 and fe1 == 0x41c and fm1 == 0x14b91dae98554 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0x41c14b91dae98554; valaddr_reg:x8;
val_offset:8*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 8*FLEN/8, x9, x5, x6,FLREG)

inst_33:// fs1 == 1 and fe1 == 0x41d and fm1 == 0x9136562694646 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0xc1d9136562694646; valaddr_reg:x8;
val_offset:9*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 9*FLEN/8, x9, x5, x6,FLREG)

inst_34:// fs1 == 1 and fe1 == 0x41e and fm1 == 0xe9b7e5fc9eba4 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0xc1ee9b7e5fc9eba4; valaddr_reg:x8;
val_offset:10*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 10*FLEN/8, x9, x5, x6,FLREG)

inst_35:// fs1 == 1 and fe1 == 0x41f and fm1 == 0x1ce80265039f6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0xc1f1ce80265039f6; valaddr_reg:x8;
val_offset:11*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 11*FLEN/8, x9, x5, x6,FLREG)

inst_36:// fs1 == 0 and fe1 == 0x420 and fm1 == 0xc5ec6c6880007 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0x420c5ec6c6880007; valaddr_reg:x8;
val_offset:12*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 12*FLEN/8, x9, x5, x6,FLREG)

inst_37:// fs1 == 1 and fe1 == 0x421 and fm1 == 0x2a96d71097999 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0xc212a96d71097999; valaddr_reg:x8;
val_offset:13*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 13*FLEN/8, x9, x5, x6,FLREG)

inst_38:// fs1 == 0 and fe1 == 0x3ca and fm1 == 0x30e08ceb506f6 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0x3ca30e08ceb506f6; valaddr_reg:x8;
val_offset:14*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 14*FLEN/8, x9, x5, x6,FLREG)

inst_39:// fs1 == 0 and fe1 == 0x5ca and fm1 == 0xf871c6ee84270 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0x5caf871c6ee84270; valaddr_reg:x8;
val_offset:15*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 15*FLEN/8, x9, x5, x6,FLREG)

inst_40:// fs1 == 1 and fe1 == 0x41b and fm1 == 0x889261270dee2 and  fcsr == 0x0 and rm_val == 7   
/* opcode: fcvtmod.w.d ; op1:f31; dest:x31; op1val:0xc1b889261270dee2; valaddr_reg:x8;
val_offset:16*FLEN/8; rmval:rtz; correctval:??; testreg:x6;
fcsr_val:0*/
TEST_FPID_OP(fcvtmod.w.d, x31, f31, rtz, 0, 0, x8, 16*FLEN/8, x9, x5, x6,FLREG)
#endif


RVTEST_CODE_END
RVMODEL_HALT

RVTEST_DATA_BEGIN
.align 4
rvtest_data:
.word 0xbabecafe
.word 0xabecafeb
.word 0xbecafeba
.word 0xecafebab
test_dataset_0:
NAN_BOXED(4593818368519663827,64,FLEN)
NAN_BOXED(4600778710533613932,64,FLEN)
NAN_BOXED(13828134130799532672,64,FLEN)
NAN_BOXED(4610891533192108602,64,FLEN)
NAN_BOXED(4615336721960794565,64,FLEN)
NAN_BOXED(4618534502842412089,64,FLEN)
NAN_BOXED(4621035893055613763,64,FLEN)
NAN_BOXED(13852859960080232326,64,FLEN)
NAN_BOXED(4631326933921979375,64,FLEN)
NAN_BOXED(4638077838352651716,64,FLEN)
NAN_BOXED(4640306763955614505,64,FLEN)
NAN_BOXED(13867860556282066179,64,FLEN)
NAN_BOXED(4648896204934643469,64,FLEN)
NAN_BOXED(4655307257518962220,64,FLEN)
NAN_BOXED(4658354964109640371,64,FLEN)
NAN_BOXED(13888055685934564043,64,FLEN)
NAN_BOXED(13890179326181076829,64,FLEN)
NAN_BOXED(4672994990543913398,64,FLEN)
NAN_BOXED(4677361703570418210,64,FLEN)
NAN_BOXED(4679843370855813347,64,FLEN)
NAN_BOXED(4687840036054730320,64,FLEN)
NAN_BOXED(13913268222339967668,64,FLEN)
NAN_BOXED(4693832498796310654,64,FLEN)
NAN_BOXED(4699726807839813954,64,FLEN)
test_dataset_1:
NAN_BOXED(4703874585615907223,64,FLEN)
NAN_BOXED(4708894174956063846,64,FLEN)
NAN_BOXED(4713025646552733045,64,FLEN)
NAN_BOXED(13939651000867015119,64,FLEN)
NAN_BOXED(4720845951218080959,64,FLEN)
NAN_BOXED(4726512510388178185,64,FLEN)
NAN_BOXED(13954883879667454778,64,FLEN)
NAN_BOXED(13959057841646001890,64,FLEN)
NAN_BOXED(4738151372785550676,64,FLEN)
NAN_BOXED(13968217045429995078,64,FLEN)
NAN_BOXED(13974277660852480932,64,FLEN)
NAN_BOXED(13975178168501287414,64,FLEN)
NAN_BOXED(4759283114051108871,64,FLEN)
NAN_BOXED(13984426080451787161,64,FLEN)
NAN_BOXED(4369351494470010614,64,FLEN)
NAN_BOXED(6678705328603284080,64,FLEN)
NAN_BOXED(13959057841646001890,64,FLEN)
RVTEST_DATA_END

RVMODEL_DATA_BEGIN
rvtest_sig_begin:
sig_begin_canary:
CANARY;



signature_x1_0:
    .fill 0*((SIGALIGN)/4),4,0xdeadbeef


signature_x1_1:
    .fill 54*((SIGALIGN)/4),4,0xdeadbeef


signature_x5_0:
    .fill 28*((SIGALIGN)/4),4,0xdeadbeef

#ifdef rvtest_mtrap_routine
tsig_begin_canary:
CANARY;

mtrap_sigptr:
    .fill 64*XLEN/32,4,0xdeadbeef

tsig_end_canary:
CANARY;
#endif

#ifdef rvtest_gpr_save

gpr_save:
    .fill 32*XLEN/32,4,0xdeadbeef

#endif


sig_end_canary:
CANARY;
rvtest_sig_end:
RVMODEL_DATA_END
