diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile
index 8efd9f6d1..b200a22de 100644
--- a/fpga/generator/Makefile
+++ b/fpga/generator/Makefile
@@ -1,5 +1,5 @@
 dst := IP
-sdc_src := ~/repos/sdc.tar.gz
+sdc_src := ../../../sdc.tar.gz
 # vcu118
 #export XILINX_PART := xcvu9p-flga2104-2L-e
 #export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
@@ -22,7 +22,8 @@ IP: $(dst)/xlnx_proc_sys_reset.log \
 	$(dst)/xlnx_ahblite_axi_bridge.log \
 	$(dst)/xlnx_axi_crossbar.log \
 	$(dst)/xlnx_axi_dwidth_conv_32to64.log \
-	$(dst)/xlnx_axi_dwidth_conv_64to32.log
+	$(dst)/xlnx_axi_dwidth_conv_64to32.log \
+	$(dst)/xlnx_axi_prtcl_conv.log
 
 SDC:
 	cp $(sdc_src) ../src/
diff --git a/fpga/generator/wally.tcl b/fpga/generator/wally.tcl
index e0de591b7..55f65b31b 100644
--- a/fpga/generator/wally.tcl
+++ b/fpga/generator/wally.tcl
@@ -18,6 +18,7 @@ read_ip IP/xlnx_ddr4.srcs/sources_1/ip/xlnx_ddr4/xlnx_ddr4.xci
 read_ip IP/xlnx_axi_crossbar.srcs/sources_1/ip/xlnx_axi_crossbar/xlnx_axi_crossbar.xci
 read_ip IP/xlnx_axi_dwidth_conv_32to64.srcs/sources_1/ip/xlnx_axi_dwidth_conv_32to64/xlnx_axi_dwidth_conv_32to64.xci
 read_ip IP/xlnx_axi_dwidth_conv_64to32.srcs/sources_1/ip/xlnx_axi_dwidth_conv_64to32/xlnx_axi_dwidth_conv_64to32.xci
+read_ip IP/xlnx_axi_prtcl_conv.srcs/sources_1/ip/xlnx_axi_prtcl_conv/xlnx_axi_prtcl_conv.xci
 
 # read_verilog -sv [glob -type f ../../pipelined/src/*/*.sv ../../pipelined/src/*/*/*.sv]
 read_verilog -sv [glob -type f ../src/CopiedFiles_do_not_add_to_repo/*/*.sv ../src/CopiedFiles_do_not_add_to_repo/*/*/*.sv]
diff --git a/fpga/generator/xlnx_axi_prtcl_conv.tcl b/fpga/generator/xlnx_axi_prtcl_conv.tcl
new file mode 100644
index 000000000..76b6fc6cd
--- /dev/null
+++ b/fpga/generator/xlnx_axi_prtcl_conv.tcl
@@ -0,0 +1,23 @@
+set partNumber $::env(XILINX_PART)
+set boardName $::env(XILINX_BOARD)
+
+# vcu118 board
+#set partNumber xcvu9p-flga2104-2L-e
+#set boardName  xilinx.com:vcu118:part0:2.4
+
+# kcu105 board
+#set partNumber  xcku040-ffva1156-2-e
+#set boardName  xilinx.com:kcu105:part0:1.7
+
+set ipName xlnx_axi_prtcl_conv
+
+create_project $ipName . -force -part $partNumber
+set_property board_part $boardName [current_project]
+
+create_ip -name axi_protocol_converter -vendor xilinx.com -library ip -version 2.1 -module_name $ipName
+
+generate_target {instantiation_template} [get_files ./$ipName.srcs/sources_1/ip/$ipName/$ipName.xci]
+generate_target all [get_files  ./$ipName.srcs/sources_1/ip/$ipName/$ipName.xci]
+create_ip_run [get_files -of_objects [get_fileset sources_1] ./$ipName.srcs/sources_1/ip/$ipName/$ipName.xci]
+launch_run -jobs 8 ${ipName}_synth_1
+wait_on_run ${ipName}_synth_1