From 09ea6e648543cfc3ef9961b00d9250cb4228be01 Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Wed, 20 Dec 2023 16:29:31 -0800
Subject: [PATCH] Set B in MISA for rv32gc and rv64gc

---
 config/rv32gc/config.vh | 2 +-
 config/rv64gc/config.vh | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/config/rv32gc/config.vh b/config/rv32gc/config.vh
index a5af5f608..9d5536935 100644
--- a/config/rv32gc/config.vh
+++ b/config/rv32gc/config.vh
@@ -35,7 +35,7 @@ localparam XLEN = 32'd32;
 // IEEE 754 compliance
 localparam IEEE754 = 0;
 
-localparam MISA = (32'h00000104 | 1 << 20 | 1 << 18 | 1 << 12 | 1 << 0 | 1 <<3 | 1 << 5);
+localparam MISA = (32'h00000104 | 1 << 1 | 1 << 20 | 1 << 18 | 1 << 12 | 1 << 0 | 1 <<3 | 1 << 5);
 localparam ZICSR_SUPPORTED = 1;
 localparam ZIFENCEI_SUPPORTED = 1;
 localparam COUNTERS = 12'd32;
diff --git a/config/rv64gc/config.vh b/config/rv64gc/config.vh
index 0597f4b76..552df6998 100644
--- a/config/rv64gc/config.vh
+++ b/config/rv64gc/config.vh
@@ -34,7 +34,7 @@ localparam XLEN = 32'd64;
 localparam IEEE754 = 0;
 
 // MISA RISC-V configuration per specification
-localparam MISA = (32'h00000104 | 1 << 5 | 1 << 3 | 1 << 18 | 1 << 20 | 1 << 12 | 1 << 0);
+localparam MISA = (32'h00000104 | 1 << 1 | 1 << 5 | 1 << 3 | 1 << 18 | 1 << 20 | 1 << 12 | 1 << 0);
 localparam ZICSR_SUPPORTED = 1;
 localparam ZIFENCEI_SUPPORTED = 1;
 localparam COUNTERS = 12'd32;