From 58bfc27c63135011f2b25a3767ce625b18f853fb Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 29 Nov 2024 11:20:12 -0800 Subject: [PATCH 1/2] Fixed decoder for illegal 0b1e0c33 issue #1152 --- src/ieu/bmu/bmuctrl.sv | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/src/ieu/bmu/bmuctrl.sv b/src/ieu/bmu/bmuctrl.sv index a551179e9..fe781e78b 100644 --- a/src/ieu/bmu/bmuctrl.sv +++ b/src/ieu/bmu/bmuctrl.sv @@ -119,13 +119,11 @@ module bmuctrl import cvw::*; #(parameter cvw_t P) ( if (P.ZBC_SUPPORTED) casez({OpD, Funct7D, Funct3D}) 17'b0110011_0000101_010: BMUControlsD = `BMUCTRLW'b000_0011_0001_1_0_0_0_1_0_0_0_0_0; // clmulr - 17'b0110011_0000101_0??: BMUControlsD = `BMUCTRLW'b000_0011_0000_1_0_0_0_1_0_0_0_0_0; // clmul/clmulh + 17'b0110011_0000101_0?1: BMUControlsD = `BMUCTRLW'b000_0011_0000_1_0_0_0_1_0_0_0_0_0; // clmul/clmulh endcase if (P.ZBKC_SUPPORTED) begin casez({OpD, Funct7D, Funct3D}) - 17'b0110011_0000101_0??: BMUControlsD = `BMUCTRLW'b000_0011_0000_1_0_0_0_1_0_0_0_0_0; // clmul/clmulh - // 17'b0110011_0000101_001: BMUControlsD = `BMUCTRLW'b000_0011_0000_1_0_0_0_1_0_0_0_0_0; // clmul - // 17'b0110011_0000101_011: BMUControlsD = `BMUCTRLW'b000_0011_0001_1_0_0_0_1_0_0_0_0_0; // clmulh + 17'b0110011_0000101_0?1: BMUControlsD = `BMUCTRLW'b000_0011_0000_1_0_0_0_1_0_0_0_0_0; // clmul/clmulh endcase end From 155d1d511b56632c21e3b22fd849b8cd34aa2467 Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 29 Nov 2024 11:39:24 -0800 Subject: [PATCH 2/2] Fixed funct7 code for sinval.vma (issue #1154) --- src/privileged/privdec.sv | 2 +- testbench/common/instrNameDecTB.sv | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/src/privileged/privdec.sv b/src/privileged/privdec.sv index 6321413d4..99380e63f 100644 --- a/src/privileged/privdec.sv +++ b/src/privileged/privdec.sv @@ -59,7 +59,7 @@ module privdec import cvw::*; #(parameter cvw_t P) ( // svinval instructions // any svinval instruction is treated as sfence.vma on Wally - assign sinvalvmaM = (InstrM[31:25] == 7'b0001001); + assign sinvalvmaM = (InstrM[31:25] == 7'b0001011); assign sfencewinvalM = (InstrM[31:20] == 12'b000110000000) & rs1zeroM; assign sfenceinvalirM = (InstrM[31:20] == 12'b000110000001) & rs1zeroM; assign invalM = P.SVINVAL_SUPPORTED & (sinvalvmaM | sfencewinvalM | sfenceinvalirM); diff --git a/testbench/common/instrNameDecTB.sv b/testbench/common/instrNameDecTB.sv index 80f6ed607..ae970513f 100644 --- a/testbench/common/instrNameDecTB.sv +++ b/testbench/common/instrNameDecTB.sv @@ -219,6 +219,10 @@ module instrNameDecTB( else if (imm == 258) name = "SRET"; else if (imm == 770) name = "MRET"; else if (funct7 == 9) name = "SFENCE.VMA"; + else if (funct7 == 11) name = "SINVAL.VMA"; + else if (funct7 == 12 & rs2 == 0) name = "SFENCE.W.INVAL"; + else if (funct7 == 12 & rs2 == 1) name = "SFENCE.INVAL.IR"; + else if (imm == 259) name = "WFI"; else if (imm == 261) name = "WFI"; else name = "ILLEGAL"; 10'b1110011_001: name = "CSRRW";