From 1d4c543f71bfd5af2ff8a511a4cbf2fe4299cad5 Mon Sep 17 00:00:00 2001
From: Daniel Torres <dtowersm@gmail.com>
Date: Fri, 17 Jun 2022 20:53:15 -0700
Subject: [PATCH] arch tests now run on spike and sail and compare signatures
 during build

---
 pipelined/testbench/testbench.sv           |   10 +-
 pipelined/testbench/tests.vh               | 1036 ++++++++++----------
 tests/riscof/Makefile                      |    7 +-
 tests/riscof/sail_cSim/riscof_sail_cSim.py |    6 +-
 4 files changed, 530 insertions(+), 529 deletions(-)

diff --git a/pipelined/testbench/testbench.sv b/pipelined/testbench/testbench.sv
index 95112fec8..e442d27ad 100644
--- a/pipelined/testbench/testbench.sv
+++ b/pipelined/testbench/testbench.sv
@@ -197,8 +197,7 @@ logic [3:0] dummy;
       ProgramLabelMapFile = {pathname, tests[test], ".elf.objdump.lab"};
       // declare memory labels that interest us, the updateProgramAddrLabelArray task will find the addr of each label and fill the array
       // to expand, add more elements to this array and initialize them to zero (also initilaize them to zero at the start of the next test)
-      ProgramAddrLabelArray = '{ "begin_signature" : 0, 
-	            	                 "tohost" : 0 };
+      ProgramAddrLabelArray = '{ "begin_signature" : 0, "tohost" : 0 };
       updateProgramAddrLabelArray(ProgramAddrMapFile, ProgramLabelMapFile, ProgramAddrLabelArray);
       $display("Read memfile %s", memfilename);
       reset_ext = 1; # 42; reset_ext = 0;
@@ -251,8 +250,10 @@ logic [3:0] dummy;
           for(i=0; i<SIGNATURESIZE; i=i+1) begin
             sig32[i] = 'bx;
           end
+          // riscof tests have a different signature, tests[0] == "1" refers to RISCVARCHTESTs
+          if (tests[0] == "1") signame = {pathname, tests[test], "erence-sail_c_simulator.signature"};
+          else signame = {pathname, tests[test], ".signature.output"};
           // read signature, reformat in 64 bits if necessary
-          signame = {pathname, tests[test], ".signature.output"};
           $readmemh(signame, sig32);
           i = 0;
           while (i < SIGNATURESIZE) begin
@@ -324,8 +325,7 @@ logic [3:0] dummy;
 
             ProgramAddrMapFile = {pathname, tests[test], ".elf.objdump.addr"};
             ProgramLabelMapFile = {pathname, tests[test], ".elf.objdump.lab"};
-            ProgramAddrLabelArray = '{ "begin_signature" : 0, 
-	            	                       "tohost" : 0 };
+            ProgramAddrLabelArray = '{ "begin_signature" : 0, "tohost" : 0 };
             updateProgramAddrLabelArray(ProgramAddrMapFile, ProgramLabelMapFile, ProgramAddrLabelArray);
             $display("Read memfile %s", memfilename);
             reset_ext = 1; # 47; reset_ext = 0;
diff --git a/pipelined/testbench/tests.vh b/pipelined/testbench/tests.vh
index 8087b80fb..72128e097 100644
--- a/pipelined/testbench/tests.vh
+++ b/pipelined/testbench/tests.vh
@@ -900,570 +900,570 @@ string imperas32f[] = '{
 
   string arch64priv[] = '{
     `RISCVARCHTEST,
-    "rv64i_m/privilege/src/ebreak.S/ref/ref",
-    "rv64i_m/privilege/src/ecall.S/ref/ref",
-    "rv64i_m/privilege/src/misalign1-jalr-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign2-jalr-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-beq-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-bge-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-bgeu-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-blt-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-bltu-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-bne-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-jal-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-ld-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-lh-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-lhu-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-lw-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-lwu-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-sd-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-sh-01.S/ref/ref",
-    "rv64i_m/privilege/src/misalign-sw-01.S/ref/ref"
+    "rv64i_m/privilege/src/ebreak.S/ref/Ref",
+    "rv64i_m/privilege/src/ecall.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign1-jalr-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign2-jalr-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-beq-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-bge-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-bgeu-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-blt-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-bltu-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-bne-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-jal-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-ld-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-lh-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-lhu-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-lw-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-lwu-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-sd-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-sh-01.S/ref/Ref",
+    "rv64i_m/privilege/src/misalign-sw-01.S/ref/Ref"
     };
 
   string arch64m[] = '{
     `RISCVARCHTEST,
-    "rv64i_m/M/src/div-01.S/ref/ref",
-    "rv64i_m/M/src/divu-01.S/ref/ref",
-    "rv64i_m/M/src/divuw-01.S/ref/ref",
-    "rv64i_m/M/src/divw-01.S/ref/ref",
-    "rv64i_m/M/src/mul-01.S/ref/ref",
-    "rv64i_m/M/src/mulh-01.S/ref/ref",
-    "rv64i_m/M/src/mulhsu-01.S/ref/ref",
-    "rv64i_m/M/src/mulhu-01.S/ref/ref",
-    "rv64i_m/M/src/mulw-01.S/ref/ref",
-    "rv64i_m/M/src/rem-01.S/ref/ref",
-    "rv64i_m/M/src/remu-01.S/ref/ref",
-    "rv64i_m/M/src/remuw-01.S/ref/ref",
-    "rv64i_m/M/src/remw-01.S/ref/ref"
+    "rv64i_m/M/src/div-01.S/ref/Ref",
+    "rv64i_m/M/src/divu-01.S/ref/Ref",
+    "rv64i_m/M/src/divuw-01.S/ref/Ref",
+    "rv64i_m/M/src/divw-01.S/ref/Ref",
+    "rv64i_m/M/src/mul-01.S/ref/Ref",
+    "rv64i_m/M/src/mulh-01.S/ref/Ref",
+    "rv64i_m/M/src/mulhsu-01.S/ref/Ref",
+    "rv64i_m/M/src/mulhu-01.S/ref/Ref",
+    "rv64i_m/M/src/mulw-01.S/ref/Ref",
+    "rv64i_m/M/src/rem-01.S/ref/Ref",
+    "rv64i_m/M/src/remu-01.S/ref/Ref",
+    "rv64i_m/M/src/remuw-01.S/ref/Ref",
+    "rv64i_m/M/src/remw-01.S/ref/Ref"
    };
 
   string arch64c[] = '{
     `RISCVARCHTEST,
-    "rv64i_m/C/src/cadd-01.S/ref/ref",
-    "rv64i_m/C/src/caddi-01.S/ref/ref",
-    "rv64i_m/C/src/caddi16sp-01.S/ref/ref",
-    "rv64i_m/C/src/caddi4spn-01.S/ref/ref",
-    "rv64i_m/C/src/caddiw-01.S/ref/ref",
-    "rv64i_m/C/src/caddw-01.S/ref/ref",
-    "rv64i_m/C/src/cand-01.S/ref/ref",
-    "rv64i_m/C/src/candi-01.S/ref/ref",
-    "rv64i_m/C/src/cbeqz-01.S/ref/ref",
-    "rv64i_m/C/src/cbnez-01.S/ref/ref",
-    "rv64i_m/C/src/cj-01.S/ref/ref",
-    "rv64i_m/C/src/cjalr-01.S/ref/ref",
-    "rv64i_m/C/src/cjr-01.S/ref/ref",
-    "rv64i_m/C/src/cld-01.S/ref/ref",
-    "rv64i_m/C/src/cldsp-01.S/ref/ref",
-    "rv64i_m/C/src/cli-01.S/ref/ref",
-    "rv64i_m/C/src/clui-01.S/ref/ref",
-    "rv64i_m/C/src/clw-01.S/ref/ref",
-    "rv64i_m/C/src/clwsp-01.S/ref/ref",
-    "rv64i_m/C/src/cmv-01.S/ref/ref",
-    "rv64i_m/C/src/cnop-01.S/ref/ref",
-    "rv64i_m/C/src/cor-01.S/ref/ref",
-    "rv64i_m/C/src/csd-01.S/ref/ref",
-    "rv64i_m/C/src/csdsp-01.S/ref/ref",
-    "rv64i_m/C/src/cslli-01.S/ref/ref",
-    "rv64i_m/C/src/csrai-01.S/ref/ref",
-    "rv64i_m/C/src/csrli-01.S/ref/ref",
-    "rv64i_m/C/src/csub-01.S/ref/ref",
-    "rv64i_m/C/src/csubw-01.S/ref/ref",
-    "rv64i_m/C/src/csw-01.S/ref/ref",
-    "rv64i_m/C/src/cswsp-01.S/ref/ref",
-    "rv64i_m/C/src/cxor-01.S/ref/ref"
+    "rv64i_m/C/src/cadd-01.S/ref/Ref",
+    "rv64i_m/C/src/caddi-01.S/ref/Ref",
+    "rv64i_m/C/src/caddi16sp-01.S/ref/Ref",
+    "rv64i_m/C/src/caddi4spn-01.S/ref/Ref",
+    "rv64i_m/C/src/caddiw-01.S/ref/Ref",
+    "rv64i_m/C/src/caddw-01.S/ref/Ref",
+    "rv64i_m/C/src/cand-01.S/ref/Ref",
+    "rv64i_m/C/src/candi-01.S/ref/Ref",
+    "rv64i_m/C/src/cbeqz-01.S/ref/Ref",
+    "rv64i_m/C/src/cbnez-01.S/ref/Ref",
+    "rv64i_m/C/src/cj-01.S/ref/Ref",
+    "rv64i_m/C/src/cjalr-01.S/ref/Ref",
+    "rv64i_m/C/src/cjr-01.S/ref/Ref",
+    "rv64i_m/C/src/cld-01.S/ref/Ref",
+    "rv64i_m/C/src/cldsp-01.S/ref/Ref",
+    "rv64i_m/C/src/cli-01.S/ref/Ref",
+    "rv64i_m/C/src/clui-01.S/ref/Ref",
+    "rv64i_m/C/src/clw-01.S/ref/Ref",
+    "rv64i_m/C/src/clwsp-01.S/ref/Ref",
+    "rv64i_m/C/src/cmv-01.S/ref/Ref",
+    "rv64i_m/C/src/cnop-01.S/ref/Ref",
+    "rv64i_m/C/src/cor-01.S/ref/Ref",
+    "rv64i_m/C/src/csd-01.S/ref/Ref",
+    "rv64i_m/C/src/csdsp-01.S/ref/Ref",
+    "rv64i_m/C/src/cslli-01.S/ref/Ref",
+    "rv64i_m/C/src/csrai-01.S/ref/Ref",
+    "rv64i_m/C/src/csrli-01.S/ref/Ref",
+    "rv64i_m/C/src/csub-01.S/ref/Ref",
+    "rv64i_m/C/src/csubw-01.S/ref/Ref",
+    "rv64i_m/C/src/csw-01.S/ref/Ref",
+    "rv64i_m/C/src/cswsp-01.S/ref/Ref",
+    "rv64i_m/C/src/cxor-01.S/ref/Ref"
   };
 
   string arch64cpriv[] = '{
 //    `RISCVARCHTEST,
-    "rv64i_m/C/src/cebreak-01.S/ref/ref"
+    "rv64i_m/C/src/cebreak-01.S/ref/Ref"
   };
 
   string arch64i[] = '{
     `RISCVARCHTEST,
-    "rv64i_m/I/src/add-01.S/ref/ref",
-    "rv64i_m/I/src/addi-01.S/ref/ref",
-    "rv64i_m/I/src/addiw-01.S/ref/ref",
-    "rv64i_m/I/src/addw-01.S/ref/ref",
-    "rv64i_m/I/src/and-01.S/ref/ref",
-    "rv64i_m/I/src/andi-01.S/ref/ref",
-    "rv64i_m/I/src/auipc-01.S/ref/ref",
-    "rv64i_m/I/src/beq-01.S/ref/ref",
-    "rv64i_m/I/src/bge-01.S/ref/ref",
-    "rv64i_m/I/src/bgeu-01.S/ref/ref",
-    "rv64i_m/I/src/blt-01.S/ref/ref",
-    "rv64i_m/I/src/bltu-01.S/ref/ref",
-    "rv64i_m/I/src/bne-01.S/ref/ref",
-    "rv64i_m/I/src/fence-01.S/ref/ref",
-    "rv64i_m/I/src/jal-01.S/ref/ref",
-    "rv64i_m/I/src/jalr-01.S/ref/ref",
-    "rv64i_m/I/src/lb-align-01.S/ref/ref",
-    "rv64i_m/I/src/lbu-align-01.S/ref/ref",
-    "rv64i_m/I/src/ld-align-01.S/ref/ref",
-    "rv64i_m/I/src/lh-align-01.S/ref/ref",
-    "rv64i_m/I/src/lhu-align-01.S/ref/ref",
-    "rv64i_m/I/src/lui-01.S/ref/ref",
-    "rv64i_m/I/src/lw-align-01.S/ref/ref",
-    "rv64i_m/I/src/lwu-align-01.S/ref/ref",
-    "rv64i_m/I/src/or-01.S/ref/ref",
-    "rv64i_m/I/src/ori-01.S/ref/ref",
-    "rv64i_m/I/src/sb-align-01.S/ref/ref",
-    "rv64i_m/I/src/sd-align-01.S/ref/ref",
-    "rv64i_m/I/src/sh-align-01.S/ref/ref",
-    "rv64i_m/I/src/sll-01.S/ref/ref",
-    "rv64i_m/I/src/slli-01.S/ref/ref",
-    "rv64i_m/I/src/slliw-01.S/ref/ref",
-    "rv64i_m/I/src/sllw-01.S/ref/ref",
-    "rv64i_m/I/src/slt-01.S/ref/ref",
-    "rv64i_m/I/src/slti-01.S/ref/ref",
-    "rv64i_m/I/src/sltiu-01.S/ref/ref",
-    "rv64i_m/I/src/sltu-01.S/ref/ref",
-    "rv64i_m/I/src/sra-01.S/ref/ref",
-    "rv64i_m/I/src/srai-01.S/ref/ref",
-    "rv64i_m/I/src/sraiw-01.S/ref/ref",
-    "rv64i_m/I/src/sraw-01.S/ref/ref",
-    "rv64i_m/I/src/srl-01.S/ref/ref",
-    "rv64i_m/I/src/srli-01.S/ref/ref",
-    "rv64i_m/I/src/srliw-01.S/ref/ref",
-    "rv64i_m/I/src/srlw-01.S/ref/ref",
-    "rv64i_m/I/src/sub-01.S/ref/ref",
-    "rv64i_m/I/src/subw-01.S/ref/ref",
-    "rv64i_m/I/src/sw-align-01.S/ref/ref",
-    "rv64i_m/I/src/xor-01.S/ref/ref",
-    "rv64i_m/I/src/xori-01.S/ref/ref"
+    "rv64i_m/I/src/add-01.S/ref/Ref",
+    "rv64i_m/I/src/addi-01.S/ref/Ref",
+    "rv64i_m/I/src/addiw-01.S/ref/Ref",
+    "rv64i_m/I/src/addw-01.S/ref/Ref",
+    "rv64i_m/I/src/and-01.S/ref/Ref",
+    "rv64i_m/I/src/andi-01.S/ref/Ref",
+    "rv64i_m/I/src/auipc-01.S/ref/Ref",
+    "rv64i_m/I/src/beq-01.S/ref/Ref",
+    "rv64i_m/I/src/bge-01.S/ref/Ref",
+    "rv64i_m/I/src/bgeu-01.S/ref/Ref",
+    "rv64i_m/I/src/blt-01.S/ref/Ref",
+    "rv64i_m/I/src/bltu-01.S/ref/Ref",
+    "rv64i_m/I/src/bne-01.S/ref/Ref",
+    "rv64i_m/I/src/fence-01.S/ref/Ref",
+    "rv64i_m/I/src/jal-01.S/ref/Ref",
+    "rv64i_m/I/src/jalr-01.S/ref/Ref",
+    "rv64i_m/I/src/lb-align-01.S/ref/Ref",
+    "rv64i_m/I/src/lbu-align-01.S/ref/Ref",
+    "rv64i_m/I/src/ld-align-01.S/ref/Ref",
+    "rv64i_m/I/src/lh-align-01.S/ref/Ref",
+    "rv64i_m/I/src/lhu-align-01.S/ref/Ref",
+    "rv64i_m/I/src/lui-01.S/ref/Ref",
+    "rv64i_m/I/src/lw-align-01.S/ref/Ref",
+    "rv64i_m/I/src/lwu-align-01.S/ref/Ref",
+    "rv64i_m/I/src/or-01.S/ref/Ref",
+    "rv64i_m/I/src/ori-01.S/ref/Ref",
+    "rv64i_m/I/src/sb-align-01.S/ref/Ref",
+    "rv64i_m/I/src/sd-align-01.S/ref/Ref",
+    "rv64i_m/I/src/sh-align-01.S/ref/Ref",
+    "rv64i_m/I/src/sll-01.S/ref/Ref",
+    "rv64i_m/I/src/slli-01.S/ref/Ref",
+    "rv64i_m/I/src/slliw-01.S/ref/Ref",
+    "rv64i_m/I/src/sllw-01.S/ref/Ref",
+    "rv64i_m/I/src/slt-01.S/ref/Ref",
+    "rv64i_m/I/src/slti-01.S/ref/Ref",
+    "rv64i_m/I/src/sltiu-01.S/ref/Ref",
+    "rv64i_m/I/src/sltu-01.S/ref/Ref",
+    "rv64i_m/I/src/sra-01.S/ref/Ref",
+    "rv64i_m/I/src/srai-01.S/ref/Ref",
+    "rv64i_m/I/src/sraiw-01.S/ref/Ref",
+    "rv64i_m/I/src/sraw-01.S/ref/Ref",
+    "rv64i_m/I/src/srl-01.S/ref/Ref",
+    "rv64i_m/I/src/srli-01.S/ref/Ref",
+    "rv64i_m/I/src/srliw-01.S/ref/Ref",
+    "rv64i_m/I/src/srlw-01.S/ref/Ref",
+    "rv64i_m/I/src/sub-01.S/ref/Ref",
+    "rv64i_m/I/src/subw-01.S/ref/Ref",
+    "rv64i_m/I/src/sw-align-01.S/ref/Ref",
+    "rv64i_m/I/src/xor-01.S/ref/Ref",
+    "rv64i_m/I/src/xori-01.S/ref/Ref"
   };
 
   string arch64d[] = '{
     `RISCVARCHTEST,
-    "rv64i_m/D/src/d_fadd_b10-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b11-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b12-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b13-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fadd_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fclass_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.l_b25-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.l_b26-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.lu_b25-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.lu_b26-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.s_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.w_b25-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.w_b26-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.wu_b25-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.d.wu_b26-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.l.d_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.lu.d_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.s.d_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.w.d_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fcvt.wu.d_b29-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b1-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b20-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b2-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b21-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b3-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b4-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b5-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b6-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b7-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b8-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fdiv_b9-01.S/ref/ref",
-    "rv64i_m/D/src/d_feq_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_feq_b19-01.S/ref/ref",
-    "rv64i_m/D/src/d_fle_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fle_b19-01.S/ref/ref",
-    "rv64i_m/D/src/d_flt_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_flt_b19-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b14-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b16-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b17-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b18-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b6-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmadd_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmax_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmax_b19-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmin_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmin_b19-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b14-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b16-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b17-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b18-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b6-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmsub_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b6-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmul_b9-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.d.x_b25-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.d.x_b26-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b22-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b23-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b24-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b27-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b28-01.S/ref/ref",
-    "rv64i_m/D/src/d_fmv.x.d_b29-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b14-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b16-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b17-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b18-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b6-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmadd_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b14-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b16-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b17-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b18-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b6-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fnmsub_b8-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsgnj_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsgnjn_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsgnjx_b1-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b1-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b20-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b2-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b3-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b4-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b5-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b7-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b8-01.S/ref/ref",
-    // "rv64i_m/D/src/d_fsqrt_b9-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b10-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b1-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b11-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b12-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b13-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b2-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b3-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b4-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b5-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b7-01.S/ref/ref",
-    "rv64i_m/D/src/d_fsub_b8-01.S/ref/ref"
+    "rv64i_m/D/src/d_fadd_b10-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b11-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b12-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b13-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fadd_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fclass_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.l_b25-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.l_b26-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.lu_b25-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.lu_b26-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.s_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.w_b25-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.w_b26-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.wu_b25-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.d.wu_b26-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.l.d_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.lu.d_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.s.d_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.w.d_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fcvt.wu.d_b29-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b1-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b20-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b2-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b21-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b3-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b4-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b5-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b6-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b7-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b8-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fdiv_b9-01.S/ref/Ref",
+    "rv64i_m/D/src/d_feq_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_feq_b19-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fle_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fle_b19-01.S/ref/Ref",
+    "rv64i_m/D/src/d_flt_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_flt_b19-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b14-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b16-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b17-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b18-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b6-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmadd_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmax_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmax_b19-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmin_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmin_b19-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b14-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b16-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b17-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b18-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b6-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmsub_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b6-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmul_b9-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.d.x_b25-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.d.x_b26-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b22-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b23-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b24-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b27-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b28-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fmv.x.d_b29-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b14-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b16-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b17-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b18-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b6-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmadd_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b14-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b16-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b17-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b18-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b6-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fnmsub_b8-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsgnj_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsgnjn_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsgnjx_b1-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b1-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b20-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b2-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b3-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b4-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b5-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b7-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b8-01.S/ref/Ref",
+    // "rv64i_m/D/src/d_fsqrt_b9-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b10-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b1-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b11-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b12-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b13-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b2-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b3-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b4-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b5-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b7-01.S/ref/Ref",
+    "rv64i_m/D/src/d_fsub_b8-01.S/ref/Ref"
 };
 
     string arch32priv[] = '{
     `RISCVARCHTEST,
-    "rv32i_m/privilege/src/ebreak.S/ref/ref",
-    "rv32i_m/privilege/src/ecall.S/ref/ref",
-    "rv32i_m/privilege/src/misalign1-jalr-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign2-jalr-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-beq-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-bge-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-bgeu-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-blt-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-bltu-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-bne-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-jal-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-lh-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-lhu-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-lw-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-sh-01.S/ref/ref",
-    "rv32i_m/privilege/src/misalign-sw-01.S/ref/ref"
+    "rv32i_m/privilege/src/ebreak.S/ref/Ref",
+    "rv32i_m/privilege/src/ecall.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign1-jalr-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign2-jalr-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-beq-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-bge-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-bgeu-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-blt-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-bltu-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-bne-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-jal-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-lh-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-lhu-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-lw-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-sh-01.S/ref/Ref",
+    "rv32i_m/privilege/src/misalign-sw-01.S/ref/Ref"
     };
 
   string arch32m[] = '{
     `RISCVARCHTEST,
-    "rv32i_m/M/src/div-01.S/ref/ref",
-    "rv32i_m/M/src/divu-01.S/ref/ref",
-    "rv32i_m/M/src/mul-01.S/ref/ref",
-    "rv32i_m/M/src/mulh-01.S/ref/ref",
-    "rv32i_m/M/src/mulhsu-01.S/ref/ref",
-    "rv32i_m/M/src/mulhu-01.S/ref/ref",
-    "rv32i_m/M/src/rem-01.S/ref/ref",
-    "rv32i_m/M/src/remu-01.S/ref/ref"
+    "rv32i_m/M/src/div-01.S/ref/Ref",
+    "rv32i_m/M/src/divu-01.S/ref/Ref",
+    "rv32i_m/M/src/mul-01.S/ref/Ref",
+    "rv32i_m/M/src/mulh-01.S/ref/Ref",
+    "rv32i_m/M/src/mulhsu-01.S/ref/Ref",
+    "rv32i_m/M/src/mulhu-01.S/ref/Ref",
+    "rv32i_m/M/src/rem-01.S/ref/Ref",
+    "rv32i_m/M/src/remu-01.S/ref/Ref"
    };
 
   string arch32f[] = '{
     `RISCVARCHTEST,
-    "rv32i_m/F/src/fadd_b10-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b11-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b12-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b13-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fadd_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fclass_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.s.w_b25-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.s.w_b26-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.s.wu_b25-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.s.wu_b26-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b22-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b23-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b24-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b27-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b28-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.w.s_b29-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b22-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b23-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b24-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b27-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b28-01.S/ref/ref",
-    "rv32i_m/F/src/fcvt.wu.s_b29-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b1-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b20-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b2-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b21-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b3-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b4-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b5-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b6-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b7-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b8-01.S/ref/ref",
-    // "rv32i_m/F/src/fdiv_b9-01.S/ref/ref",
-    "rv32i_m/F/src/feq_b1-01.S/ref/ref",
-    "rv32i_m/F/src/feq_b19-01.S/ref/ref",
-    "rv32i_m/F/src/fle_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fle_b19-01.S/ref/ref",
-    "rv32i_m/F/src/flt_b1-01.S/ref/ref",
-    "rv32i_m/F/src/flt_b19-01.S/ref/ref",
-    "rv32i_m/F/src/flw-align-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b14-01.S/ref/ref",
-    // "rv32i_m/F/src/fmadd_b15-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b16-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b17-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b18-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b6-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fmadd_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fmax_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmax_b19-01.S/ref/ref",
-    "rv32i_m/F/src/fmin_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmin_b19-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b14-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b15-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b16-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b17-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b18-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b6-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fmsub_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b6-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fmul_b9-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.w.x_b25-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.w.x_b26-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b22-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b23-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b24-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b27-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b28-01.S/ref/ref",
-    "rv32i_m/F/src/fmv.x.w_b29-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b14-01.S/ref/ref",
-    // "rv32i_m/F/src/fnmadd_b15-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b16-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b17-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b18-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b6-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fnmadd_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b14-01.S/ref/ref",
-    // "rv32i_m/F/src/fnmsub_b15-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b16-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b17-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b18-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b6-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fnmsub_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fsgnj_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fsgnjn_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fsgnjx_b1-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b1-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b20-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b2-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b3-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b4-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b5-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b7-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b8-01.S/ref/ref",
-    // "rv32i_m/F/src/fsqrt_b9-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b10-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b1-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b11-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b12-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b13-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b2-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b3-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b4-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b5-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b7-01.S/ref/ref",
-    "rv32i_m/F/src/fsub_b8-01.S/ref/ref",
-    "rv32i_m/F/src/fsw-align-01.S/ref/ref"
+    "rv32i_m/F/src/fadd_b10-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b11-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b12-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b13-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fadd_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fclass_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.s.w_b25-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.s.w_b26-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.s.wu_b25-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.s.wu_b26-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b22-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b23-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b24-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b27-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b28-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.w.s_b29-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b22-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b23-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b24-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b27-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b28-01.S/ref/Ref",
+    "rv32i_m/F/src/fcvt.wu.s_b29-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b1-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b20-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b2-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b21-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b3-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b4-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b5-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b6-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b7-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b8-01.S/ref/Ref",
+    // "rv32i_m/F/src/fdiv_b9-01.S/ref/Ref",
+    "rv32i_m/F/src/feq_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/feq_b19-01.S/ref/Ref",
+    "rv32i_m/F/src/fle_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fle_b19-01.S/ref/Ref",
+    "rv32i_m/F/src/flt_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/flt_b19-01.S/ref/Ref",
+    "rv32i_m/F/src/flw-align-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b14-01.S/ref/Ref",
+    // "rv32i_m/F/src/fmadd_b15-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b16-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b17-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b18-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b6-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fmadd_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fmax_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmax_b19-01.S/ref/Ref",
+    "rv32i_m/F/src/fmin_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmin_b19-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b14-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b15-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b16-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b17-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b18-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b6-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fmsub_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b6-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fmul_b9-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.w.x_b25-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.w.x_b26-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b22-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b23-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b24-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b27-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b28-01.S/ref/Ref",
+    "rv32i_m/F/src/fmv.x.w_b29-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b14-01.S/ref/Ref",
+    // "rv32i_m/F/src/fnmadd_b15-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b16-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b17-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b18-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b6-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmadd_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b14-01.S/ref/Ref",
+    // "rv32i_m/F/src/fnmsub_b15-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b16-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b17-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b18-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b6-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fnmsub_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fsgnj_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fsgnjn_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fsgnjx_b1-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b1-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b20-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b2-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b3-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b4-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b5-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b7-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b8-01.S/ref/Ref",
+    // "rv32i_m/F/src/fsqrt_b9-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b10-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b1-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b11-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b12-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b13-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b2-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b3-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b4-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b5-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b7-01.S/ref/Ref",
+    "rv32i_m/F/src/fsub_b8-01.S/ref/Ref",
+    "rv32i_m/F/src/fsw-align-01.S/ref/Ref"
     };
 
 
   string arch32c[] = '{
     `RISCVARCHTEST,
-    "rv32i_m/C/src/cadd-01.S/ref/ref",
-  "rv32i_m/C/src/caddi-01.S/ref/ref",
-  "rv32i_m/C/src/caddi16sp-01.S/ref/ref",
-  "rv32i_m/C/src/caddi4spn-01.S/ref/ref",
-  "rv32i_m/C/src/cand-01.S/ref/ref",
-  "rv32i_m/C/src/candi-01.S/ref/ref",
-  "rv32i_m/C/src/cbeqz-01.S/ref/ref",
-  "rv32i_m/C/src/cbnez-01.S/ref/ref",
-  "rv32i_m/C/src/cj-01.S/ref/ref",
-  "rv32i_m/C/src/cjal-01.S/ref/ref",
-  "rv32i_m/C/src/cjalr-01.S/ref/ref",
-  "rv32i_m/C/src/cjr-01.S/ref/ref",
-  "rv32i_m/C/src/cli-01.S/ref/ref",
-  "rv32i_m/C/src/clui-01.S/ref/ref",
-  "rv32i_m/C/src/clw-01.S/ref/ref",
-  "rv32i_m/C/src/clwsp-01.S/ref/ref",
-  "rv32i_m/C/src/cmv-01.S/ref/ref",
-  "rv32i_m/C/src/cnop-01.S/ref/ref",
-  "rv32i_m/C/src/cor-01.S/ref/ref",
-  "rv32i_m/C/src/cslli-01.S/ref/ref",
-  "rv32i_m/C/src/csrai-01.S/ref/ref",
-  "rv32i_m/C/src/csrli-01.S/ref/ref",
-  "rv32i_m/C/src/csub-01.S/ref/ref",
-  "rv32i_m/C/src/csw-01.S/ref/ref",
-  "rv32i_m/C/src/cswsp-01.S/ref/ref",
-  "rv32i_m/C/src/cxor-01.S/ref/ref"
+    "rv32i_m/C/src/cadd-01.S/ref/Ref",
+  "rv32i_m/C/src/caddi-01.S/ref/Ref",
+  "rv32i_m/C/src/caddi16sp-01.S/ref/Ref",
+  "rv32i_m/C/src/caddi4spn-01.S/ref/Ref",
+  "rv32i_m/C/src/cand-01.S/ref/Ref",
+  "rv32i_m/C/src/candi-01.S/ref/Ref",
+  "rv32i_m/C/src/cbeqz-01.S/ref/Ref",
+  "rv32i_m/C/src/cbnez-01.S/ref/Ref",
+  "rv32i_m/C/src/cj-01.S/ref/Ref",
+  "rv32i_m/C/src/cjal-01.S/ref/Ref",
+  "rv32i_m/C/src/cjalr-01.S/ref/Ref",
+  "rv32i_m/C/src/cjr-01.S/ref/Ref",
+  "rv32i_m/C/src/cli-01.S/ref/Ref",
+  "rv32i_m/C/src/clui-01.S/ref/Ref",
+  "rv32i_m/C/src/clw-01.S/ref/Ref",
+  "rv32i_m/C/src/clwsp-01.S/ref/Ref",
+  "rv32i_m/C/src/cmv-01.S/ref/Ref",
+  "rv32i_m/C/src/cnop-01.S/ref/Ref",
+  "rv32i_m/C/src/cor-01.S/ref/Ref",
+  "rv32i_m/C/src/cslli-01.S/ref/Ref",
+  "rv32i_m/C/src/csrai-01.S/ref/Ref",
+  "rv32i_m/C/src/csrli-01.S/ref/Ref",
+  "rv32i_m/C/src/csub-01.S/ref/Ref",
+  "rv32i_m/C/src/csw-01.S/ref/Ref",
+  "rv32i_m/C/src/cswsp-01.S/ref/Ref",
+  "rv32i_m/C/src/cxor-01.S/ref/Ref"
   };
 
   string arch32cpriv[] = '{
   //  `RISCVARCHTEST,
-  "rv32i_m/C/src/cebreak-01.S/ref/ref"
+  "rv32i_m/C/src/cebreak-01.S/ref/Ref"
   };      
 
 
   string arch32i[] = '{
     `RISCVARCHTEST,
-    "rv32i_m/I/src/add-01.S/ref/ref",
-    "rv32i_m/I/src/addi-01.S/ref/ref",
-    "rv32i_m/I/src/and-01.S/ref/ref",
-    "rv32i_m/I/src/andi-01.S/ref/ref",
-    "rv32i_m/I/src/auipc-01.S/ref/ref",
-    "rv32i_m/I/src/beq-01.S/ref/ref",
-    "rv32i_m/I/src/bge-01.S/ref/ref",
-    "rv32i_m/I/src/bgeu-01.S/ref/ref",
-    "rv32i_m/I/src/blt-01.S/ref/ref",
-    "rv32i_m/I/src/bltu-01.S/ref/ref",
-    "rv32i_m/I/src/bne-01.S/ref/ref",
-    "rv32i_m/I/src/fence-01.S/ref/ref",
-    "rv32i_m/I/src/jal-01.S/ref/ref",
-    "rv32i_m/I/src/jalr-01.S/ref/ref",
-    "rv32i_m/I/src/lb-align-01.S/ref/ref",
-    "rv32i_m/I/src/lbu-align-01.S/ref/ref",
-    "rv32i_m/I/src/lh-align-01.S/ref/ref",
-    "rv32i_m/I/src/lhu-align-01.S/ref/ref",
-    "rv32i_m/I/src/lui-01.S/ref/ref",
-    "rv32i_m/I/src/lw-align-01.S/ref/ref",
-    "rv32i_m/I/src/or-01.S/ref/ref",
-    "rv32i_m/I/src/ori-01.S/ref/ref",
-    "rv32i_m/I/src/sb-align-01.S/ref/ref",
-    "rv32i_m/I/src/sh-align-01.S/ref/ref",
-    "rv32i_m/I/src/sll-01.S/ref/ref",
-    "rv32i_m/I/src/slli-01.S/ref/ref",
-    "rv32i_m/I/src/slt-01.S/ref/ref",
-    "rv32i_m/I/src/slti-01.S/ref/ref",
-    "rv32i_m/I/src/sltiu-01.S/ref/ref",
-    "rv32i_m/I/src/sltu-01.S/ref/ref",
-    "rv32i_m/I/src/sra-01.S/ref/ref",
-    "rv32i_m/I/src/srai-01.S/ref/ref",
-    "rv32i_m/I/src/srl-01.S/ref/ref",
-    "rv32i_m/I/src/srli-01.S/ref/ref",
-    "rv32i_m/I/src/sub-01.S/ref/ref",
-    "rv32i_m/I/src/sw-align-01.S/ref/ref",
-    "rv32i_m/I/src/xor-01.S/ref/ref",
-    "rv32i_m/I/src/xori-01.S/ref/ref"
+    "rv32i_m/I/src/add-01.S/ref/Ref",
+    "rv32i_m/I/src/addi-01.S/ref/Ref",
+    "rv32i_m/I/src/and-01.S/ref/Ref",
+    "rv32i_m/I/src/andi-01.S/ref/Ref",
+    "rv32i_m/I/src/auipc-01.S/ref/Ref",
+    "rv32i_m/I/src/beq-01.S/ref/Ref",
+    "rv32i_m/I/src/bge-01.S/ref/Ref",
+    "rv32i_m/I/src/bgeu-01.S/ref/Ref",
+    "rv32i_m/I/src/blt-01.S/ref/Ref",
+    "rv32i_m/I/src/bltu-01.S/ref/Ref",
+    "rv32i_m/I/src/bne-01.S/ref/Ref",
+    "rv32i_m/I/src/fence-01.S/ref/Ref",
+    "rv32i_m/I/src/jal-01.S/ref/Ref",
+    "rv32i_m/I/src/jalr-01.S/ref/Ref",
+    "rv32i_m/I/src/lb-align-01.S/ref/Ref",
+    "rv32i_m/I/src/lbu-align-01.S/ref/Ref",
+    "rv32i_m/I/src/lh-align-01.S/ref/Ref",
+    "rv32i_m/I/src/lhu-align-01.S/ref/Ref",
+    "rv32i_m/I/src/lui-01.S/ref/Ref",
+    "rv32i_m/I/src/lw-align-01.S/ref/Ref",
+    "rv32i_m/I/src/or-01.S/ref/Ref",
+    "rv32i_m/I/src/ori-01.S/ref/Ref",
+    "rv32i_m/I/src/sb-align-01.S/ref/Ref",
+    "rv32i_m/I/src/sh-align-01.S/ref/Ref",
+    "rv32i_m/I/src/sll-01.S/ref/Ref",
+    "rv32i_m/I/src/slli-01.S/ref/Ref",
+    "rv32i_m/I/src/slt-01.S/ref/Ref",
+    "rv32i_m/I/src/slti-01.S/ref/Ref",
+    "rv32i_m/I/src/sltiu-01.S/ref/Ref",
+    "rv32i_m/I/src/sltu-01.S/ref/Ref",
+    "rv32i_m/I/src/sra-01.S/ref/Ref",
+    "rv32i_m/I/src/srai-01.S/ref/Ref",
+    "rv32i_m/I/src/srl-01.S/ref/Ref",
+    "rv32i_m/I/src/srli-01.S/ref/Ref",
+    "rv32i_m/I/src/sub-01.S/ref/Ref",
+    "rv32i_m/I/src/sw-align-01.S/ref/Ref",
+    "rv32i_m/I/src/xor-01.S/ref/Ref",
+    "rv32i_m/I/src/xori-01.S/ref/Ref"
   };
 
  string wally64i[] = '{
diff --git a/tests/riscof/Makefile b/tests/riscof/Makefile
index 3e2ed6a0c..dc121f4f0 100644
--- a/tests/riscof/Makefile
+++ b/tests/riscof/Makefile
@@ -1,5 +1,5 @@
 arch_dir = ../../addins/riscv-arch-test
-work_dir = "./riscof_work"
+work_dir = ./riscof_work
 current_dir = $(shell pwd)
 XLEN    ?= 64
 
@@ -9,8 +9,9 @@ build:
 	mkdir -p $(work_dir)
 	mkdir -p work
 	sed 's,{0},$(current_dir),g;s,{1},$(XLEN)$(if $(findstring 64,$(XLEN)),gc,imc),g' config.ini > config$(XLEN).ini
-	riscof run --work-dir=$(work_dir) --config=config$(XLEN).ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser --no-dut-run
-	mv $(work_dir)/rv$(XLEN)i_m work/
+	riscof run --work-dir=$(work_dir) --config=config$(XLEN).ini --suite=$(arch_dir)/riscv-test-suite/ --env=$(arch_dir)/riscv-test-suite/env --no-browser
+	rm -rf work/rv$(XLEN)i_m
+	mv -f $(work_dir)/rv$(XLEN)i_m work/
 
 clean:
 	rm -f config64.ini
diff --git a/tests/riscof/sail_cSim/riscof_sail_cSim.py b/tests/riscof/sail_cSim/riscof_sail_cSim.py
index de78070d1..7a7d16afb 100644
--- a/tests/riscof/sail_cSim/riscof_sail_cSim.py
+++ b/tests/riscof/sail_cSim/riscof_sail_cSim.py
@@ -90,7 +90,7 @@ class sail_cSim(pluginTemplate):
             test_dir = testentry['work_dir']
             test_name = test.rsplit('/',1)[1][:-2]
 
-            elf = 'ref.elf'
+            elf = 'Ref.elf'
 
             execute = "@cd "+testentry['work_dir']+";"
 
@@ -98,8 +98,8 @@ class sail_cSim(pluginTemplate):
             compile_cmd = cmd + ' -D' + " -D".join(testentry['macros'])
             execute+=compile_cmd+";"
 
-            execute += self.objdump_cmd.format(elf, self.xlen, 'ref.elf.objdump')
-            sig_file = os.path.join(test_dir, "ref.signature.output")
+            execute += self.objdump_cmd.format(elf, self.xlen, 'Ref.elf.objdump')
+            sig_file = os.path.join(test_dir, self.name[:-1] + ".signature")
 
             execute += self.sail_exe[self.xlen] + ' --test-signature={0} {1} > {2}.log 2>&1;'.format(sig_file, elf, test_name)