From 3809b292c1a4bc539e90c865d45dea08e4b160a1 Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 11 Apr 2025 06:42:20 -0700 Subject: [PATCH] Decompressed and mmu coverage fixes --- sim/questa/coverage-exclusions-rv64gc.do | 4 +--- src/ifu/decompress.sv | 2 +- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/sim/questa/coverage-exclusions-rv64gc.do b/sim/questa/coverage-exclusions-rv64gc.do index 3171bb484..e523877b7 100644 --- a/sim/questa/coverage-exclusions-rv64gc.do +++ b/sim/questa/coverage-exclusions-rv64gc.do @@ -274,9 +274,7 @@ set line [GetLineNum ${SRC}/mmu/mmu.sv "ExecuteAccessF \\| ReadAccessM"] coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 1,3,4 set line [GetLineNum ${SRC}/mmu/mmu.sv "ReadAccessM & ~WriteAccessM"] coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 2-4 -set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AmoAccessM"] -coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AmoMisalignedCausesAccessFaultM"] +set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AtomicMisalignedCausesAccessFaultM"] coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 set line [GetLineNum ${SRC}/mmu/mmu.sv "DataMisalignedM & WriteAccessM"] coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 1,2,4 diff --git a/src/ifu/decompress.sv b/src/ifu/decompress.sv index 6d49e0e0a..d0055b1ae 100644 --- a/src/ifu/decompress.sv +++ b/src/ifu/decompress.sv @@ -168,7 +168,7 @@ module decompress import cvw::*; #(parameter cvw_t P) ( else if (rs2 == 5'b00000) begin if (rds1 == 5'b00000) LInstrD = {1'b1, 12'b1, 5'b00000, 3'b000, 5'b00000, 7'b1110011}; // c.ebreak - else if (rds1 != 5'b0) LInstrD = {1'b1, 12'b0, rds1, 3'b000, 5'b00001, 7'b1100111}; // c.jalr + else LInstrD = {1'b1, 12'b0, rds1, 3'b000, 5'b00001, 7'b1100111}; // c.jalr end else if (rds1 != 0) LInstrD = {1'b1, 7'b0000000, rs2, rds1, 3'b000, rds1, 7'b0110011}; // c.add else LInstrD = {1'b1, 25'b0, 7'b0010011}; // c.add with rd = 0 is a HINT, treated as nop, even if it is a C.NTL