diff --git a/src/lsu/align.sv b/src/lsu/align.sv
index b6bae2918..2f8aa64fb 100644
--- a/src/lsu/align.sv
+++ b/src/lsu/align.sv
@@ -148,7 +148,7 @@ module align import cvw::*;  #(parameter cvw_t P) (
   flopenr #(P.LLEN) SpillDataReg(clk, reset, SpillSaveM, DCacheReadDataWordM[P.LLEN-1:0], ReadDataWordFirstHalfM);
 
   // merge together
-  mux2 #(2*P.LLEN) postspillmux(DCacheReadDataWordM, {DCacheReadDataWordM[P.LLEN-1:0], ReadDataWordFirstHalfM}, SelSpillM, ReadDataWordSpillAllM);
+  mux2 #(2*P.LLEN) postspillmux(DCacheReadDataWordM, {DCacheReadDataWordM[P.LLEN-1:0], ReadDataWordFirstHalfM}, SelSpillM & ~SelHPTW, ReadDataWordSpillAllM);
 
 
   // shifter (4:1 mux for 32 bit, 8:1 mux for 64 bit)