diff --git a/sim/wally-batch.do b/sim/wally-batch.do
index 3168b4520..1992c1805 100644
--- a/sim/wally-batch.do
+++ b/sim/wally-batch.do
@@ -81,11 +81,11 @@ if {$2 eq "buildroot" || $2 eq "buildroot-checkpoint"} {
     # start and run simulation
     # remove +acc flag for faster sim during regressions if there is no need to access internal signals
     vopt wkdir/work_${1}_${2}.testbench -work wkdir/work_${1}_${2} -G TEST=$2 -o testbenchopt
-    vsim -lib wkdir/work_${1}_${2} testbenchopt  -fatal 7
+    vsim -lib wkdir/work_${1}_${2} testbenchopt  -fatal 7 -suppress 3829
     # Adding coverage increases runtime from 2:00 to 4:29.  Can't run it all the time
     #vopt work_$2.testbench -work work_$2 -o workopt_$2 +cover=sbectf
     #vsim -coverage -lib work_$2 workopt_$2
-
+    do wave.do
     # power add generates the logging necessary for said generation.
     # power add -r /dut/core/*
     run -all
diff --git a/testbench/testbench.sv b/testbench/testbench.sv
index 984c8722d..e6f025e83 100644
--- a/testbench/testbench.sv
+++ b/testbench/testbench.sv
@@ -406,7 +406,7 @@ logic [3:0] dummy;
 	logic 	StartSampleFirst;
 	logic 	StartSampleDelayed;
 	logic 	StartSample;
-	logic 	EndSample;
+	logic 	EndSample, EndSampleFirst, EndSampleDelayed;
 	logic [`XLEN-1:0] InitialHPMCOUNTERH[`COUNTERS-1:0];
 	logic [`XLEN-1:0] FinalHPMCOUNTERH[`COUNTERS-1:0];
 
@@ -436,11 +436,27 @@ logic [3:0] dummy;
                             "Exception",
                             "Divide Cycles"
 							};
-	assign StartSampleFirst = FunctionName.FunctionName.FunctionName == "start_trigger";
-	flopr #(1) StartSampleReg(clk, reset, StartSampleFirst, StartSampleDelayed);
-	assign StartSample = StartSampleFirst & ~ StartSampleDelayed;
-	
-	assign EndSample = DCacheFlushStart & ~DCacheFlushDone;
+
+	if(TEST == "embench") begin
+	  // embench runs warmup then runs start_trigger
+	  // embench end with stop_trigger.
+	  assign StartSampleFirst = FunctionName.FunctionName.FunctionName == "start_trigger";
+	  flopr #(1) StartSampleReg(clk, reset, StartSampleFirst, StartSampleDelayed);
+	  assign StartSample = StartSampleFirst & ~ StartSampleDelayed;
+
+	  assign EndSampleFirst = FunctionName.FunctionName.FunctionName == "stop_trigger";
+	  flopr #(1) EndSampleReg(clk, reset, EndSampleFirst, EndSampleDelayed);
+	  assign EndSample = EndSampleFirst & ~ EndSampleDelayed;
+
+	end else begin
+	  // default start condiction is reset
+	  // default end condiction is end of test (DCacheFlushDone)
+	  assign StartSampleFirst = InReset;
+	  flopr #(1) StartSampleReg(clk, reset, StartSampleFirst, StartSampleDelayed);
+	  assign StartSample = StartSampleFirst & ~ StartSampleDelayed;
+
+	  assign EndSample = DCacheFlushStart & ~DCacheFlushDone;
+	end
 	
     always @(negedge clk) begin
 	  if(StartSample) begin
@@ -465,7 +481,7 @@ logic [3:0] dummy;
 
 
   // track the current function or global label
-  if (DEBUG == 1) begin : FunctionName
+  if (DEBUG == 1 | (`PrintHPMCounters & `ZICOUNTERS_SUPPORTED)) begin : FunctionName
     FunctionName FunctionName(.reset(reset),
 			      .clk(clk),
 			      .ProgramAddrMapFile(ProgramAddrMapFile),