From 495d1c71452d7d9c88add60c715290fc87e39dec Mon Sep 17 00:00:00 2001 From: Jordan Carlin Date: Sat, 28 Sep 2024 21:43:41 -0700 Subject: [PATCH] Only generate RISCV version of softfloat --- tests/fp/Makefile | 26 +++++++---- tests/fp/berkeley-float/Makefile | 58 ----------------------- tests/fp/vectors/Makefile | 80 ++++++++++++++++++++++++++++---- tests/fp/vectors/ieee/Makefile | 78 ------------------------------- tests/fp/vectors/riscv/Makefile | 78 ------------------------------- 5 files changed, 87 insertions(+), 233 deletions(-) delete mode 100755 tests/fp/berkeley-float/Makefile mode change 100644 => 100755 tests/fp/vectors/Makefile delete mode 100755 tests/fp/vectors/ieee/Makefile delete mode 100755 tests/fp/vectors/riscv/Makefile diff --git a/tests/fp/Makefile b/tests/fp/Makefile index d6359f249..be0cce7d1 100755 --- a/tests/fp/Makefile +++ b/tests/fp/Makefile @@ -2,13 +2,17 @@ # Floating Point Tests Makefile for CORE-V-Wally # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 -TESTFLOAT := testfloat/build/Linux-x86_64-GCC/testfloat_gen -TESTFLOATS := berkeley-float/ieee/${TESTFLOAT} berkeley-float/riscv/${TESTFLOAT} +SOFTFLOAT_DIR := ${WALLY}/addins/berkeley-softfloat-3/build/Linux-x86_64-GCC +TESTFLOAT_DIR := ${WALLY}/addins/berkeley-testfloat-3/build/Linux-x86_64-GCC -.PHONY: all vectors combined_IF_vectors testfloat clean +.PHONY: all softfloat testfloat vectors combined_IF_vectors clean all: vectors combined_IF_vectors +softfloat: ${SOFTFLOAT_DIR}/softfloat.a + +testfloat: ${TESTFLOAT_DIR}/testfloat + vectors: ${TESTFLOATS} $(MAKE) -C ${WALLY}/tests/fp/vectors @@ -16,15 +20,17 @@ combined_IF_vectors: ${WALLY}/tests/riscof/work/riscv-arch-test/rv32i_m/M/src ve cd ${WALLY}/tests/fp/combined_IF_vectors \ && ./create_IF_vectors.sh -${TESTFLOATS}: testfloat - -testfloat: - $(MAKE) -C berkeley-float - clean: - $(MAKE) -C vectors clean - $(MAKE) -C berkeley-float clean + $(MAKE) -C ${WALLY}/tests/fp/vectors clean + $(MAKE) -C ${SOFTFLOAT_DIR} clean + $(MAKE) -C ${TESTFLOAT_DIR} clean rm -f ${WALLY}/tests/fp/combined_IF_vectors/IF_vectors/*.tv ${WALLY}/tests/riscof/work/riscv-arch-test/rv32i_m/M/src: @$(error "riscv-arch-tests must be generated first. Run make from $$WALLY") + +${SOFTFLOAT_DIR}/softfloat.a: + $(MAKE) SPECIALIZE_TYPE=RISCV -C ${SOFTFLOAT_DIR} + +${TESTFLOAT_DIR}/testfloat: ${SOFTFLOAT_DIR}/softfloat.a + $(MAKE) -C ${TESTFLOAT_DIR} diff --git a/tests/fp/berkeley-float/Makefile b/tests/fp/berkeley-float/Makefile deleted file mode 100755 index 6ca22c573..000000000 --- a/tests/fp/berkeley-float/Makefile +++ /dev/null @@ -1,58 +0,0 @@ -# Jordan Carlin, jcarlin@hmc.edu, August 2024 -# Makefile to generate RISCV and IEEE varaints of Testfloat for CORE-V-Wally -# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 - -# Makefile to build testfloat and softfloat executables for IEEE and RISC-V floating point variants - -# Disable parallel execution because both versions of softfloat/testfloat use the same build directory -.NOTPARALLEL: -.SECONDEXPANSION: - -DIR := $(shell pwd) - -# SoftFloat variables -SOFTFLOAT_DIR := ${WALLY}/addins/berkeley-softfloat-3 -SOFTFLOAT_INCLUDE_DIR := source/include/ -SOFTFLOAT_BUILD_DIR := build/Linux-x86_64-GCC/ -SOFTFLOAT_ORIGINAL_BUILD_DIR := ${SOFTFLOAT_DIR}/${SOFTFLOAT_BUILD_DIR} -SOFTFLOAT_ORIGINAL_INCLUDE_DIR := ${SOFTFLOAT_DIR}/${SOFTFLOAT_INCLUDE_DIR} -SOFTFLOAT_LIB := softfloat.a -COPIED_SOFTFLOAT_LIB := softfloat/${SOFTFLOAT_BUILD_DIR}/${SOFTFLOAT_LIB} -ORIGINAL_SOFTFLOAT_LIB := ${SOFTFLOAT_ORIGINAL_BUILD_DIR}/${SOFTFLOAT_LIB} - -# TestFloat variables -TESTFLOAT_DIR := ${WALLY}/addins/berkeley-testfloat-3 -TESTFLOAT_BUILD_DIR := build/Linux-x86_64-GCC -TESTFLOAT_ORIGINAL_BUILD_DIR := ${TESTFLOAT_DIR}/${TESTFLOAT_BUILD_DIR} -TESTFLOAT_EXECUTABLES := testfloat testfloat_gen testfloat_ver testsoftfloat timesoftfloat -ORIGINAL_TESTFLOAT_EXECUTABLES := $(foreach item,${TESTFLOAT_EXECUTABLES},$(patsubst %,${TESTFLOAT_ORIGINAL_BUILD_DIR}%,/${item})) - -.PHONY: all ieee riscv clean - -all: ieee riscv - -ieee riscv: $$@/testfloat/${TESTFLOAT_BUILD_DIR}/testfloat - -%/testfloat/${TESTFLOAT_BUILD_DIR}/testfloat: %/$(COPIED_SOFTFLOAT_LIB) - $(MAKE) -C $(TESTFLOAT_ORIGINAL_BUILD_DIR) clean - $(MAKE) SOFTFLOAT_DIR=${DIR}/$*/softfloat -C $(TESTFLOAT_ORIGINAL_BUILD_DIR) - cp -r ${ORIGINAL_TESTFLOAT_EXECUTABLES} $*/testfloat/${TESTFLOAT_BUILD_DIR}/ - $(MAKE) -C $(TESTFLOAT_ORIGINAL_BUILD_DIR) clean - -# Build specified version of SoftFloat, either IEEE or RISCV -riscv/$(COPIED_SOFTFLOAT_LIB): SPECIALIZE_TYPE = SPECIALIZE_TYPE=RISCV -%/$(COPIED_SOFTFLOAT_LIB): %/${SOFTFLOAT_INCLUDE_DIR}/softfloat.h - $(MAKE) -C $(SOFTFLOAT_ORIGINAL_BUILD_DIR) clean - $(MAKE) $(SPECIALIZE_TYPE) -C $(SOFTFLOAT_ORIGINAL_BUILD_DIR) - cp ${ORIGINAL_SOFTFLOAT_LIB} $*/${COPIED_SOFTFLOAT_LIB} - $(MAKE) -C $(SOFTFLOAT_ORIGINAL_BUILD_DIR) clean - -# Setup directories and link softfloat headers -%/${SOFTFLOAT_INCLUDE_DIR}/softfloat.h: - mkdir -p $*/softfloat/source/include - ln -sf ${SOFTFLOAT_ORIGINAL_INCLUDE_DIR}/* $*/softfloat/${SOFTFLOAT_INCLUDE_DIR} - mkdir -p $*/softfloat/build/Linux-x86_64-GCC - mkdir -p $*/testfloat/${TESTFLOAT_BUILD_DIR} - -clean: - rm -rf ieee/* riscv/* diff --git a/tests/fp/vectors/Makefile b/tests/fp/vectors/Makefile old mode 100644 new mode 100755 index d72748539..d3ed6d9a7 --- a/tests/fp/vectors/Makefile +++ b/tests/fp/vectors/Makefile @@ -1,16 +1,78 @@ # Jordan Carlin, jcarlin@hmc.edu, September 20 2024 -# Makefile to generate floating point testvectors for CORE-V-Wally +# Makefile to generate RISCV floating point testvectors for CORE-V-Wally # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 -.PHONY: ieee riscv clean -all: ieee riscv +.DELETE_ON_ERROR: +.SECONDEXPANSION: +.ONESHELL: +# MAKEFLAGS += --no-print-directory -ieee: - $(MAKE) -C ieee +SHELL := /bin/bash -riscv: - $(MAKE) -C riscv +VECTOR_TYPE := riscv +TESTFLOAT_DIR := ../../berkeley-float +TESTFLOAT_GEN := ${TESTFLOAT_DIR}/${VECTOR_TYPE}/testfloat/build/Linux-x86_64-GCC/testfloat_gen + +# List of testvectors to generate. Each rounding mode will be generated for each test. +cvtint := ui32_to_f16 ui32_to_f32 ui32_to_f64 ui32_to_f128 \ + ui64_to_f16 ui64_to_f32 ui64_to_f64 ui64_to_f128 \ + i32_to_f16 i32_to_f32 i32_to_f64 i32_to_f128 \ + i64_to_f16 i64_to_f32 i64_to_f64 i64_to_f128 \ + f16_to_ui32 f32_to_ui32 f64_to_ui32 f128_to_ui32 \ + f16_to_ui64 f32_to_ui64 f64_to_ui64 f128_to_ui64 +cvtfp := f16_to_i32 f32_to_i32 f64_to_i32 f128_to_i32 \ + f16_to_i64 f32_to_i64 f64_to_i64 f128_to_i64 \ + f16_to_f32 f16_to_f64 f16_to_f128 \ + f32_to_f16 f32_to_f64 f32_to_f128 \ + f64_to_f16 f64_to_f32 f64_to_f128 \ + f128_to_f16 f128_to_f32 f128_to_f64 +add := f16_add f32_add f64_add f128_add +sub := f16_sub f32_sub f64_sub f128_sub +mul := f16_mul f32_mul f64_mul f128_mul +div := f16_div f32_div f64_div f128_div +sqrt := f16_sqrt f32_sqrt f64_sqrt f128_sqrt +eq := f16_eq f32_eq f64_eq f128_eq +le := f16_le f32_le f64_le f128_le +lt := f16_lt f32_lt f64_lt f128_lt +mulAdd := f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd + +tests := $(cvtfp) $(cvtint) $(add) $(sub) $(mul) $(div) $(sqrt) $(eq) $(le) $(lt) $(mulAdd) + +# Set rounding modes and extensions +rne: ROUND_MODE := rnear_even +rne: ROUND_EXT := rne +rz: ROUND_MODE := rminMag +rz: ROUND_EXT := rz +ru: ROUND_MODE := rmax +ru: ROUND_EXT := ru +rd: ROUND_MODE := rmin +rd: ROUND_EXT := rd +rnm: ROUND_MODE := rnear_maxMag +rnm: ROUND_EXT := rnm + +.PHONY: all rne rz ru rd rnm clean + +all: rne rz ru rd rnm + +# Generate test vectors for each rounding mode +rne: $(addsuffix _rne.tv, $(tests)) +rz: $(addsuffix _rz.tv, $(tests)) +ru: $(addsuffix _ru.tv, $(tests)) +rd: $(addsuffix _rd.tv, $(tests)) +rnm: $(addsuffix _rnm.tv, $(tests)) + +# Rule to generate individual test vectors +%.tv: ${TESTFLOAT_GEN} + @echo "Creating $(VECTOR_TYPE) $@ vectors" + @if [[ "$*" =~ "to" ]] || [[ "$*" =~ "sqrt" ]] ; then level=2 ; else level=1 ; fi + @if [[ "$*" =~ "to_i" ]] || [[ "$*" =~ "to_u" ]] ; then exact="-exact" ; else exact="" ; fi + ${TESTFLOAT_GEN} -tininessafter -level $$level $$exact -$(ROUND_MODE) $(patsubst %_$(ROUND_EXT).tv, %, $@) > $@ + @sed -i 's/ /_/g' $@ + +# Appropriate testfloat_gen must exist +${TESTFLOAT_GEN}: + $(MAKE) -C ${TESTFLOAT_DIR} ${VECTOR_TYPE} clean: - $(MAKE) -C ieee clean - $(MAKE) -C riscv clean + rm -f *.tv + rm -f sed* diff --git a/tests/fp/vectors/ieee/Makefile b/tests/fp/vectors/ieee/Makefile deleted file mode 100755 index a44f54d5d..000000000 --- a/tests/fp/vectors/ieee/Makefile +++ /dev/null @@ -1,78 +0,0 @@ -# Jordan Carlin, jcarlin@hmc.edu, September 20 2024 -# Makefile to generate IEEE floating point testvectors for CORE-V-Wally -# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 - -.DELETE_ON_ERROR: -.SECONDEXPANSION: -.ONESHELL: -# MAKEFLAGS += --no-print-directory - -SHELL := /bin/bash - -VECTOR_TYPE := ieee -TESTFLOAT_DIR := ../../berkeley-float -TESTFLOAT_GEN := ${TESTFLOAT_DIR}/${VECTOR_TYPE}/testfloat/build/Linux-x86_64-GCC/testfloat_gen - -# List of testvectors to generate. Each rounding mode will be generated for each test. -cvtint := ui32_to_f16 ui32_to_f32 ui32_to_f64 ui32_to_f128 \ - ui64_to_f16 ui64_to_f32 ui64_to_f64 ui64_to_f128 \ - i32_to_f16 i32_to_f32 i32_to_f64 i32_to_f128 \ - i64_to_f16 i64_to_f32 i64_to_f64 i64_to_f128 \ - f16_to_ui32 f32_to_ui32 f64_to_ui32 f128_to_ui32 \ - f16_to_ui64 f32_to_ui64 f64_to_ui64 f128_to_ui64 -cvtfp := f16_to_i32 f32_to_i32 f64_to_i32 f128_to_i32 \ - f16_to_i64 f32_to_i64 f64_to_i64 f128_to_i64 \ - f16_to_f32 f16_to_f64 f16_to_f128 \ - f32_to_f16 f32_to_f64 f32_to_f128 \ - f64_to_f16 f64_to_f32 f64_to_f128 \ - f128_to_f16 f128_to_f32 f128_to_f64 -add := f16_add f32_add f64_add f128_add -sub := f16_sub f32_sub f64_sub f128_sub -mul := f16_mul f32_mul f64_mul f128_mul -div := f16_div f32_div f64_div f128_div -sqrt := f16_sqrt f32_sqrt f64_sqrt f128_sqrt -eq := f16_eq f32_eq f64_eq f128_eq -le := f16_le f32_le f64_le f128_le -lt := f16_lt f32_lt f64_lt f128_lt -mulAdd := f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd - -tests := $(cvtfp) $(cvtint) $(add) $(sub) $(mul) $(div) $(sqrt) $(eq) $(le) $(lt) $(mulAdd) - -# Set rounding modes and extensions -rne: ROUND_MODE := rnear_even -rne: ROUND_EXT := rne -rz: ROUND_MODE := rminMag -rz: ROUND_EXT := rz -ru: ROUND_MODE := rmax -ru: ROUND_EXT := ru -rd: ROUND_MODE := rmin -rd: ROUND_EXT := rd -rnm: ROUND_MODE := rnear_maxMag -rnm: ROUND_EXT := rnm - -.PHONY: all rne rz ru rd rnm clean - -all: rne rz ru rd rnm - -# Generate test vectors for each rounding mode -rne: $(addsuffix _rne.tv, $(tests)) -rz: $(addsuffix _rz.tv, $(tests)) -ru: $(addsuffix _ru.tv, $(tests)) -rd: $(addsuffix _rd.tv, $(tests)) -rnm: $(addsuffix _rnm.tv, $(tests)) - -# Rule to generate individual test vectors -%.tv: ${TESTFLOAT_GEN} - @echo "Creating $(VECTOR_TYPE) $@ vectors" - @if [[ "$*" =~ "to" ]] || [[ "$*" =~ "sqrt" ]] ; then level=2 ; else level=1 ; fi - @if [[ "$*" =~ "to_i" ]] || [[ "$*" =~ "to_u" ]] ; then exact="-exact" ; else exact="" ; fi - ${TESTFLOAT_GEN} -tininessafter -level $$level $$exact -$(ROUND_MODE) $(patsubst %_$(ROUND_EXT).tv, %, $@) > $@ - @sed -i 's/ /_/g' $@ - -# Appropriate testfloat_gen must exist -${TESTFLOAT_GEN}: - $(MAKE) -C ${TESTFLOAT_DIR} ${VECTOR_TYPE} - -clean: - rm -f *.tv - rm -f sed* diff --git a/tests/fp/vectors/riscv/Makefile b/tests/fp/vectors/riscv/Makefile deleted file mode 100755 index d3ed6d9a7..000000000 --- a/tests/fp/vectors/riscv/Makefile +++ /dev/null @@ -1,78 +0,0 @@ -# Jordan Carlin, jcarlin@hmc.edu, September 20 2024 -# Makefile to generate RISCV floating point testvectors for CORE-V-Wally -# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 - -.DELETE_ON_ERROR: -.SECONDEXPANSION: -.ONESHELL: -# MAKEFLAGS += --no-print-directory - -SHELL := /bin/bash - -VECTOR_TYPE := riscv -TESTFLOAT_DIR := ../../berkeley-float -TESTFLOAT_GEN := ${TESTFLOAT_DIR}/${VECTOR_TYPE}/testfloat/build/Linux-x86_64-GCC/testfloat_gen - -# List of testvectors to generate. Each rounding mode will be generated for each test. -cvtint := ui32_to_f16 ui32_to_f32 ui32_to_f64 ui32_to_f128 \ - ui64_to_f16 ui64_to_f32 ui64_to_f64 ui64_to_f128 \ - i32_to_f16 i32_to_f32 i32_to_f64 i32_to_f128 \ - i64_to_f16 i64_to_f32 i64_to_f64 i64_to_f128 \ - f16_to_ui32 f32_to_ui32 f64_to_ui32 f128_to_ui32 \ - f16_to_ui64 f32_to_ui64 f64_to_ui64 f128_to_ui64 -cvtfp := f16_to_i32 f32_to_i32 f64_to_i32 f128_to_i32 \ - f16_to_i64 f32_to_i64 f64_to_i64 f128_to_i64 \ - f16_to_f32 f16_to_f64 f16_to_f128 \ - f32_to_f16 f32_to_f64 f32_to_f128 \ - f64_to_f16 f64_to_f32 f64_to_f128 \ - f128_to_f16 f128_to_f32 f128_to_f64 -add := f16_add f32_add f64_add f128_add -sub := f16_sub f32_sub f64_sub f128_sub -mul := f16_mul f32_mul f64_mul f128_mul -div := f16_div f32_div f64_div f128_div -sqrt := f16_sqrt f32_sqrt f64_sqrt f128_sqrt -eq := f16_eq f32_eq f64_eq f128_eq -le := f16_le f32_le f64_le f128_le -lt := f16_lt f32_lt f64_lt f128_lt -mulAdd := f16_mulAdd f32_mulAdd f64_mulAdd f128_mulAdd - -tests := $(cvtfp) $(cvtint) $(add) $(sub) $(mul) $(div) $(sqrt) $(eq) $(le) $(lt) $(mulAdd) - -# Set rounding modes and extensions -rne: ROUND_MODE := rnear_even -rne: ROUND_EXT := rne -rz: ROUND_MODE := rminMag -rz: ROUND_EXT := rz -ru: ROUND_MODE := rmax -ru: ROUND_EXT := ru -rd: ROUND_MODE := rmin -rd: ROUND_EXT := rd -rnm: ROUND_MODE := rnear_maxMag -rnm: ROUND_EXT := rnm - -.PHONY: all rne rz ru rd rnm clean - -all: rne rz ru rd rnm - -# Generate test vectors for each rounding mode -rne: $(addsuffix _rne.tv, $(tests)) -rz: $(addsuffix _rz.tv, $(tests)) -ru: $(addsuffix _ru.tv, $(tests)) -rd: $(addsuffix _rd.tv, $(tests)) -rnm: $(addsuffix _rnm.tv, $(tests)) - -# Rule to generate individual test vectors -%.tv: ${TESTFLOAT_GEN} - @echo "Creating $(VECTOR_TYPE) $@ vectors" - @if [[ "$*" =~ "to" ]] || [[ "$*" =~ "sqrt" ]] ; then level=2 ; else level=1 ; fi - @if [[ "$*" =~ "to_i" ]] || [[ "$*" =~ "to_u" ]] ; then exact="-exact" ; else exact="" ; fi - ${TESTFLOAT_GEN} -tininessafter -level $$level $$exact -$(ROUND_MODE) $(patsubst %_$(ROUND_EXT).tv, %, $@) > $@ - @sed -i 's/ /_/g' $@ - -# Appropriate testfloat_gen must exist -${TESTFLOAT_GEN}: - $(MAKE) -C ${TESTFLOAT_DIR} ${VECTOR_TYPE} - -clean: - rm -f *.tv - rm -f sed*