From 0923fb918f2f79c92fe8aa9e7b999d44bb38acb4 Mon Sep 17 00:00:00 2001 From: Corey Hickson Date: Wed, 20 Nov 2024 23:51:29 -0800 Subject: [PATCH 1/2] Add Endian covergroups to fcov --- config/rv32gc/coverage.svh | 3 +++ config/rv64gc/coverage.svh | 3 +++ 2 files changed, 6 insertions(+) diff --git a/config/rv32gc/coverage.svh b/config/rv32gc/coverage.svh index 93be70707..614cd5c3d 100644 --- a/config/rv32gc/coverage.svh +++ b/config/rv32gc/coverage.svh @@ -37,3 +37,6 @@ `include "ZicsrU_coverage.svh" `include "RV32VM_coverage.svh" `include "RV32VM_PMP_coverage.svh" +`include "EndianU_coverage.svh" +`include "EndianM_coverage.svh" +`include "EndianS_coverage.svh" \ No newline at end of file diff --git a/config/rv64gc/coverage.svh b/config/rv64gc/coverage.svh index 057e79898..07561b1de 100644 --- a/config/rv64gc/coverage.svh +++ b/config/rv64gc/coverage.svh @@ -36,6 +36,9 @@ `include "ZicsrM_coverage.svh" `include "ZicsrF_coverage.svh" `include "ZicsrU_coverage.svh" +`include "EndianU_coverage.svh" +`include "EndianM_coverage.svh" +`include "EndianS_coverage.svh" // `include "RV64VM_PMP_coverage.svh" // `include "RV64CBO_VM_coverage.svh" // `include "RV64CBO_PMP_coverage.svh" From 75ce5c8c99bae25dad53929095ebb8010001ca75 Mon Sep 17 00:00:00 2001 From: Georgia Tai Date: Thu, 21 Nov 2024 16:18:44 -0800 Subject: [PATCH 2/2] Code Coverage on Decompress unit --- tests/coverage/ifu.S | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tests/coverage/ifu.S b/tests/coverage/ifu.S index eaceb71ce..054f4f336 100644 --- a/tests/coverage/ifu.S +++ b/tests/coverage/ifu.S @@ -50,6 +50,11 @@ main: c.sb s1, 0(s0) // exercise c.sb c.sh s1, 0(s0) // exercise c.sh + .hword 0x2005 // line 110 + .hword 0x6101 // line 114 + .hword 0x6201 // line 115 + .hword 0x0202 // Illegal compressed instruction with op = 10, Instr[15:13] = 000, c.slli x4, 0. Line 151 illegal instruction + .hword 0x4002 // Illegal compressed instruction with op = 10, Instr[15:13] = 010, c.lwsp zero, 0. Line 158 illegal instruction .hword 0x8C44 // Illegal compressed instruction with op = 00, Instr[15:10] = 100011, Instr[6] = 1 and 0's everywhere else. Line 119 illegal instruction .hword 0x9C00 // Illegal compressed instruction with op = 00, Instr[15:10] = 100111, and 0's everywhere else. Line 119 illegal instruction