diff --git a/src/uncore/spi_controller.sv b/src/uncore/spi_controller.sv
index 983a9d83e..c4305047e 100644
--- a/src/uncore/spi_controller.sv
+++ b/src/uncore/spi_controller.sv
@@ -1,3 +1,34 @@
+///////////////////////////////////////////
+// spi_controller.sv
+//
+// Written: jacobpease@protonmail.com
+// Created: October 28th, 2024
+// Modified: 
+//
+// Purpose: Controller logic for SPI
+// 
+// Documentation: RISC-V System on Chip Design
+//
+// A component of the CORE-V-WALLY configurable RISC-V project.
+// https://github.com/openhwgroup/cvw
+// 
+// Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
+//
+// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+//
+// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file 
+// except in compliance with the License, or, at your option, the Apache License version 2.0. You 
+// may obtain a copy of the License at
+//
+// https://solderpad.org/licenses/SHL-2.1/
+//
+// Unless required by applicable law or agreed to in writing, any work distributed under the 
+// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, 
+// either express or implied. See the License for the specific language governing permissions 
+// and limitations under the License.
+////////////////////////////////////////////////////////////////////////////////////////////////
+
+
 module spi_controller (
   input logic        PCLK,
   input logic        PRESETn,