diff --git a/config/derivlist.txt b/config/derivlist.txt
index 01ad315e5..048adcb21 100644
--- a/config/derivlist.txt
+++ b/config/derivlist.txt
@@ -57,9 +57,9 @@ EXT_MEM_RANGE       64'h0FFFFFFF
 SDC_SUPPORTED       1
 PLIC_SDC_ID         32'd20
 BPRED_SIZE          32'd12
-RVVI_SYNTH_SUPPORTED 0
+RVVI_SYNTH_SUPPORTED 1
 RVVI_INIT_TIME_OUT  32'd100000000
-RVVI_PACKET_DELAY   32'd350
+RVVI_PACKET_DELAY   32'd400
 
 
 # The syn configurations are trimmed down for faster synthesis.  
diff --git a/fpga/constraints/small-debug-rvvi.xdc b/fpga/constraints/small-debug-rvvi.xdc
index 0441f4fa2..629cde561 100644
--- a/fpga/constraints/small-debug-rvvi.xdc
+++ b/fpga/constraints/small-debug-rvvi.xdc
@@ -1,5 +1,5 @@
 create_debug_core u_ila_0 ila
-set_property C_DATA_DEPTH 8192 [get_debug_cores u_ila_0]
+set_property C_DATA_DEPTH 4096 [get_debug_cores u_ila_0]
 set_property C_TRIGIN_EN true [get_debug_cores u_ila_0]
 set_property C_TRIGOUT_EN false [get_debug_cores u_ila_0]
 set_property C_INPUT_PIPE_STAGES 0 [get_debug_cores u_ila_0]