From a1c6bc854e9e046105522475ca5acf0d9670fdad Mon Sep 17 00:00:00 2001
From: Rose Thompson <ross1728@gmail.com>
Date: Thu, 29 Aug 2024 14:00:52 -0700
Subject: [PATCH] Fixed a subtle questa sim bug with imperasDV.  On some linux
 systems vsim will default to 32-bit mode rather than 64-bit, but the
 ImperasDV libraries are 64-bit.  vsim must run in 64-bit mode.

---
 .gitmodules        | 3 +++
 addins/riscvISACOV | 1 +
 bin/wsim           | 3 +++
 3 files changed, 7 insertions(+)
 create mode 160000 addins/riscvISACOV

diff --git a/.gitmodules b/.gitmodules
index 54ed892d3..72947808f 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -31,3 +31,6 @@
 [submodule "cvw-arch-verif"]
 	path = addins/cvw-arch-verif
 	url = https://github.com/openhwgroup/cvw-arch-verif
+[submodule "addins/riscvISACOV"]
+	path = addins/riscvISACOV
+	url = git@github.com:riscv-verification/riscvISACOV.git
diff --git a/addins/riscvISACOV b/addins/riscvISACOV
new file mode 160000
index 000000000..ac9fa2d38
--- /dev/null
+++ b/addins/riscvISACOV
@@ -0,0 +1 @@
+Subproject commit ac9fa2d386c0cb2f44e1e1e83a555d585034dfa3
diff --git a/bin/wsim b/bin/wsim
index cef7eca27..9867f7524 100755
--- a/bin/wsim
+++ b/bin/wsim
@@ -106,6 +106,9 @@ else:
     suffix = ""
 flags = suffix + " " + ImperasPlusArgs
 
+if((args.lockstep or args.fcov) and args.sim == "questa"):
+    prefix = "MTI_VCO_MODE=64 " + prefix
+
 # other flags
 if (args.ccov):
     flags += " --ccov"