From d06549b479a581ec2f2dd60d38bbfbc8f1b4ded2 Mon Sep 17 00:00:00 2001 From: Madeleine Masser-Frye <51804758+mmasserfrye@users.noreply.github.com> Date: Thu, 7 Jul 2022 15:52:01 +0000 Subject: [PATCH] updated synth flow to prevent runs from writing over each other's configs --- synthDC/Makefile | 32 ++++++++++++++++++++------------ synthDC/extractSummary.py | 6 +++--- synthDC/runAllSynths.sh | 10 +++++++--- synthDC/wallySynth.py | 28 +++++++++++++++++----------- 4 files changed, 47 insertions(+), 29 deletions(-) diff --git a/synthDC/Makefile b/synthDC/Makefile index 115302ec0..bef47e04c 100755 --- a/synthDC/Makefile +++ b/synthDC/Makefile @@ -6,20 +6,21 @@ NAME := synth # defaults export DESIGN ?= wallypipelinedcore export FREQ ?= 3000 -export CONFIG ?= rv32gc +export CONFIG ?= rv32e_FPUoff +TITLE = shreya # sky130 and sky90 presently supported -export TECH ?= tsmc28 +export TECH ?= sky90 # MAXCORES allows parallel compilation, which is faster but less CPU-efficient # Avoid when doing sweeps of many optimization points in parallel -export MAXCORES ?= 4 +export MAXCORES ?= 1 # MAXOPT turns on flattening, boundary optimization, and retiming # The output netlist is hard to interpret, but significantly better PPA -export MAXOPT ?= 1 +export MAXOPT ?= 0 export DRIVE ?= FLOP time := $(shell date +%F-%H-%M) hash := $(shell git rev-parse --short HEAD) -export OUTPUTDIR := newRuns/$(DESIGN)_$(CONFIG)_$(TECH)nm_$(FREQ)_MHz_$(time)_$(hash) +export OUTPUTDIR := newRuns/$(DESIGN)_$(CONFIG)_$(TECH)nm_$(FREQ)_MHz_$(time)_$(TITLE)_$(hash) export SAIFPOWER ?= 0 CONFIGDIR ?= ${WALLY}/pipelined/config @@ -50,9 +51,10 @@ rv%.log: rv% echo $< -DIRS = rv64gc rv32e rv32gc rv64ic rv32ic -# DELDIRS = rv32e rv32gc rv64ic rv64gc rv32ic -# CONFIGSUBDIRS = _FPUoff _noMulDiv _noVirtMem _PMP0 _PMP16 _orig +DIRS32 = rv32e rv32gc rv32ic +DIRS64 = rv64ic rv64gc +DIRS = $(DIRS32) $(DIRS64) + # bpred: # @$(foreach kval, $(k), rm -rf $(CONFIGDIR)/rv64gc_bpred_$(kval);) # @$(foreach kval, $(k), cp -r $(CONFIGDIR)/rv64gc $(CONFIGDIR)/rv64gc_bpred_$(kval);) @@ -63,15 +65,17 @@ copy: @$(foreach dir, $(DIRS), cp -r $(CONFIGDIR)/$(dir) $(CONFIGDIR)/$(dir)_orig;) @$(foreach dir, $(DIRS), sed -i 's/WAYSIZEINBYTES.*/WAYSIZEINBYTES 512/g' $(CONFIGDIR)/$(dir)_orig/wally-config.vh;) @$(foreach dir, $(DIRS), sed -i 's/NUMWAYS.*/NUMWAYS 1/g' $(CONFIGDIR)/$(dir)_orig/wally-config.vh;) - @$(foreach dir, $(DIRS), sed -i "s/RAM_RANGE.*/RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(dir)_orig/wally-config.vh ;) @$(foreach dir, $(DIRS), sed -i 's/BPRED_SIZE.*/BPRED_SIZE 5/g' $(CONFIGDIR)/$(dir)_orig/wally-config.vh;) + @$(foreach dir, $(DIRS32), sed -i "s/RAM_RANGE.*/RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(dir)_orig/wally-config.vh ;) + @$(foreach dir, $(DIRS64), sed -i "s/RAM_RANGE.*/RAM_RANGE 56\'h01FF/g" $(CONFIGDIR)/$(dir)_orig/wally-config.vh ;) + del: rm -rf $(CONFIGDIR)/*_* configs: $(DIRS) -$(DIRS): +$(DIRS): #turn off FPU rm -rf $(CONFIGDIR)/$@_FPUoff cp -r $(CONFIGDIR)/$@_orig $(CONFIGDIR)/$@_FPUoff @@ -104,10 +108,10 @@ freqs: allsynth: $(CONFIGFILESTRIM) $(CONFIGFILESTRIM): - make synth DESIGN=wallypipelinedcore CONFIG=$@ TECH=sky90 FREQ=1000 MAXCORES=1 + make synth DESIGN=wallypipelinedcore CONFIG=$@ TECH=sky90 FREQ=3000 MAXCORES=1 -synth: +synth: clean @echo "DC Synthesis" @mkdir -p hdl/ @mkdir -p $(OUTPUTDIR) @@ -129,5 +133,9 @@ clean: rm -f Synopsys_stack_trace_*.txt rm -f crte_*.txt +fresh: + rm -rf WORK + rm -f hdl/* + diff --git a/synthDC/extractSummary.py b/synthDC/extractSummary.py index a2f6a9b50..5f0d50156 100755 --- a/synthDC/extractSummary.py +++ b/synthDC/extractSummary.py @@ -158,11 +158,11 @@ def areaDelay(tech, freq, width=None, config=None, special=None): # ending freq in 42 means fpu was turned off manually if __name__ == '__main__': - # synthsintocsv() + synthsintocsv() synthsfromcsv('Summary.csv') freqPlot('tsmc28', 'rv32', 'e') freqPlot('sky90', 'rv32', 'e') areaDelay('tsmc28', testFreq[1], width= 'rv64', config='gc') - areaDelay('tsmc28', testFreq[1], special='') areaDelay('sky90', testFreq[0], width='rv64', config='gc') - areaDelay('sky90', testFreq[0], special='') \ No newline at end of file + areaDelay('tsmc28', testFreq[1], special='FPUoff') + areaDelay('sky90', testFreq[0], special='FPUoff') \ No newline at end of file diff --git a/synthDC/runAllSynths.sh b/synthDC/runAllSynths.sh index 6944552d4..bd3c036a7 100755 --- a/synthDC/runAllSynths.sh +++ b/synthDC/runAllSynths.sh @@ -1,7 +1,11 @@ #!/usr/bin/bash make clean -mv runs runArchive/$(date +"%Y_%m_%d_%I_%M_%p") -mv newRuns runs -mkdir newRuns +# mv runs runArchive/$(date +"%Y_%m_%d_%I_%M_%p") +# mv newRuns runs +# mkdir newRuns +make del +make copy +make configs + ./wallySynth.py \ No newline at end of file diff --git a/synthDC/wallySynth.py b/synthDC/wallySynth.py index 99d70e813..66f09e26e 100755 --- a/synthDC/wallySynth.py +++ b/synthDC/wallySynth.py @@ -3,31 +3,37 @@ import subprocess from multiprocessing import Pool +import time def runCommand(config, tech, freq): - command = "make synth DESIGN=wallypipelinedcore CONFIG={} TECH={} DRIVE=FLOP FREQ={} MAXOPT=0 MAXCORES=1".format(config, tech, freq) - subprocess.Popen(command, shell=True) + commands = ["make fresh", "make synth DESIGN=wallypipelinedcore CONFIG={} TECH={} DRIVE=FLOP FREQ={} MAXOPT=0 MAXCORES=1".format(config, tech, freq)] + for c in commands: + subprocess.Popen(c, shell=True) + time.sleep(60) testFreq = [3000, 10000] if __name__ == '__main__': techs = ['sky90', 'tsmc28'] - sweepCenter = [870, 3000] + sweepCenter = [870, 2940] synthsToRun = [] arr = [-8, -6, -4, -2, 0, 2, 4, 6, 8] - for i in [0, 1]: + pool = Pool() + + for i in [0]: tech = techs[i] sc = sweepCenter[i] f = testFreq[i] - for freq in [round(sc+sc*x/100) for x in arr]: # rv32e freq sweep - synthsToRun += [['rv32e', tech, freq]] - for config in ['rv32gc', 'rv32ic', 'rv64gc', 'rv64i', 'rv64ic', 'rv32e']: # configs - synthsToRun += [[config, tech, f]] - for mod in ['FPUoff', 'noMulDiv', 'noPriv', 'PMP0', 'PMP16']: # rv64gc path variations + # for freq in [round(sc+sc*x/100) for x in arr]: # rv32e freq sweep + # synthsToRun += [['rv32e', tech, freq]] + # for config in ['rv32gc', 'rv32ic', 'rv64gc', 'rv64ic', 'rv32e']: # configs + # config = config + '_FPUoff' # while FPU under rennovation + # synthsToRun += [[config, tech, f]] + for mod in ['noMulDiv', 'noPriv', 'PMP0', 'PMP16']: # rv64gc path variations config = 'rv64gc_' + mod synthsToRun += [[config, tech, f]] - pool = Pool() - pool.starmap(runCommand, synthsToRun) \ No newline at end of file + for x in synthsToRun: + pool.starmap(runCommand, [x]) \ No newline at end of file