From d130a7861653a7a0516db8ba7b8ac7297b6da226 Mon Sep 17 00:00:00 2001 From: David Harris Date: Wed, 20 Dec 2023 16:29:03 -0800 Subject: [PATCH] Updated to current version of toolchain and prepare to be able to compile Zcb and Zicboz when supported --- bin/wally-tool-chain-install.sh | 8 ++++---- tests/riscof/Makefile | 2 +- tests/riscof/spike/riscof_spike.py | 8 ++++++++ tests/riscof/spike/spike_rv32gc_isa.yaml | 3 ++- tests/riscof/spike/spike_rv64gc_isa.yaml | 3 ++- 5 files changed, 17 insertions(+), 7 deletions(-) diff --git a/bin/wally-tool-chain-install.sh b/bin/wally-tool-chain-install.sh index a440a5a33..ef2f9bcc7 100755 --- a/bin/wally-tool-chain-install.sh +++ b/bin/wally-tool-chain-install.sh @@ -69,9 +69,9 @@ cd $RISCV git clone https://github.com/riscv/riscv-gnu-toolchain cd riscv-gnu-toolchain # Temporarily use the following commands until gcc-13 is part of riscv-gnu-toolchain (issue #1249) -git clone https://github.com/gcc-mirror/gcc -b releases/gcc-13 gcc-13 -./configure --prefix=/opt/riscv --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" --with-gcc-src=`pwd`/gcc-13 -#./configure --prefix=${RISCV} --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" +#git clone https://github.com/gcc-mirror/gcc -b releases/gcc-13 gcc-13 +#./configure --prefix=/opt/riscv --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" --with-gcc-src=`pwd`/gcc-13 +./configure --prefix=${RISCV} --with-multilib-generator="rv32e-ilp32e--;rv32i-ilp32--;rv32im-ilp32--;rv32iac-ilp32--;rv32imac-ilp32--;rv32imafc-ilp32f--;rv32imafdc-ilp32d--;rv64i-lp64--;rv64ic-lp64--;rv64iac-lp64--;rv64imac-lp64--;rv64imafdc-lp64d--;rv64im-lp64--;" make -j ${NUM_THREADS} # elf2hex (https://github.com/sifive/elf2hex) @@ -165,7 +165,7 @@ sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV64 /usr/bin/riscv_sim_RV64 sudo ln -sf $RISCV/sail-riscv/c_emulator/riscv_sim_RV32 /usr/bin/riscv_sim_RV32 # riscof -sudo pip3 install testresources +sudo pip3 install -U testresources riscv_config pip3 install git+https://github.com/riscv/riscof.git # Download OSU Skywater 130 cell library diff --git a/tests/riscof/Makefile b/tests/riscof/Makefile index 25a579dae..a9855d41f 100644 --- a/tests/riscof/Makefile +++ b/tests/riscof/Makefile @@ -8,7 +8,7 @@ wally_workdir = $(work)/wally-riscv-arch-test current_dir = $(shell pwd) #XLEN ?= 64 -all: root arch32e arch32 wally32 arch64 wally64 +all: root arch32 wally32 arch32e arch64 wally64 wally-riscv-arch-test: root wally32 wally64 root: diff --git a/tests/riscof/spike/riscof_spike.py b/tests/riscof/spike/riscof_spike.py index 5f6ca3f74..6b2e6267d 100644 --- a/tests/riscof/spike/riscof_spike.py +++ b/tests/riscof/spike/riscof_spike.py @@ -109,6 +109,14 @@ class spike(pluginTemplate): self.isa += 'd' if "C" in ispec["ISA"]: self.isa += 'c' + if "Zicsr" in ispec["ISA"]: + self.isa += '_Zicsr' + if "Zicboz" in ispec["ISA"]: + self.isa += '_Zicboz' + if "Zca" in ispec["ISA"]: + self.isa += '_Zca' + if "Zcb" in ispec["ISA"]: + self.isa += '_Zcb' if "Zba" in ispec["ISA"]: self.isa += '_Zba' if "Zbb" in ispec["ISA"]: diff --git a/tests/riscof/spike/spike_rv32gc_isa.yaml b/tests/riscof/spike/spike_rv32gc_isa.yaml index 9e1b32c55..b7bba15d5 100644 --- a/tests/riscof/spike/spike_rv32gc_isa.yaml +++ b/tests/riscof/spike/spike_rv32gc_isa.yaml @@ -1,6 +1,7 @@ hart_ids: [0] hart0: - ISA: RV32IMAFDCZicsr_Zicboz_Zifencei_Zba_Zbb_Zbc_Zbs + ISA: RV32IMAFDCZicsr_Zifencei_Zba_Zbb_Zbc_Zbs +# ISA: RV32IMAFDCZicsr_Zicboz_Zifencei_Zca_Zba_Zbb_Zbc_Zbs # _Zbkb_Zcb physical_addr_sz: 32 User_Spec_Version: '2.3' supported_xlen: [32] diff --git a/tests/riscof/spike/spike_rv64gc_isa.yaml b/tests/riscof/spike/spike_rv64gc_isa.yaml index 4869d6849..9730b6d77 100644 --- a/tests/riscof/spike/spike_rv64gc_isa.yaml +++ b/tests/riscof/spike/spike_rv64gc_isa.yaml @@ -1,6 +1,7 @@ hart_ids: [0] hart0: - ISA: RV64IMAFDCSUZicsr_Zicboz_Zifencei_Zba_Zbb_Zbc_Zbs +# ISA: RV64IMAFDCSUZicsr_Zicboz_Zifencei_Zca_Zba_Zbb_Zbc_Zbs # Zkbs_Zcb + ISA: RV64IMAFDCSUZicsr_Zifencei_Zbb_Zbc_Zbs # Zkbs_Zcb physical_addr_sz: 56 User_Spec_Version: '2.3' supported_xlen: [64]