From e8dde265be782d89080036a8d4805e46d09fbc82 Mon Sep 17 00:00:00 2001 From: David Harris Date: Fri, 26 Jan 2024 16:14:36 -0800 Subject: [PATCH] More coverage: CacheWay --- sim/coverage-exclusions-rv64gc.do | 2 ++ src/cache/cacheway.sv | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/sim/coverage-exclusions-rv64gc.do b/sim/coverage-exclusions-rv64gc.do index 06e1b6e9f..e39128f5a 100644 --- a/sim/coverage-exclusions-rv64gc.do +++ b/sim/coverage-exclusions-rv64gc.do @@ -109,6 +109,8 @@ coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/cachefsm -linerange [Get set numcacheways 4 for {set i 0} {$i < $numcacheways} {incr i} { coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: dcache invalidateway"] -item bes 1 -fecexprrow 4 + # InvalidateCacheDelay is always 0 for D$ because it is flushed, not invalidated + coverage exclude -scope /dut/core/lsu/bus/dcache/dcache/CacheWays[$i] -linerange [GetLineNum ../src/cache/cacheway.sv "exclusion-tag: dcache HitWay"] -item 3 1 -fecexprrow 2 # FlushStage=1 will never happen when SetValidWay=1 since a pipeline stall is asserted by the cache in the fetch stage, which happens before # going into the WRITE_LINE state (and asserting SetValidWay). No TrapM can fire and since StallW is high, a stallM caused by WFIStallM would not cause a flushW. diff --git a/src/cache/cacheway.sv b/src/cache/cacheway.sv index cd9d08687..9c5523cec 100644 --- a/src/cache/cacheway.sv +++ b/src/cache/cacheway.sv @@ -122,7 +122,7 @@ module cacheway import cvw::*; #(parameter cvw_t P, assign TagWay = SelData ? ReadTag : '0; // AND part of AOMux assign HitDirtyWay = Dirty & ValidWay; assign DirtyWay = SelDirty & HitDirtyWay; // exclusion-tag: icache DirtyWay - assign HitWay = ValidWay & (ReadTag == PAdr[PA_BITS-1:OFFSETLEN+INDEXLEN]) & ~InvalidateCacheDelay; + assign HitWay = ValidWay & (ReadTag == PAdr[PA_BITS-1:OFFSETLEN+INDEXLEN]) & ~InvalidateCacheDelay; // exclusion-tag: dcache HitWay flop #(1) InvalidateCacheReg(clk, InvalidateCache, InvalidateCacheDelay);