From ed0c826d74504c8a8a1eb92372d3542f1cdd89b4 Mon Sep 17 00:00:00 2001
From: Jacob Pease <jacobpease@protonmail.com>
Date: Thu, 8 Aug 2024 13:50:11 -0500
Subject: [PATCH] Turned off RVVI by default.

---
 fpga/src/fpgaTopArtyA7.sv | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/fpga/src/fpgaTopArtyA7.sv b/fpga/src/fpgaTopArtyA7.sv
index fa2aa59a9..9133baa25 100644
--- a/fpga/src/fpgaTopArtyA7.sv
+++ b/fpga/src/fpgaTopArtyA7.sv
@@ -28,7 +28,7 @@
 
 import cvw::*;
 
-module fpgaTop #(parameter logic RVVI_SYNTH_SUPPORTED = 1)
+module fpgaTop #(parameter logic RVVI_SYNTH_SUPPORTED = 0)
   (input           default_100mhz_clk,
 (* mark_debug = "true" *)   input           resetn,
    input           south_reset,