diff --git a/bin/regression-wally b/bin/regression-wally index e0951de9d..297855377 100755 --- a/bin/regression-wally +++ b/bin/regression-wally @@ -488,12 +488,11 @@ def selectTests(args, sims, coverStr): addTests(tests_buildrootbootlockstep, lockstepsim, coverStr, configs) # lockstep with Questa and ImperasDV runs overnight # only run RV64GC tests on in code coverage mode if args.ccov: - addTestsByDir(f"{archVerifDir}/tests/rv64/", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) addTestsByDir(f"{archVerifDir}/tests/priv/rv64/", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) # doesn't help coverage much dh 4/12/25 - addTestsByDir(WALLY+"/tests/coverage/", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) - # Extra tests from riscv-arch-test that should be run as part of the functional coverage suite addTestsByDir(f"{WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/pmp", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) addTestsByDir(f"{WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) + addTestsByDir(f"{archVerifDir}/tests/rv64/", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) + addTestsByDir(WALLY+"/tests/coverage/", "rv64gc", coveragesim, coverStr, configs, lockstepMode=1) # run tests in lockstep in functional coverage mode if args.fcov or args.nightly: addTestsByDir(f"{archVerifDir}/tests/rv32/", "rv32gc", coveragesim, coverStr, configs, lockstepMode=1) diff --git a/testbench/common/riscvassertions.sv b/testbench/common/riscvassertions.sv index 0d90a6de7..4c4d873fc 100644 --- a/testbench/common/riscvassertions.sv +++ b/testbench/common/riscvassertions.sv @@ -32,6 +32,7 @@ module riscvassertions import cvw::*; #(parameter cvw_t P); assert (P.F_SUPPORTED | !P.ZFH_SUPPORTED) else $fatal(1, "Can't support half-precision fp (ZFH) without supporting float (F)"); assert (P.DCACHE_SUPPORTED | !P.F_SUPPORTED | P.FLEN <= P.XLEN) else $fatal(1, "Data cache required to support FLEN > XLEN because AHB/DTIM bus width is XLEN"); assert (P.I_SUPPORTED ^ P.E_SUPPORTED) else $fatal(1, "Exactly one of I and E must be supported"); + assert (P.S_SUPPORTED | P.VIRTMEM_SUPPORTED == 0) else $fatal(1, "Virtual memory requires S mode support"); assert (P.DCACHE_WAYSIZEINBYTES <= 4096 | (!P.DCACHE_SUPPORTED) | P.VIRTMEM_SUPPORTED == 0) else $fatal(1, "DCACHE_WAYSIZEINBYTES cannot exceed 4 KiB when caches and virtual memory is enabled (to prevent aliasing)"); assert (P.DCACHE_LINELENINBITS >= 128 | (!P.DCACHE_SUPPORTED)) else $fatal(1, "DCACHE_LINELENINBITS must be at least 128 when caches are enabled"); assert (P.DCACHE_LINELENINBITS < P.DCACHE_WAYSIZEINBYTES*8) else $fatal(1, "DCACHE_LINELENINBITS must be smaller than way size"); diff --git a/testbench/tests.vh b/testbench/tests.vh index 7d60cb0c1..e41b419fd 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -153,25 +153,25 @@ string arch32pmp[] = '{ `RISCVARCHTEST, "rv32i_m/pmp32/src/pmp-CFG-reg.S", "rv32i_m/pmp32/src/pmp-CSR-access.S", - "rv32i_m/pmp32/src/pmp-NA4-R-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NA4-R-priority.S", - "rv32i_m/pmp32/src/pmp-NA4-R.S", - "rv32i_m/pmp32/src/pmp-NA4-RW-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NA4-RW-priority.S", - "rv32i_m/pmp32/src/pmp-NA4-RW.S", + //"rv32i_m/pmp32/src/pmp-NA4-R-priority-level-2.S", *** restore when BLOCKED is removed after tests work with G > 0 + //"rv32i_m/pmp32/src/pmp-NA4-R-priority.S", + //"rv32i_m/pmp32/src/pmp-NA4-R.S", + //"rv32i_m/pmp32/src/pmp-NA4-RW-priority-level-2.S", + //"rv32i_m/pmp32/src/pmp-NA4-RW-priority.S", + //"rv32i_m/pmp32/src/pmp-NA4-RW.S", "rv32i_m/pmp32/src/pmp-NA4-RWX.S", - "rv32i_m/pmp32/src/pmp-NA4-RX-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NA4-RX-priority.S", - "rv32i_m/pmp32/src/pmp-NA4-RX.S", - "rv32i_m/pmp32/src/pmp-NA4-X-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NA4-X-priority.S", - "rv32i_m/pmp32/src/pmp-NA4-X.S", - "rv32i_m/pmp32/src/pmp-NAPOT-R-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NAPOT-R-priority.S", - "rv32i_m/pmp32/src/pmp-NAPOT-R.S", - "rv32i_m/pmp32/src/pmp-NAPOT-RW-priority-level-2.S", - "rv32i_m/pmp32/src/pmp-NAPOT-RW-priority.S", - "rv32i_m/pmp32/src/pmp-NAPOT-RW.S", + //"rv32i_m/pmp32/src/pmp-NA4-RX-priority-level-2.S", + //"rv32i_m/pmp32/src/pmp-NA4-RX-priority.S", + //"rv32i_m/pmp32/src/pmp-NA4-RX.S", + //"rv32i_m/pmp32/src/pmp-NA4-X-priority-level-2.S", + //"rv32i_m/pmp32/src/pmp-NA4-X-priority.S", + //"rv32i_m/pmp32/src/pmp-NA4-X.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-R-priority-level-2.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-R-priority.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-R.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-RW-priority-level-2.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-RW-priority.S", + //"rv32i_m/pmp32/src/pmp-NAPOT-RW.S", "rv32i_m/pmp32/src/pmp-NAPOT-RWX.S", "rv32i_m/pmp32/src/pmp-NAPOT-RX-priority-level-2.S", "rv32i_m/pmp32/src/pmp-NAPOT-RX-priority.S", @@ -197,10 +197,10 @@ string arch32pmp[] = '{ string arch64pmp[] = '{ `RISCVARCHTEST, "rv64i_m/pmp/src/pmp64-CSR-ALL-MODES.S", - "rv64i_m/pmp/src/pmp64-NA4-M.S", - "rv64i_m/pmp/src/pmp64-NA4-S.S", - "rv64i_m/pmp/src/pmp64-NA4-U.S", - "rv64i_m/pmp/src/pmp64-NAPOT-M.S", + //"rv64i_m/pmp/src/pmp64-NA4-M.S", *** restore when PMP tests work with G > 0 + //"rv64i_m/pmp/src/pmp64-NA4-S.S", + //"rv64i_m/pmp/src/pmp64-NA4-U.S", + //"rv64i_m/pmp/src/pmp64-NAPOT-M.S", "rv64i_m/pmp/src/pmp64-NAPOT-S.S", "rv64i_m/pmp/src/pmp64-NAPOT-U.S", "rv64i_m/pmp/src/pmp64-TOR-M.S", @@ -213,8 +213,8 @@ string arch32vm_sv32[] = '{ "rv32i_m/vm_sv32/src/mstatus_tvm_test.S", "rv32i_m/vm_sv32/src/pmp_check_on_pa_S_mode.S", "rv32i_m/vm_sv32/src/pmp_check_on_pa_U_mode.S", - "rv32i_m/vm_sv32/src/pmp_check_on_pte_S_mode.S", - "rv32i_m/vm_sv32/src/pmp_check_on_pte_U_mode.S", + //"rv32i_m/vm_sv32/src/pmp_check_on_pte_S_mode.S", *** restore when PMP tests work with G > 0 + //"rv32i_m/vm_sv32/src/pmp_check_on_pte_U_mode.S", "rv32i_m/vm_sv32/src/satp_access_tests.S", "rv32i_m/vm_sv32/src/vm_A_and_D_S_mode.S", "rv32i_m/vm_sv32/src/vm_A_and_D_U_mode.S",