diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile
index 551e4aca7..8dff84a49 100644
--- a/fpga/generator/Makefile
+++ b/fpga/generator/Makefile
@@ -2,7 +2,7 @@ dst := IP
 # vcu118
 #export XILINX_PART := xcvu9p-flga2104-2L-e
 #export XILINX_BOARD := xilinx.com:vcu118:part0:2.4
-#export FREQ := 30
+#export board := vcu118
 
 # vcu108
 export XILINX_PART := xcvu095-ffva2104-2-e
@@ -13,7 +13,7 @@ export board := vcu108
 all: FPGA
 
 FPGA: IP
-	vivado -mode batch -source wally.tcl 2>&1 | tee wally.log
+	vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
 
 IP: $(dst)/xlnx_proc_sys_reset.log \
 	$(dst)/xlnx_ddr4-$(board).log \