# Textbook Errata

This document contains errata for [RISC-V System-on-Chip Design](https://www.amazon.com/RISC-V-Microprocessor-System-Chip-Design/dp/0323994989) published by Elsevier.

Please contribute by making a pull request to modify this document on GitHub.  Sort the errata by page number. Keep the correction as succinct as possible. 

Sample Errata

| Page | Location | Error | Correction  | Contributor |
| ---- | -------- | ----- | ----------- | ----------- |
| 42   | Fig 1.42 | foobar | FooBar | Ben Bitdiddle, Claremont, CA |