From d16ffe250ef49f55590500dd6ad80f480a700fdc Mon Sep 17 00:00:00 2001 From: Douglas Santos Date: Thu, 10 Mar 2022 19:29:18 +0100 Subject: [PATCH] Removed board part definition in Xilinx project creation script --- script/project.tcl | 1 - 1 file changed, 1 deletion(-) diff --git a/script/project.tcl b/script/project.tcl index 2e0caee..2873118 100644 --- a/script/project.tcl +++ b/script/project.tcl @@ -168,7 +168,6 @@ set proj_dir [get_property directory [current_project]] # Set project properties set obj [current_project] -set_property -name "board_part" -value "em.avnet.com:zed:part0:1.4" -objects $obj set_property -name "default_lib" -value "xil_defaultlib" -objects $obj set_property -name "enable_vhdl_2008" -value "1" -objects $obj set_property -name "ip_cache_permissions" -value "read write" -objects $obj