From 0335b69e26b280a10be990fb58ae043ff469f1a7 Mon Sep 17 00:00:00 2001 From: Philipp Wagner Date: Fri, 3 Jul 2020 17:22:54 +0100 Subject: [PATCH] Clean up Verilator sections in core files - The "PINCONNECTEMPTY" waiver is part of our normal waiver file, no need to add it to the tool invocation. - Recent versions of Verilator choose good defaults for MAKE_OPTS, passing it explicitly overrides the settings. - All Verilator code is now lint clean, we can remove `-Wno-fatal`. - FST traces are not much slower then VCD traces any more in recent Verilator versions, remove the respective comment. - Align comment about the compile/sim time for tracing with other files and OpenTitan. --- dv/cs_registers/tb_cs_registers.core | 10 ---------- dv/riscv_compliance/ibex_riscv_compliance.core | 10 ---------- examples/simple_system/ibex_simple_system.core | 15 +++------------ 3 files changed, 3 insertions(+), 32 deletions(-) diff --git a/dv/cs_registers/tb_cs_registers.core b/dv/cs_registers/tb_cs_registers.core index 9f829142..647b0436 100644 --- a/dv/cs_registers/tb_cs_registers.core +++ b/dv/cs_registers/tb_cs_registers.core @@ -118,19 +118,9 @@ targets: # huge influence on runtime performance. - '--trace' - '--trace-fst' # this requires -DVM_TRACE_FMT_FST in CFLAGS below! - # Remove FST options for VCD trace (~100 x faster but larger files) - '--trace-structs' - '--trace-params' - '--trace-max-array 1024' - '-CFLAGS "-std=c++14 -Wall -DTOPLEVEL_NAME=tb_cs_registers -DVM_TRACE_FMT_FST -g"' - '-LDFLAGS "-pthread -lutil -lelf"' - "-Wall" - - "-Wno-PINCONNECTEMPTY" - # XXX: Cleanup all warnings and remove this option - # (or make it more fine-grained at least) - - "-Wno-fatal" - make_options: - # Optimization levels have a large impact on the runtime performance - # of the simulation model. -O2 and -O3 are pretty similar, -Os is - # slower than -O2/-O3 - - OPT_FAST="-O2" diff --git a/dv/riscv_compliance/ibex_riscv_compliance.core b/dv/riscv_compliance/ibex_riscv_compliance.core index b9b7ecb1..8ce6e479 100644 --- a/dv/riscv_compliance/ibex_riscv_compliance.core +++ b/dv/riscv_compliance/ibex_riscv_compliance.core @@ -103,19 +103,9 @@ targets: # huge influence on runtime performance. - '--trace' - '--trace-fst' # this requires -DVM_TRACE_FMT_FST in CFLAGS below! - # Remove FST options for VCD trace (~100 x faster but larger files) - '--trace-structs' - '--trace-params' - '--trace-max-array 1024' - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=ibex_riscv_compliance -g"' - '-LDFLAGS "-pthread -lutil -lelf"' - "-Wall" - - "-Wno-PINCONNECTEMPTY" - # XXX: Cleanup all warnings and remove this option - # (or make it more fine-grained at least) - - "-Wno-fatal" - make_options: - # Optimization levels have a large impact on the runtime performance - # of the simulation model. -O2 and -O3 are pretty similar, -Os is - # slower than -O2/-O3 - - OPT_FAST="-O2" diff --git a/examples/simple_system/ibex_simple_system.core b/examples/simple_system/ibex_simple_system.core index 9e69c53e..1f56cb83 100644 --- a/examples/simple_system/ibex_simple_system.core +++ b/examples/simple_system/ibex_simple_system.core @@ -123,25 +123,16 @@ targets: verilator: mode: cc verilator_options: -# Disabling tracing reduces compile times by multiple times, but doesn't have a -# huge influence on runtime performance. (Based on early observations.) + # Disabling tracing reduces compile times but doesn't have a + # huge influence on runtime performance. - '--trace' - '--trace-fst' # this requires -DVM_TRACE_FMT_FST in CFLAGS below! - '--trace-structs' - '--trace-params' - '--trace-max-array 1024' -# compiler flags -# -# -O -# Optimization levels have a large impact on the runtime performance of the -# simulation model. -O2 and -O3 are pretty similar, -Os is slower than -O2/-O3 - - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=ibex_simple_system -g -O0"' + - '-CFLAGS "-std=c++11 -Wall -DVM_TRACE_FMT_FST -DTOPLEVEL_NAME=ibex_simple_system -g"' - '-LDFLAGS "-pthread -lutil -lelf"' - "-Wall" - - "-Wno-PINCONNECTEMPTY" - # XXX: Cleanup all warnings and remove this option - # (or make it more fine-grained at least) - - "-Wno-fatal" # RAM primitives wider than 64bit (required for ECC) fail to build in # Verilator without increasing the unroll count (see Verilator#1266) - "--unroll-count 72"