diff --git a/dv/uvm/core_ibex/env/core_ibex_env_cfg.sv b/dv/uvm/core_ibex/env/core_ibex_env_cfg.sv
index 1b051735..fb0e73b7 100644
--- a/dv/uvm/core_ibex/env/core_ibex_env_cfg.sv
+++ b/dv/uvm/core_ibex/env/core_ibex_env_cfg.sv
@@ -9,6 +9,7 @@ class core_ibex_env_cfg extends uvm_object;
   bit                           enable_irq_nmi_seq;
   bit                           enable_nested_irq;
   bit                           enable_debug_seq;
+  bit                           disable_fetch_enable_seq;
   bit                           disable_cosim;
   bit[31:0]                     max_interval;
   bit                           require_signature_addr;
@@ -22,6 +23,7 @@ class core_ibex_env_cfg extends uvm_object;
     `uvm_field_int(enable_irq_nmi_seq,   UVM_DEFAULT)
     `uvm_field_int(enable_nested_irq, UVM_DEFAULT)
     `uvm_field_int(enable_debug_seq, UVM_DEFAULT)
+    `uvm_field_int(disable_fetch_enable_seq, UVM_DEFAULT)
     `uvm_field_int(disable_cosim, UVM_DEFAULT)
     `uvm_field_int(max_interval, UVM_DEFAULT)
     `uvm_field_int(require_signature_addr, UVM_DEFAULT)
@@ -36,6 +38,7 @@ class core_ibex_env_cfg extends uvm_object;
     void'($value$plusargs("enable_irq_nmi_seq=%0d", enable_irq_nmi_seq));
     void'($value$plusargs("enable_nested_irq=%0d", enable_nested_irq));
     void'($value$plusargs("enable_debug_seq=%0d", enable_debug_seq));
+    void'($value$plusargs("disable_fetch_enable_seq=%0d", disable_fetch_enable_seq));
     void'($value$plusargs("disable_cosim=%0d", disable_cosim));
     void'($value$plusargs("max_interval=%0d", max_interval));
     void'($value$plusargs("require_signature_addr=%0d", require_signature_addr));
diff --git a/dv/uvm/core_ibex/tests/core_ibex_vseq.sv b/dv/uvm/core_ibex/tests/core_ibex_vseq.sv
index 363b110d..cfb156d3 100644
--- a/dv/uvm/core_ibex/tests/core_ibex_vseq.sv
+++ b/dv/uvm/core_ibex/tests/core_ibex_vseq.sv
@@ -17,6 +17,7 @@ class core_ibex_vseq extends uvm_sequence;
   irq_drop_seq                                  irq_drop_seq_h;
   debug_seq                                     debug_seq_stress_h;
   debug_seq                                     debug_seq_single_h;
+  fetch_enable_seq                              fetch_enable_seq_h;
   core_ibex_env_cfg                             cfg;
   bit[ibex_mem_intf_agent_pkg::DATA_WIDTH-1:0]  data;
 
@@ -35,8 +36,17 @@ class core_ibex_vseq extends uvm_sequence;
     instr_intf_seq.m_mem = mem;
     data_intf_seq.m_mem  = mem;
     fork
-       instr_intf_seq.start(p_sequencer.instr_if_seqr);
-       data_intf_seq.start(p_sequencer.data_if_seqr);
+      instr_intf_seq.start(p_sequencer.instr_if_seqr);
+      data_intf_seq.start(p_sequencer.data_if_seqr);
+
+      if (!cfg.disable_fetch_enable_seq) begin
+        fetch_enable_seq_h = fetch_enable_seq::type_id::create("fetch_enable_seq_h");
+        fetch_enable_seq_h.iteration_modes = InfiniteRuns;
+        fetch_enable_seq_h.stimulus_delay_cycles_min = 1000;
+        fetch_enable_seq_h.stimulus_delay_cycles_max = 2000;
+
+        fetch_enable_seq_h.start(null);
+      end
     join_none
   endtask // pre_body