diff --git a/zeroriscy_controller.sv b/zeroriscy_controller.sv
index b2fd17bf..440e624e 100644
--- a/zeroriscy_controller.sv
+++ b/zeroriscy_controller.sv
@@ -124,7 +124,7 @@ module zeroriscy_controller
   // FSM state encoding
   enum  logic [3:0] { RESET, BOOT_SET, WAIT_SLEEP, SLEEP, FIRST_FETCH,
                       DECODE, FLUSH, IRQ_TAKEN,
-                      DBG_SIGNAL, DBG_SIGNAL_SLEEP, DBG_WAIT, DBG_WAIT_BRANCH, DBG_WAIT_SLEEP } ctrl_fsm_cs, ctrl_fsm_ns;
+                      DBG_SIGNAL, DBG_SIGNAL_SLEEP, DBG_WAIT, DBG_WAIT_BRANCH } ctrl_fsm_cs, ctrl_fsm_ns;
 
   logic irq_enable_int;
 
@@ -362,23 +362,6 @@ module zeroriscy_controller
         ctrl_fsm_ns = DBG_WAIT;
       end
 
-      // The Debugger is active in this state
-      // we wait until it is done and go back to SLEEP
-      DBG_WAIT_SLEEP:
-      begin
-        halt_if_o = 1'b1;
-
-        if (dbg_jump_req_i) begin
-          pc_mux_o     = PC_DBG_NPC;
-          pc_set_o     = 1'b1;
-          ctrl_fsm_ns  = DBG_WAIT;
-        end
-
-        if (dbg_stall_i == 1'b0) begin
-          ctrl_fsm_ns = SLEEP;
-        end
-      end
-
       // The Debugger is active in this state
       // we wait until it is done and go back to DECODE
       DBG_WAIT: