diff --git a/controller.sv b/controller.sv
index 5be573be..f9a64454 100644
--- a/controller.sv
+++ b/controller.sv
@@ -47,7 +47,6 @@ module controller
   input  logic                     instr_ack_i,                // Acknow from instr memory or cache (means that data is available)
 
   output logic [2:0]               pc_mux_sel_o,               // Selector in the Fetch stage to select the rigth PC (normal, jump ...)
-  output logic                     pc_mux_boot_o,              // load boot address as PC, goes to the IF stage
 
   // ALU signals
   output logic [`ALU_OP_WIDTH-1:0] alu_operator_o,             // Operator in the Ex stage for the ALU block
diff --git a/id_stage.sv b/id_stage.sv
index 851f114f..658880eb 100644
--- a/id_stage.sv
+++ b/id_stage.sv
@@ -54,7 +54,6 @@ module id_stage
     // IF and ID stage signals
     output logic                        compressed_instr_o,
     output logic [2:0]                  pc_mux_sel_o,
-    output logic                        pc_mux_boot_o,
     output logic [1:0]                  exc_pc_mux_o,
     output logic                        force_nop_o,
 
@@ -543,7 +542,6 @@ module id_stage
       .instr_gnt_i                  ( instr_gnt_i           ),
       .instr_ack_i                  ( instr_ack_i           ),
       .pc_mux_sel_o                 ( pc_mux_sel_int        ),
-      .pc_mux_boot_o                ( pc_mux_boot_o         ),
 
       // Alu signals
       .alu_operator_o               ( alu_operator          ),
diff --git a/if_stage.sv b/if_stage.sv
index fb19bff4..743d7d2c 100644
--- a/if_stage.sv
+++ b/if_stage.sv
@@ -63,7 +63,6 @@ module if_stage
     input  logic [31:0] exception_pc_reg_i,    // address used to restore PC when the interrupt/exception is served
     input  logic [31:0] pc_from_hwloop_i,      // pc from hwloop start addr
     input  logic  [2:0] pc_mux_sel_i,          // sel for pc multiplexer
-    input  logic        pc_mux_boot_i,         // load boot address as PC
     input  logic  [1:0] exc_pc_mux_i,          // select which exception to execute
 
     // jump and branch target and decision
@@ -378,7 +377,8 @@ module if_stage
   always_comb
   begin
     unique case (pc_mux_sel_i)
-      `PC_JUMP:      next_pc = (branch_decision_i? jump_target_i : incr_pc);
+      `PC_BOOT:      next_pc = {boot_addr_i[31:5], `EXC_OFF_RST};
+      `PC_JUMP:      next_pc = jump_target_i;
       `PC_INCR:      next_pc = incr_pc;            // incremented PC
       `PC_EXCEPTION: next_pc = exc_pc;             // set PC to exception handler
       `PC_ERET:      next_pc = exception_pc_reg_i; // PC is restored when returning from IRQ/exception
@@ -391,20 +391,6 @@ module if_stage
         // synopsys translate_on
       end
     endcase
-
-    // jump handling
-    //if (jump_in_ex_i == `BRANCH_JAL || jump_in_ex_i == `BRANCH_JALR) begin
-    //  next_pc = jump_target_i;
-    //end else if (jump_in_ex_i == `BRANCH_COND) begin
-    //  // branch handling
-    //  if (branch_decision_i == 1'b1)
-    //    next_pc = jump_target_i;
-    //  else
-    //    next_pc = current_pc_if_o;
-    //end
-
-    if (pc_mux_boot_i)
-      next_pc = {boot_addr_i[31:5], `EXC_OFF_RST};
   end
 
 
@@ -446,11 +432,7 @@ module if_stage
     end
     else
     begin
-      if (pc_mux_boot_i == 1'b1) begin
-        // set PC to reset vector
-        fetch_addr   <= {boot_addr_i[31:5], `EXC_OFF_RST};
-        pc_if_offset <= 1'b0;
-      end else if (dbg_set_npc == 1'b1) begin
+      if (dbg_set_npc == 1'b1) begin
         // get PC from debug unit
         fetch_addr   <= {dbg_pc_from_npc[31:2], 2'b0};
         pc_if_offset <= (dbg_pc_from_npc[1:0] != 2'b0);
diff --git a/include/defines.sv b/include/defines.sv
index 1eeafb1c..4100211c 100644
--- a/include/defines.sv
+++ b/include/defines.sv
@@ -352,8 +352,9 @@ endfunction // prettyPrintInstruction
 ///////////////////////////////////////////////
 
 // PC mux selector defines
-`define PC_INCR          3'b000
-`define PC_NO_INCR       3'b001
+`define PC_BOOT          3'b000
+`define PC_INCR          3'b001
+`define PC_JUMP          3'b010
 `define PC_EXCEPTION     3'b100
 `define PC_ERET          3'b101
 `define PC_HWLOOP        3'b110
diff --git a/riscv_core.sv b/riscv_core.sv
index f2411a6a..1c6def5e 100644
--- a/riscv_core.sv
+++ b/riscv_core.sv
@@ -82,7 +82,6 @@ module riscv_core
   logic [31:0]   current_pc_id;     // Current Program counter
   logic          force_nop_id;
   logic [2:0]    pc_mux_sel_id;     // Mux selector for next PC
-  logic          pc_mux_boot;       // load boot address as PC
   logic [1:0]    exc_pc_mux_id;     // Mux selector for exception PC
 
   logic          compressed_instr;
@@ -273,7 +272,6 @@ module riscv_core
       .exception_pc_reg_i  ( epcr            ),   // Exception PC register
       .pc_from_hwloop_i    ( hwlp_targ_addr  ),   // pc from hwloop start address
       .pc_mux_sel_i        ( pc_mux_sel_id   ),   // sel for pc multiplexer
-      .pc_mux_boot_i       ( pc_mux_boot     ),   // load boot address as PC
       .exc_pc_mux_i        ( exc_pc_mux_id   ),   // selector for exception multiplexer
 
       // from debug unit
@@ -320,7 +318,6 @@ module riscv_core
       .instr_ack_i                  ( instr_ack_int                 ),
 
       .pc_mux_sel_o                 ( pc_mux_sel_id                 ),
-      .pc_mux_boot_o                ( pc_mux_boot                   ),
       .exc_pc_mux_o                 ( exc_pc_mux_id                 ),
       .force_nop_o                  ( force_nop_id                  ),