diff --git a/dv/uvm/core_ibex/fcov/core_ibex_fcov_if.sv b/dv/uvm/core_ibex/fcov/core_ibex_fcov_if.sv
index ac8e515a..1ef6a5e0 100644
--- a/dv/uvm/core_ibex/fcov/core_ibex_fcov_if.sv
+++ b/dv/uvm/core_ibex/fcov/core_ibex_fcov_if.sv
@@ -643,7 +643,7 @@ interface core_ibex_fcov_if import ibex_pkg::*; (
       // No interrupt would be taken in M-mode when its mstatus.MIE = 0 unless it's an NMI
       illegal_bins mmode_mstatus_mie =
         binsof(cs_registers_i.mstatus_q.mie) intersect {1'b0} &&
-        binsof(cp_priv_mode_id) intersect {PRIV_LVL_M} with (cp_interrupt_taken[5:4] == 2'b00);
+        binsof(cp_priv_mode_id) intersect {PRIV_LVL_M} with (cp_interrupt_taken >> 4 == 6'd0);
     }
 
     priv_mode_exception_cross: cross cp_priv_mode_id, cp_ls_pmp_exception, cp_ls_error_exception {
diff --git a/dv/uvm/core_ibex/fcov/core_ibex_pmp_fcov_if.sv b/dv/uvm/core_ibex/fcov/core_ibex_pmp_fcov_if.sv
index 8f2a752b..f94e18e3 100644
--- a/dv/uvm/core_ibex/fcov/core_ibex_pmp_fcov_if.sv
+++ b/dv/uvm/core_ibex/fcov/core_ibex_pmp_fcov_if.sv
@@ -463,11 +463,12 @@ interface core_ibex_pmp_fcov_if import ibex_pkg::*; #(
              ((!pmp_region_priv_bits[2] && pmp_region_priv_bits != MML_XM_XU) ||
               pmp_region_priv_bits inside {MML_WRM_WRU, MML_RM_RU})) {
 
-          // Only interested in MML configuration
-          ignore_bins non_mml_in = binsof(pmp_region_priv_bits) with (!pmp_region_priv_bits[4]);
+          // Only interested in MML configuration, so ignore anything where the top bit is not set
+          ignore_bins non_mml_in =
+            binsof(pmp_region_priv_bits) with (pmp_region_priv_bits >> 4 == 5'b0);
 
           ignore_bins non_mml_out =
-            binsof(pmp_region_priv_bits_wr) with (!pmp_region_priv_bits_wr[4]);
+            binsof(pmp_region_priv_bits_wr) with (pmp_region_priv_bits_wr >> 4 == 5'b0);
 
           // Only interested in starting configs that weren't executable so ignore executable
           // regions